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Design of Analog MOS LSILecture 3

Small Signal Modeling of CMOS Subcircuits

Michael PerrottSeptember 10, 2003

Copyright © 2003 by Michael H. PerrottAll rights reserved.

M.H. Perrott © 2003 2

Outline

Thevenin modeling for small-signal analysis Small-signal analysis of CMOS Subcircuits- Amplifiers- Current mirrors- Current sources- Cascode and enhanced cascode techniques


Small Signal Analysis

A CMOS Amplifier

Key analysis step is to plug in the Hybrid- model- Small signal parameters determined from biasing- All independent sources are set to zero

RS

RG

RD

vinvout

Vbias

ID 1) Solve for bias current Id2) Calculate small signal parameters (such as gm, ro)3) Solve for small signal response using transistor hybrid-π small signal model

Small Signal Analysis Steps


Analysis of Amplifier Using Hybrid-Pi Model

Fill in Hybrid-model for transistor and set independent sources to zero

Use KCL/KVL to solve for node voltages/currents- Requires solution of simultaneous equations!

RD

RS

RG

-gmbvsvgs

vs

rogmvgs voutvin

MOS Hybrid-π Small Signal Model

Is there a faster way?


Thevenin/Norton Modeling

Allows simplification of circuits into One-Port and Two-Port models- Eliminates having to solve simultaneous equations!

With practice, can calculate many circuit characteristics by inspection

- Note: we will assume unilateral behavior for two-ports This is valid for transistor circuits given the Hybrid-

model on the previous slide


Basics of One-Port Modeling

Vth computed as open circuit voltage at port nodes Ith computed as short circuit current across port

nodes Zth computed as Vth/Ith

Zth

Vth Ith Zth

Thevenin Equivalent Norton EquivalentLinear Network


Basics of Two-Port Modeling (Unilateral)

We now include a dependent current or voltage source

Zin- Solve using 1-Port analysis at input

Zout- Solve using 1-Port analysis at output with V1 = 0

GM- Short circuit output current as a function of V1

Av- Open circuit output voltage as a function of V1

No IndependentSources

ZL

Zs

Vin

ZoutGmV1

Linear Network

ZinV1 ZL

Zs

Vin

Zout

AvV1 ZLZinV1

Zs

Vin

OR


Analysis of Cascaded Blocks


Block 2


Block 3

ZLVb


Block 1

Vin Va Vc

Linear NetworkLinear NetworkLinear Network

ZLZoutGmVbZinVbZoutGmVaZinVaZoutGmVinZinVin Vc

Zout,effective

Vth,effective Zin,effectiveVb

Analysis carried out without solving simultaneous equations!


Thevenin Modeling of CMOS Transistors

Use the Hybrid- model of transistor to calculate Thevenin resistances at each transistor node

Key point: we don’t need to do this every time we analyze a circuit- We can derive expressions for Thevenin resistances for

general use

RD

RS

Rthd

Rths

Rthg

RG

-gmbvsvgs

vs

rogmvgs

Hybrid-π Model

g

s

d

gm 2μnCox(W/L)ID

2 2|ΦF| + VSB

γgmgmb

λID1ro

Key Small-Signal Parameters

qID nkT

(n-1)qID

nkT

Strong Inversion Weak Inversion

λID1

Parameter


Thevenin Resistance Expressions

Thevenin resistances useful for many calculations

It would be nice to replace Hybrid-model with Thevenin equivalent

RS

RG

RD

Rthd

Rths

Rthg

ID

Rthd= ro (1+gmRS)

Rthg= infinite

Rths=

1 + RD /rogm

Thevenin Resistances

Approximation(gmb << gm, gmro >> 1)

g

s

d

Rthd= ro (1+(gm+gmb)RS)+RS

Rthg= infinite

Exact

Rths= 1+RD /ro gm+gmb

1ro( )( )

RD

RS

Rthd

Rths

Rthg

RG

-gmbvsvgs

vs

rogmvgs

Hybrid-π Model

g

s

d

1gm

gm 2μnCox(W/L)ID

2 2|ΦF| + VSB

γgmgmb

λID1ro


qID nkT

(n-1)qID

nkT


λID1

Parameter


Replace Hybrid- Model with Thevenin Model

RthgAvvgvg

isRths

Rthdisα

g

s

d

Proposed Thevenin Model

Av = 1

α = 1

RS

RG

RD

Rthd

Rths

Rthg

ID

Rthd= ro (1+gmRS)

Rthg= infinite

Rths=

1 + RD /rogm

Thevenin Resistances

Approximation(gmb << gm, gmro >> 1)

g

s

d

Rthd= ro (1+(gm+gmb)RS)+RS

Rthg= infinite

Exact

Rths= 1+RD /ro gm+gmb

1ro( )( )

Av= gm+gmbgmro

gm

Approximation(gmb << gm, gmro >> 1)Exact

α = 1

RD

RS

Rthd

Rths

Rthg

RG

-gmbvsvgs

vs

rogmvgs

Hybrid-π Model

g

s

d

1gm

gm 2μnCox(W/L)ID

2 2|ΦF| + VSB

γgmgmb

λID1ro


qID nkT

(n-1)qID

nkT


λID1

Parameter


Example 1: Source Follower Amplifier

RG

Vin

Vout

RS

Rthg

RG

vin Avvgvg

is

RS

Rths

Rthdisα

g

s

d

M1

M1

vout

gs

d

Perform small signal analysis by plugging in Thevenin model rather than Hybrid- model- Determine parameters using calculations on summary

sheet in previous slide


Reduce to Two-Port For Convenience

Since Av is approximately 1, we see that a source follower acts like a voltage buffer with overall gain < 1- Note that overall gain is highly influenced by Rs

Rthg

RG

vin Avvgvg RS

Rths

vout

RG

Vin

Vout

RS

Rthg

RG

vin Avvgvg

is

RS

Rths

Rthdisα

g

s

d

M1

M1

vout

gs

dg s


The Issue of the Backgate Effect

Backgate effect alters VT as the source node varies- Leads to reduced gain for the source follower

Backgate effect is eliminated if we tie the bulk connection of the device to its source- Causes gmb to be set to zero- For N-well process, this is only possible for PMOS

devices

RG

Vin

M1

Vout

RS

vgvg Rsvout

gm+gmb

1

gm+gmb

gm

RG

vin


Some Technologies Allow Elimination of Backgate Effect

P-well process: NMOS devices Triple well process: both NMOS and PMOS devices

n-well process

p-well or triple well process(tie the well and source)

RG

Vin

M1

Vout

RS

vgvg Rsvout

gm+gmb

1

gm+gmb

gm

RG

vin

M1

Vout

RS

RG

Vin

vgvg Rsvout

gm

1

RG

vin


Example 2: Degenerated Common Source Amplifier

Again plug in Thevenin model for transistor Reduction to two-port model achieved by lumping impact of

middle stage of model into last stage- Dependent current source will then depend on vg rather than is

RG

Vin

Vout

RS

RD

Rthg

RG

vin Avvgvg

is

RS

Rths

Rthdvout

RDisα

g

s

d

M1

M1


Reduce to Two-Port

Calculation of Gm

RG

Vin

Rthg

RG

vin Gmvgvg Rthd

RDvout

Vout

RS

RD

Rthg

RG

vin Avvgvg

is

RS

Rths

Rthdvout

RDisα

g

s

d

M1

M1


Example 3: Common Gate Amplifier

Reduction to two-port is easy once we realize that dependent source Avvg is zero since vg = 0

Vin

Vout

RS

RD

Rthg

vin

Avvgvg

is

RS

Rths

RthdRDisα

g

s

d

vout

M1

M1


Reduce to Two-Port

Left section is eliminated

Vin

Rths

RS

vin is RthdRD

vout

Vout

RS

RD is

α

Rthg

vin

Avvgvg

is

RS

Rths

RthdRDisα

g

s

d

vout

M1

M1


Example 4: Cascode Amplifier

Allows elimination of Miller effect of Cgd1

Reduction to two-port will be done in several steps

Vout

RD

RG

Vin RS

Rthg1

RG

vin Av1vg1vg1

is1

RS

Rths1

Rthd11is1α

g1

s1

d1

M1

M2

M1

is2Rths2

Rthd2vout2is2α

s2

d2

M2

RD

Common Gate

General Model


Eliminate Middle Sections

Calculation of Gm1 same as for common source amp To reduce further, note that

Vout

RD

RG

Vin RS

Rthg1

RG

vin vg1 Rthd1m1vg1G

g1 d1

M1

M2

M1

is2Rths2

Rthd2vout2is2α

s2

d2

M2

RD


Resulting Two-Port Similar to Common Source Amp

Key difference: drain impedance much larger

Vout

RD

RG

Vin RS

Rthg1

RG

vin vg1

m1vg1G

g1

M1

M2

M1

Rthd2vout

d2

M2

RD


Example 5: Differential Amplifier

Useful for amplifying signals in the presence of noise- Common-mode noise is rejected

Useful for high speed digital circuits- Low voltage swing allows faster gate/buffer

performance

M4

M1 M2

Ibias

Vin+

R1

Vin-

R2

Vo+Vo-

Vbias


First Steps in Small Signal Modeling

Small signal analysis assumes linearity- Impact of M4 on amplifier is to simply present its drain

impedance to the diff pair transistors (M1 and M2)- Impact of Vin+ and Vin- can be evaluated separately and then added (i.e., superposition) By symmetry, we need only determine impact of Vin+

Calculation of Vin- impact directly follows

M4

M1 M2

Ibias

Vin+

R1

Vin-

R2

Vo+Vo-

VbiasRthd4

= ro4

M1 M2

Vin+

R1

Vin-

R2

Vo+Vo-


Calculate Impact of Vin+ using Thevenin Models

Analysis follows fairly easily, but there is a simpler way!

ro4

M1 M2

Vin+

R1 R2

Vo+Vo-

Rthg1Av1vg1vg1

is1

Rths1

Rthd11is1α

M1

R1

Vo-

Rths2is2 Rthd2

is2

α2

R2

Vo+

ro4

M2

Common GateGeneral Model

Vin+


Method 2 of Differential Amplifier Analysis

Partition input signals into common-mode and differential components

By superposition, we can add the results to determine the overall impact of the input signals

ro4

M1 M2

Vin+

R1

Vin-

R2

Vo+Vo-

ro4

M1 M2

R1 R2

Vo+Vo-

Vic

Vid

2

-Vid

2


Differential Analysis

Key observations- Inputs are equal in magnitude but opposite in sign to each other- By linearity and symmetry, is1 must equal is2 This implies iR is zero, so that voltage drop across ro4 is

zero The sources of M1 and M2 are therefore at incremental

ground and decoupled from each other! Analysis can now be done on identical “half-circuits”

M1 M2

Vid

R1 R2

Vo+Vo-2

-Vid

2M1 M2

Vid

R1 R2

Vo+Vo-2

-Vid

2

ro4

is1

iR

is2

is1= is2

iR = 0

M1 M2

Vid

R1 R2

Vo+Vo-2

-Vid

2


Common-Mode Analysis

Key observations- Inputs are equal to each other- By linearity and symmetry, is1 must equal is2

This implies iR = 2is1 = 2is2- We can view ro4 as two parallel resistors that have equal current running through them Allows us to break up amplifier into two identical half-

circuits

ro4

M1 M2

Vic

R1 R2

Vo+Vo-Vic

is1

iR

is2

is1= is2

iR = 2is1= 2is2

2ro4

M1 M2

Vic

R1 R2

Vo+Vo-Vic

is1

2ro4

is2idiff = 0

M1 M2

Vic

R1 R2

Vo+Vo-Vic

2ro42ro4


Issue: Thevenin Method Breaks Down in Some Cases

Using Thevenin method

But, in reality

Issue: coupling between source, drain, or gate- Do we have to abandon the Thevenin method?

RS

M1

RthA


Thevenin Resistance of Diode-Connected MOS

Plug in Hybrid- to do the analysis Whenever you see this exception, you can simply use

this result for small signal analysis (i.e., Hybrid-model not needed anymore)

RS

M1 (gm+gmb)

gm

RS

RthA

-gmbvsvgs

vs

rogmvgs

RthARthA

Diode-Connected

Device

Derive RthA Using

Hybrid-p Model

Resulting

One-Port Model

RSgm

1


Example: Current Mirror / Current Source

Key parameter of current source output is its output resistance

M1M2

Ibias

Iref

Rthg1vg1 Rthd1m1vg1g

g1 d1

M1

gm2

1

M2

n1 n2

n1 n2 n2

Rthd1= ro1

Common SourceDiode-Connected


Cascoded Current Source

Offers increased output resistance Calculation straightforward using Thevenin resistance

method

M1M2

Ibias

Iref

ro1

M3Vbias

Rthd3

M3Vbias

Rthd3


Double Cascode Current Source

Offers even higher output resistance Calculation straightforward using Thevenin resistance

method

M1

I2

M2Vbias1

M4

I1

M3Vbias2

Rthd3


Wilson Current Mirror

Relies on feedback in its operation- Thevenin method cannot be applied due to source/gate

coupling! Using Hybrid- analysis

- Output resistance comparable to cascode current source This circuit is rarely used these days

I1

M1

I2

M2

M3

Rthd2


Enhanced Cascode Current Source

Offers output resistance comparable to double cascode current source

As with Wilson mirror, analysis is tricky due to source/gate coupling- Must resort to Hybrid- model- Result (using Rthd formula in the following slide)

M4

M3

M1M2

Ibias IrefIbias2


Thevenin Resistances for CMOS Transistor Feedback Pair

RC

RB

-gmb4vs4vgs4

vs4

ro4gm4vgs4

RC

M4

M3

RA

RB

Rthd

Rths

Rthd

-gmb3vs3vgs3ro3 gm3vgs3

RA

vs3=0

Rths

M4

M3

S

D

S

D


Variation on a Theme: Enhanced Cascode Amplifiers

We can turn the enhanced cascode current source into an amplifier- Inject a current input at the source of M4

Key aspects of small signal analysis can be done using Thevenin method- Simply leverage Thevenin resistance formulas shown on

previous slide

Vout

R1

RsM1

M4

Ibias2

M3

M2

Ibias1

Iin

Input Source


Small-Signal Analysis of Enhanced Cascode Amp

From Thevenin resistance calculations, we know- Input impedance is quite low

- Output impedance is probably determined by R1

This amplifier is useful for extracting a current signal from a high impedance source

Vout

R1

RsM1

M4

Ibias2

M3

M2

Ibias1

Iin

Input Source

Vout

R1

Rs

M4

M3

Iin

Input Source

gm2

1 Rthd1Rin

Rout


Conclusion

CMOS subcircuits form key building blocks for larger circuits (such as op-amps)- Consists of amplifiers, current mirrors, current sources

Thevenin modeling can be used to quickly perform small-signal analysis of CMOS subcircuits- Avoids having the solve simultaneous equations

Thevenin approach is limited to subcircuits that do not have coupling between source, drain, and/or gate- However, can often derive specific Thevenin equivalents

for such subcircuits Examples: diode-connected devices, enhanced-

cascode configuration