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IntroductionThe SIM6800M series is an inverter power module which includes power MOSFETs or IGBTs, pre-driver IC, and bootstrap diodes with limit resistors in a single package. The device provides an ideal solution especially for small size inverter motors such as fans and pumps. These ICs take 230 VAC input voltage, and up to 5 A (continuous) output current. Figure 1 shows the functional block diagram of the device.
High voltage power supply is applied between VBB and LSx. 15 V is applied between VCC1 and COM1, and VCC2 and COM2. Six signals, HIN1 through HIN3 and LIN1 through LIN3, control the on-off switching of the six internal power MOSFETs or IGBTs. These input signals are active high (xIN = High → MOSFET on). Boot capacitors should
be connected between VB1A or VB1B and U, VB2 and V, and VB3 and W1, for high-side power supply.
The device includes: OCP (overcurrent protection, activated for example at a short on the inverter bridge), TSD (thermal shutdown, activated for example at abnormal temperatures, or overloads), and UVLO (protection circuit for sudden drops of the controlling power supply voltage). Operation of these protection features can be monitored on the fault signal output pin, F̄̄ ¯̄Ō .
There is a current limiter function for the MOSFET or IGBT control signal. When the current through a shunt resistor exceeds the threshold, the OCL pin goes high (active high). By connecting this signal to the SD pin, current limiter operation (high-side of MOSFETs or IGBTs turned off for 1 carrier PWM cycle) can be performed.
SIM6800M Series High Voltage 3-Phase Motor Driver ICs
Application Information
SIM6800-AN
Table 1. SIM6800M Series Lineups
Part Number
Power Device RatingBoot
Resistance(Ω)
Input Voltage(VAC) NoteType
Breakdown(V)
Output(A)
RDS(ON) (Ω)(Typ) (Max)
SIM6812M MOSFET 500 2.5 2.0 2.4 60 200 –
SIM6813M MOSFET 500 3.0 1.4 1.7 60 200 –
SIM6822MIGBT 600 5.0
VCE(sat) (V)60 200
Low switching loss
1.75 2.2SIM6827M Low noise
Table of ContentsIntroduction 1Features 2Pin Functions 4Protection Functions 7Application Information 12Cautions and Warnings 13Package Diagram 14Performance Characteristics 15
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Figure 1. Functional Block Diagram
Low Side
Driver
UVLOUVLOUVLOUVLO
InputLogic
Input Logic(OCP Reset)
UVLO
SD
VCC1
VB1B VB2 VB3
VBB
W2
U
LS3B
LS1LS2LS3A
FO
COM2
LIN3LIN2LIN1
VCC2
COM1
HIN3HIN2HIN1
High SideLevel Shift Driver
OCL
OCP
IGBTs for SIM6822M and SIM6827M
OCP and OCL
ThermalShutdown
OCP
W1
V1V
V2
VB1A
SIM6800M
A A A
A
A
A A
HO
LO
Features• Package: 40-pin DIP
The SIM6800M series is packaged in a DIP package with 29 pins, which enables down-sizing and simple PCB layout. Pin pitch is 1.778 mm, with a 3.556 mm pitch separating adjacent high and low voltage pins. Pin width is 0.52 mm. Body thickness is 4.0 mm.
• Three built-in high voltage bootstrap fast recovery diodes (FRD) diodes, each with current limiting resistor and capable of withstanding high voltages: 600 V at 0.5 A
• OCL (Overcurrent Limiter) function (with shutdown (SD) input pin)
When the current exceeds the maximum current level value, Vlim , to limit the current, the high-side MOSFETs or IGBTs are switched off for one PWM cycle at the carrier frequency.
• OCP (Overcurrent Protection)
OCP is a function that shuts down the low-side MOSFET or IGBT
gate signal at overcurrent conditions, such as output short-circuit and inverter bridge short-circuit, and to output an alarm signal. The output time of the alarm signal is set by an external resistor and capacitor.
• Gate shutdown function on both high- and low-side at abnormal operation
Externally connecting the SD pin and the inverted F̄̄ ¯̄Ō pin signal enables the device to shut down all high-side and low-side MOSFETs at abnormal conditions (when the F̄̄ ¯̄Ō signal goes low), such as overheating, overcurrent, or controlling power sup-ply voltage drop.
• Built-in TSD (thermal shutdown) function, embodied in the low-side driver IC (MIC)
When the MIC chip temperature exceeds the set value, the gate input is shut down, and the device outputs an alarm signal. Tem-perature is monitored by the low-side MIC.
• Built-in protection circuit for controlling power supply voltage drop (UVLO)
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The device monitors each controlling supply voltage: VCC1, VCC2, and VBx. If any of these voltages falls below the under-voltage threshold, the gate is shut down. If the VCC2 voltage falls below the undervoltage threshold, the F̄̄ ¯̄Ō signal is asserted.
• Alarm signal output (indicating shut down) while protection circuit is in operation
Operates on the low, through the F̄̄ ¯̄Ō pin, an open collector out-put. When TSD, OCP, or UVLO protection for controlling power supply voltage VCC2 drop are activated, the internal transistor turns on and drives the F̄̄ ¯̄Ō pin low.
• RoHS compliance
RoHS compliant (Pb free) for pin solder and internal solder.
• Structure
The SIM6800M series has six MOSFET or IGBT chips , two drive ICs, and three bootstrap fast recovery diodes mounted on a copper leadframe. Gold wires connect from chip to chip, and from chip to leadframe. The case is molded epoxy resin. Part number and lot number are printed on the surface of the case. Figure 2 shows the package exterior.
Figure 2. SIM6800M Package Structure: external view
Figure 3. SIM6800M Package Outline Drawing
0.52 1.778
14.6
4
7.6
36
33.7
40
1
21
2017.4
1.8 (0° to 15°) 0.42
W2
VB
3
LS3B
VB
1B
VB
B
VB
1A
UV2
(LS
2)
W1
V1
LS3A LS
2
VC
C2
OC
L
OC
P
SD
FO
LIN
1
LIN
3LI
N2 V
VB
2
VC
C1
CO
M2
LS1
CO
M1
HIN
3
HIN
1H
IN2
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Pin Functions
To keep sufficient distance between high and low voltage pins, or between high-voltage pins with different electric potentials, one pin each is removed between: pin 17 (VCC1) and pin 19 (V), pin 21 (VB1A) and pin 22 (VB3), pin 24 (W1) and pin 26 (V1), pin 26 (V1) and pin 28 (VBB), pin 28 (VBB) and pin 30 (VB1B), pin 31 (U) and pin 33 (LS2), pin 33 (LS2) and pin 35 (V2), and pin 35 (V2) and pin 37 (W2), and two pins between pin 37 (W2) and pin 40 (LS3B).
W2
VB
3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 19
35 33 31 30 28 26 24 23 21
20
3740
LS3B
VB
1B
VB
B
VB
1AUV2
(LS
2) W1
V1
LS3A
LS2
VC
C2
OC
L
OC
P
SD
FO LIN
1
LIN
3
LIN
2
V VB
2
VC
C1
CO
M2
LS1
CO
M1
HIN
3
HIN
1
HIN
2Table 2. Pin List Table Number Name Function Number Name Function
1 LS3ASource pin, W phase (MOSFET)Emitter pin, W phase (IGBT),connected to LS3B internally
17 VCC1 High-side logic supply voltage
2 LS2Source pin, V phase (MOSFET)Emitter pin, V phase (IGBT)(pin 33 has same function, but is trimmed)
18, 22, 25, 27, 29, 32, 34, 36, 38, 39
– Pin deleted
3 OCP Input for overcurrent protection
4 F̄̄ ̄̄Ō Fault signal output; active low 19 V High-side bootstrap negative pin (V phase)
5 VCC2 Low-side logic supply voltage 20 VB2 High-side bootstrap positive pin (V phase)
6 COM2 Low-side logic GND pin 21 VB1A High-side bootstrap positive pin (U phase),connected to VB1B internally
7 LIN1 Low-side input pin (U phase) 23 VB3 High-side bootstrap positive pin (W phase)
8 LIN2 Low-side input pin (V phase) 24 W1 Output of W phase (connect to W2 externally)
9 LIN3 Low-side input pin (W phase) 26 V1 Output of V phase (connect to V2 externally)
10 OCL Overcurrent limiting (OCL) signal output 28 VBB Main supply voltage
11 LS1 Source pin, U phase (MOSFET)Emitter pin, U phase (IGBT) 30 VB1BHigh-side bootstrap positive pin (U phase),connected to VB1A internally
12 SD High-side shutdown input 31 U Output of U phase
13 HIN1 High-side input pin (U phase) 33 (LS2)Source pin, V phase (MOSFET)Emitter pin, V phase (IGBT)(pin trimmed, see pin 2 for same function)
14 HIN2 High-side input pin (V phase) 35 V2 Output of V phase (connect to V1 externally)
15 HIN3 High-side input pin (W phase) 37 W2 Output of W phase (connect to W1 externally)
16 COM1 High-side logic GND pin 40 LS3BSource pin, W phase (MOSFET)Emitter pin, W phase (IGBT),connected to LS3A internally
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Table 3. Equivalent Circuits for Input and Output PinsPin
Number PinsInput or Output Equivalent Circuit
21(30)2023
VB1A(VB1B)VB2 VB3
Regulator
VBx
(High side) U, V, W
High-sidedrive circuit
17 VCC1 Regulator REGBoot Diode, DBxVCC1
COM1 UVLO
5 VCC2 Regulator
VCC2
COM2
Low-sidedrive circuit
REGUVLO
131415789
HIN1HIN2HIN3LIN1LIN2LIN3
Input
5 V2 kΩ 2 kΩ
20 kΩHINx, LINx
COMx
12 SD InputTo Shutdown
SDFilter3.3 µs
COM1
5 V2 kΩ 2 kΩ
1 MΩ
10 OCL Output OCL
COM2200 kΩ
100 Ω5 V
4 F̄̄ ̄̄Ō Input, Output
5 V
1 MΩ
50 Ω FO
COM2
Shutdown
3 OCP Input OCP
2 kΩ
200 kΩ
COM2
OCLOCP
5 V
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Descriptions of input and output pins
The following are explanations for the input and output pins (please refer to figure 18):
• VBB pin
This is the main supply voltage pin.
Note: In order to reduce surge voltages, it is recommended to use a snubber capacitor, CS in figure 18, of 0.01 to 0.1 μF between VBB and COM. In order to achieve better effectiveness of the snubber capacitor, please make the capacitor PCB trace as short as practicable, and place it between the IC and an additional electrolytic capacitor.
VBB is a high voltage pin. Please provide sufficient separation from other traces or consider using overcoating material.
In addition, the main current flows through VBB. Please make these traces as wide as possible.
• U, V, V1, V2, W1, W2 pins
These pins are connected to the motor. Because V1 and V2, and W1 and W2, are not connected to each other internally in the IC, please connect those pins on the PCB. Because these output pins have high voltage, please provide sufficient separation from other traces or consider using overcoating material.
Note: Because the V pin is internally connected the V1 pin, there is no requirement to connect these two pins to each other exter-nally. The V pin is used to connect the bootstrap capacitor. Please do not connect this pin to the motor.
Because the main current flows through the U, V1, V2, W1, and W2 pins, please make the traces wide for these pins.
• LS1, LS2, LS3A (LS3B) pins
These are GND pins and shunt resistor sensing pin of the main power supply. Please connect the current detection shunt resistor(s) between these pins and the COM pins.
Because LS3A and LS3B are connected internally, it is not neces-sary to connect them externally. You can either use LS3A or LS3.
By inputting a current detection signal into the OCP pin, the current limiter circuit function and overcurrent protection are enabled. The LSx pins and the shunt resistor should be connected with the shortest possible trace length. If the trace is long, it will be a factor for malfunctions due to parasitic inductance. Please make the connection between the LSx and COM pins low imped-ance (the LSx potential is less than –3 V when a motor drive is operating).
• VB1A (VB1B), VB2, VB3 pins
These are pins to connect the bootstrap capacitors for the high-side controlling supply voltage. Please connect individual capaci-tors, CBOOTx , between VB1A(VB1B) and U, VB2 and V, and VB3 and W1. VB1A is internally connected to VB1B. Connect to either VB1A or VB1B.
In order to avoid effects of external noise, please place these capacitors very near to the IC. In addition, please use ceramic capacitors which have good high frequency response.
The bootstrap capacitors are charged from the VB pins, which are supplied through the VCC1 pin, the bootstrap diodes, DB , inside the IC, and the in-rush current limiter boot resistors, RB . The time constant for charging is RB × CB .
• VCC1, VCC2 pins
These are the control power supply voltage pins. Please connect both VCC1 and VCC2 to 15 V. To avoid malfunction or damage by power supply ripple or external surges, please put ceramic capacitors, CBYP , of 0.01 to 0.1 μF near the pins. In addition, if surge voltage could exceed 20 V, it is recommended to use a Zener diode, DZ (VZ = 18 to 20 V) .
• HIN1, HIN2, HIN3, LIN1, LIN2, and LIN3 pins
These are the input pins for MOSFET or IGBT control. Thresh-old voltage is set for the use of both 3.3 V and 5 V inputs. In case external noise becomes significant or wire connections are long, please consider using an RC filter, as shown in figure 4 (RA = 50 to 300 Ω , C = 100 to 1,000 pF), or a pull-down resistor (RPD ≈ 4.7 to 10 kΩ).
• SD pin
This input pin is used to shut down the high-side output MOSFETs. The pin is active high, and when a high signal (3.3 or 5 V) is applied, those MOSFET gates are shut down.
By connecting OCL to the SD pin externally, current limiter operation is enabled (figure 6 shows the timing diagram for the current limiter function). There is an internal filter of 3.3 μs (typ) on the SD pin. Pulses input from the OCL pin that are narrower than that are considered noise, and the gates are not shut down. If a pulse is wider than 3.3 μs, the gates are shut down. When the gates are shut down, the current flowing through the shunt resis-tor becomes 0 A, and the OCL signal goes low (0 V), However, each high-side MOSFET remains off until the corresponding HIN signal transitions from low to high, until a positive (rising) signal edge comes (referred to as edge operation).
By connecting the SD pin and the inverted F̄̄ ¯̄Ō pin signal, all high-side and low-side MOSFETs can be shut down when an abnormal circumstance occurs, such as overheating, overcurrent, or undervoltage on the control supply voltage.
SystemControl
IC (MCU)
RPD
RA
SIM6800M
Figure 4. External Noise Reduction Circuit; for HIN and LIN input pins
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• OCL, OCP pins
As shown in figure 5, the OCP pin can be used to control the OCL pin. The LSx pins are externally connected to the OCP pin; if the connection is not made, the OCL and OCP functions are not enabled. If the voltage at the LSx pins is kept higher than 0.65 V (typ) for 2 μs (typ), the output voltage at the OCL pin goes high (5 V). When OCL is connected to the SD pin, it oper-ates as a current limiter (see figure 6 for current limiter timing).
• F̄̄ ¯̄Ō pin
An internal transistor on the F̄̄ ¯̄Ō output pin is turned on by the protection circuits due to overcurrent, overtemperature, or for undervoltage on the control supply voltage, VCC2 . At the same time, the low-side MOSFETs or IGBTs are shut down. After the fault condition is released, the LO operates according to LIN (logic level operation).
Please connect a pull-up resistor, RFO = 3.3 to 10 kΩ, and a capacitor for noise malfunction prevention, CFO = 0.001 to 0.01 μF, to the F̄̄ ¯̄Ō pin.
Protection Functions The following are descriptions and timing charts of the operation of protection functions for the SIM6800M series.
Protection circuit for controlling power supply voltage drop (undervoltage lockout, UVLO)
If gate drive voltage of the output MOSFETs becomes insuf-ficient, there is greater MOSFET power dissipation, and in the worst case, the IC may be damaged. In order to avoid this, a protection circuit for controlling power supply voltage drop is incorporated.
The control IC (MIC) monitors the high-side voltage: between VCC1 and COM1, VB1A(VB1B) and U, VB2 and V, and VB3 and W1 (the MIC also monitors the low-side voltage, between VCC2 and COM2). As shown in figure 7, after VB exceeds the VUVHH rated value, 10.5 V (typ), at the next positive (rising) edge on HIN (edge operation), an output-on pulse appears at HO (the gates of the high-side output MOSFETs). When VB goes below
Figure 5. Equivalent Circuit from OCP to OCL
Figure 6. Timing Chart of Current Limiter Operation
0.65 V
Filter
200 kΩ2 μs (typ)
OCP 2 kΩOCL
COM2
+–
LINx
LSx
FO
VTRIP(1V)
VLIM
OCL andSD
2μs
2μs
HINx
HO (high-sideMOSFET or
IGBTgate)
LO (low-sideMOSFET orIGBT gate)
3.3 μs 3.3 μs
High-side gate shut down
20 μs(min)
Low-side gate shut down (OCP)
2μs
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the VUVHL rated value, 10 V (typ), the high-side MOSFETs are shut down. When the voltage between VCC1 and COM1 goes below VUVLL , 11 V (typ), which applies on both of VCC1 and VCC2 UVLO conditions, the high-side MOSFETs are shut down. After a shutdown, when the power supply voltage rises and exceeds VUVLH , 11.5 V (typ), at the next positive (rising) edge (edge operation), an output-on pulse appears at HO.
Note: When power MOSFET output is shut down according to UVLO operation due to a voltage drop on the high side, the fault is not reflected at the F̄̄ ¯̄Ō output.
Figures 8 and 9 show the internal equivalent circuit of the UVLO detection features on the high-side control power supply, on the
VB and VCC1 pins. As shown in the figures, internal filters are provided to eliminate line noise.
When the voltage between VCC2 and COM2 goes below VUVLL , 11 V (typ), the low-side MOSFETs are shut down and the open collector internal transistor on the F̄̄ ¯̄Ō pin turns on. When VCC2 rises and exceeds VUVLH , 11.5V(typ), the shut down of the low-side MOSFETs is released and internal transistor on the F̄̄ ¯̄Ō pin turns off. After the fault condition is released, the F̄̄ ¯̄Ō transistor operates according to LIN (logic level operation), see figure 10.
The low-side UVLO circuit has an internal filter to eliminate line noise, similar to the high-side UVLO circuit.
Figure 7. Timing Chart of High-Side UVLO Operation
Figure 8. High-Side UVLO Internal Equivalent Circuit at VB Figure 9. High-Side UVLO Internal Equivalent Circuit at VCC1
HIN
VB toHigh Side
(U,V,W)
HO
VUVHH VUVHHVUVHL
VCC1 VUVLLVUVLH
MOSFET or IGBT gateto high-sidedrive circuit
R
S Q
FF
VB
U,V,W
VREF
+–
SET pulse
RESET pulse
Filter
Comparator
MOSFET orIGBT gateto high-sidedrive circuit
R
S Q
FF
VCC1
HIN
VREF
+–
SET pulse
RESET pulse
Comparator
Filter
PulseGenerator
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As mentioned above, this IC contains filters against steep drops in the control voltages: VB, VCC1, and VCC2. However, there are possibilities of malfunction due to line noise or IC damage in the event excessive voltage is applied, a filter time-constant is exceeded, or only VCC1 drops but VB is retained, and so forth. Therefore, please place an external ceramic capacitor, CBYP , of 0.01 to 0.1 μF and a Zener diode, DZ (VZ = 18 to 20 V) near the power supply pins.
Thermal Shutdown (TSD)
The SIM6800M series contains a Thermal Shutdown circuit. In the event the IC is overheated by an increase of power consump-tion due to overload or an increase of ambient temperature, the low-side power MOSFETs are shut down, and the internal open collector transistor on the F̄̄ ¯̄Ō pin is turned on.
Table 4 provides the TSD temperature parameters. Detection is done by the low-side MIC. When the temperature exceeds 150°C
(typ), the low-side MOSFETs are shut down, and when the tem-perature goes below 120°C (typ), the shutdown is released and the IC operates according to the LIN signals.
Note: Because the die temperature of the power MOSFETs is NOT directly monitored, damage to the IC by overheating cannot be fully prevented. Please note that there may be some delay in temperature detection, such as in cases when the MOSFET tem-perature is increased abruptly, until the heat reaches the monitors.
Table 4. Thermal Protection (TSD) LevelsLow-Side MIC Temperature (°C)
Symbol Min. Typ. Max.TSD Enable TDH 135 150 165
TSD Release TDL 105 120 135
TSD Hysteresis TDHYS – 30 –
LIN
FO
Tlow-side IC TDL
LO
TDH
Open collector transistorturns on at low
LIN
FO
VCC2 VUVLL
Open collector transistorturns on at low
LO
VUVLH VUVLH
Figure 11. Timing Chart of Thermal Protection (TSD) Operation (TMIC is the temperature monitored at the low-side MIC)
Figure 10. Timing chart of low-side UVLO operation
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Over Current Protection (OCP)
The SIM6800M series contains an Overcurrent Protection func-tion. Figure 12 shows the internal equivalent circuit structure for OCP. If the voltage between LSx and COM exceeds VTRIP , 1.0 V (typ), for the blanking time, tBK , 2 μs (typ), OCP operation is started.
At the start of OCP operation, at the same time as an internal transistor on the F̄̄ ¯̄Ō pin (connected to F̄̄ ¯̄Ō through a 50 Ω resis-tor) turns on, the gates of the low-side output MOSFETs are shut down. OCP operation is continued for a period of 25 μs (typ) after the OCP pin voltage becomes less than 1 V. After the 25 μs
period has passed, the gate shutdown is released, and the transis-tor of the F̄̄ ¯̄Ō pin turns off. After that, the IC operates according to the LIN signals.
There is an internal circuit that shuts down the MOSFET gates when the F̄̄ ¯̄Ō pin is low. The F̄̄ ¯̄Ō Recovery time, the delay in return from OCP mode to normal operation, is adjustable by an external pull-up resistor, RFO , on the F̄̄ ¯̄Ō pin. If it is required to extend the MOSFET shutdown period beyond the 25 μs (typ) of OCP, it can be extended by increasing the value of RFO or not inserting RFO. For more information, please refer to the Imple-menting Adjustable F̄̄ ¯̄Ō Recovery Time section.
LIN
LO
LS
FO
<2 μs
VTRIP(1V)
2μs25 μs (min)
OCP
VREF(1 V)
OCPー
+
FO
MOSFETShutdown
Filter2 μs
S
R
Q
FF50 Ω
Timer25 μs
2 kΩ
1 MΩ
Figure 13. Timing Chart of Overcurrent Protection (OCP) Operation
Figure 12. OCP Internal Equivalent Circuit
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0
0.5
1.0
1.5
2.0
2.5
3.0
0 200 400 600 800 1000
FO Recovery Time
(ms)
Rfo [k Ω]
0
0.5
1.0
1.5
2.0
2.5
3.0
0 0.002 0.004 0.006 0.008 0.010CFO (μF)
FO Recovery Time
(ms)
Implementing Adjustable F̄̄ ̄̄Ō Recovery Time
This IPM has a function to adjust F̄̄ ¯̄Ō recovery time using an external pull-up resistor and a capacitor added at the F̄̄ ¯̄Ō pin. Fig-ure 14 is an example for the implementation. Using this imple-mentation the recovery time from an OCP mode to the normal operation can be increased. If the port of the MCU connected to F̄ ¯̄Ō has an internal pull-down resistor, the following calculation can be used:
VFO × RIN /[(1×106 ×RFO) / (1×106 + RFO) + RIN] ≥ Vth
where
3.3 or 5 VSIM6800M MCU
CFO RIN
RFO
5 V
1 MΩ
50 Ω FO
COM2 GND
Shutdown
RES
Figure 14. F̄̄ ̄̄Ō Internal Equivalent Circuit; demonstrating RFO and CFO implementation
Figure 16. F̄̄ ̄̄Ō Recovery Time Versus RFO; CFO = 0.01 μF, VFO = 5 V Figure 17. F̄̄ ̄̄Ō Recovery Time Versus CFO; RFO = 1 MΩ, VFO = 5 V
Figure 15. Timing Chart for F̄̄ ̄̄Ō Recovery
LIN
FO
Protectionfeature
operation
LO FO recovery time
Filter3.3 μs (typ)
2 V (typ)
Filter3.3 μs (typ)
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SD
VCC1
VB1B VB2 VB3
W2
U
LS1
FO
COM2
LIN3LIN2LIN1
VCC2
COM1
HIN3HIN2HIN1
OCL
W1
V1V
VBB
V2
15V
5V
OCP
LS2LS3A
DC-link
RS CS
Ro
Co
RFO
CFOCBYP
U
V
W
COM
Con
trol
ler
Low SideDriver
UVLOUVLOUVLOUVLO
InputLogic
Input Logic(OCP reset)
UVLO
High SideLevel Shift Driver
OCP and OCL
ThermalShutdown OCP
VB1A
LS3B
CBOOT1CBOOT2
CBOOT3
BLDCM
Figure 18. Typical Application Circuit; with a 5 V MCU (with current limiter configured)
Application Information
Figure 18 is an example of a typical application circuit.
• Please be sure to connect W1 and W2, and V1 and V2, on the printed circuit board.
• When the current limiter is not used, please leave the OCL pin open, and the SD pin open or connected to GND (when signifi-cant external noise is expected).
• Although the F̄̄ ¯̄Ō pin has an internal pull-up resistor of 1 MΩ, please connect a pull-up resistor RFO between the F̄̄ ¯̄Ō pin and a 5 V or 3.3 V power supply in consideration a noise reduction capability. Please note, if the F̄̄ ¯̄Ō pin is connected to the 5 V or 3.3 V without the pull-up resistor, the thermal protection (TSD) function is disabled (low-side UVLO protection and Overcur-rent Protection functions remain enabled).
• Place a ceramic capacitor, CFO (0.001 to 0.01 μF) between the F̄̄ ¯̄Ō and COM2 pins to avoid malfunction due to noise.
• Make the PCB circuit layout between the bootstrap capacitors, CBOOTx (≈ 1 μF) and the IC as short as possible to avoid mal-function due to noise.
• Place a ceramic capacitor, CBYP (0.01 to 0.1 μF) between VCC1 and COM1, as well as VCC2 and COM2, to avoid malfunction due to noise. Make the PCB circuit layout between these capaci-tors and the IC as short as possible.
• Make the PCB circuit layout between current sense resistor, RS , inserted between LSx and COM2, and the IC as wide and as short as possible to avoid malfunction due to noise.
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• Power supply sequence Powering-on the IC has no specific sequencing requirements. However, please ensure that the minimum controlling voltage, VCC , has been established before sending input to the HIN or LIN pins.
• Short-circuit protection This IC does not contain a protection circuit for ground-fault. Please make sure not to cause ground-fault mode.
• Distance between pins The SIM6800M series uses a DIP 40-pin package and the dis-tance between the pins is 1.778 mm pitch. It is recommended to apply overcoating or overmolding between the pins and on the PCB.
• Surge suppression
Please reduce applied surges to each pin by adding ceramic capacitors or Zener diodes, or other measures. Surges may cause not only malfunction but also damage the IC. Make sure to fully consider this point.
• Input dead-time Please set dead-time externally (no internal setting), so as not to cause shoot-through (high to low short-circuit). 1.5 μs or longer is recommended for the SIM6800M series.
• To minimize interference between the current loop at the high voltage rail (VBB) and the +15 V power rail, the grounds for both power rails should be connected together on the PCB at a single point that is close to the frame ground or earth ground.
Cautions and Warnings
14SANKEN ELECTRIC CO., LTD.
SIM6800-AN
5
14.8±
0.3
17.4±
0.5
Ø3.2±
0.2
16.7
TYP
7.6±0.4
33.7±0.3
Pin 1 Index
4X Gate area
1.15 M
AX
40
1
21
Case temperature test point on branded surface, aligned with pin 14 at 5 mm from case side.
2-R0.5
201.8±0.1
(4°)
0.42 +
0.1 –0.05
A
A
A
Package DiagramSIM package
Pb-free. Device composition compliant with the RoHS directive.
15SANKEN ELECTRIC CO., LTD.
SIM6800-AN
Performance Characteristics
Applicable to all SIM6800 series
5.04.54.03.53.02.52.01.51.00.5
0
3.63.43.23.02.82.62.42.22.0
–25 25 75 150100 125500
TJ (°C)
–25 25 75 150100 125500
TJ (°C)
–25 25 75 150100 125500
TJ (°C)
I CC
(off)
(mA
)I C
C (m
A)
Supply Current (Off) versus Junction TemperatureVCC = 15 V, VIN = 0 V
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
TJ = 125°C
TJ = 75°CTJ = 25°C
Supply Current versus Supply VoltageVCC = 15 V
5.04.54.03.53.02.52.01.51.00.5
0–25 25 75 150100 125500
TJ (°C)
I CC
(off)
(mA
)
Supply Current (On) versus Junction TemperatureVCC = 15 V, VIN = 5 V
MAX
MIN
TYP
I BO
OT
(μA
)I B
OO
T (μ
A)
Boot Current (off) versus Junction TemperatureVB = 15 V, one VHIN1 = 0 V
Boot Current (off) versus High Side Supply VoltageVB = 15 V, MOSFETs off
I INH
(μA
)
TJ = 125°C
TJ = 75°CTJ = 25°C
High-Side Input Current versus Junction Temperature VIN = 5 V
12 13 14 15 16 17 18 19 20
VCC (V)
12 13 14 15 16 17 18 19 20
VB (V)
0
50
100
150
200
250
300
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
I BO
OT
(μA
)
Boot Current (off) versus Junction TemperatureVB = 15 V, VHIN1 = 0 V
0
50
100
150
200
250
300
20406080
100120140160180
050
100150200250300350400450500
16SANKEN ELECTRIC CO., LTD.
SIM6800-AN
–25 25 75 150100 125500
TJ (°C)
–25 25 75 150100 125500
TJ (°C)
–25 25 75 150100 125500
TJ (°C)
VIH
(V)
VIL
(V)
High-Side Input Voltage versus Junction Temperature Low-Side Input Voltage versus Junction Temperature
MAX
MIN
TYP
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
VIN
Del
ay (n
s)t O
N (n
s)
Input Delay versus Junction TemperatureVHIN to VHO
Minimum On-Time (High-Side) versus Junction Temperature
Minimum On-Time (Low-Side) versus Junction Temperature
1.01.21.41.61.82.02.22.42.62.83.0
00.20.40.60.81.01.21.41.61.82.0
300350400450500550600650700750800
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
VIN
Del
ay (n
s)Input Delay versus Junction Temperature
VLIN to VLO
300350400450500550600650700750800
050
100150200250300350400450500
–25 25 75 150100 125500
TJ (°C)
MAX
MINTYP
t ON
(ns)
050
100150200250300350400450500
Applicable to all SIM6800 series
17SANKEN ELECTRIC CO., LTD.
SIM6800-AN
0 400 800 12001000600200
tTBD (ns)
t TB
D (n
s)
VU
VH
H (V
)
Output Gate Pulse Width versus Input Pulse Width Typical, TJ = 25°C, VCC = 15 V
High-Side UVLO Release Threshold versus Junction Temperature
High Side
Low Side
–25 25 75 150100 125500
TJ (°C)
MAX
MINTYP
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
t VB
(UV
LO F
Ilter
) (μs
)
High-Side UVLO Filter Delay versus Junction Temperature
0
200
400
600
800
1000
1200
8.0
8.5
9.0
9.5
10.0
10.5
11.0
11.5
12.0
V UVH
L (V
)
High-Side UVLO Enable Threshold versus Junction Temperature
–25 25 75 150100 125500
TJ (°C)
MAX
MINTYP
8.0
8.5
9.0
9.5
10.0
10.5
11.0
11.5
12.0
V UVL
H (V
)Low-Side UVLO Release Threshold
versus Junction Temperature
–25 25 75 150100 125500
TJ (°C)
MAX
MINTYP
9.0
9.5
10.0
10.5
11.0
11.5
12.0
12.5
13.0
V UVL
L (V
)
Low-Side UVLO Enable Threshold versus Junction Temperature
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
9.0
9.5
10.0
10.5
11.0
11.5
12.0
12.5
13.0
0
1
2
3
4
5
Applicable to all SIM6800 series
18SANKEN ELECTRIC CO., LTD.
SIM6800-AN
VLI
MH
(V)
Overcurrent Limit (High) versus Junction Temperature
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
t VB
(UV
LO F
Ilter
) (μs
)
OCL Pin Output Voltage versus Junction Temperature
V TR
IPH
(V)
Overcurrent Trip Voltage (High) versus Junction Temperature
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
t BK
(μs)
Overcurrent Blanking TIme versus Junction Temperature
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
t P (μ
s)
OCP Hold-Time versus Junction Temperature
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
t VC
C(U
VLO
FIlt
er) (μs
)
Low-Side UVLO Filter Delay versus Junction Temperature
0
1
2
3
4
5
0.61
0.62
0.63
0.64
0.65
0.66
0.67
0.68
0.69
0.90
0.95
1.00
1.05
1.10
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
0
5
10
15
20
25
30
35
40
4.8
4.9
5.0
5.1
5.2
5.3
5.4
Applicable to all SIM6800 series
19SANKEN ELECTRIC CO., LTD.
SIM6800-AN
–25 25 75 150100 125500
TJ (°C)
–25 25 75 150100 125500
TJ (°C)
–25 25 75 150100 125500
TJ (°C)
VFO
H (V
)
FO Input Voltage (On) versus Junction Temperature
MAX
MINTYP
MAX
MIN
TYP
MAX
MIN
TYP
t FO
Del
ay (μ
s)V
SD
H (V
)
FO Input Filter Delay versus Junction Temperature
SD Input Voltage (On) versus Junction Temperature
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
VFO
(m
V)
FO Output* Voltage versus Junction TemperatureVFO pulled up to 5 V, RFO = 3.3 kΩ. FO = VFOL
Note: FO is both an input pin and an Output pin
0
0.5
1.0
1.5
2.0
2.5
–25 25 75 150100 125500
TJ (°C)
VFO
L (V
)
FO Intput Voltage (Off) versus Junction Temperature
MAX
MIN
TYP
0
0.5
1.0
1.5
2.0
2.5
0
1
2
3
4
5
6
0
100
200
300
400
500
2.0
2.4
2.8
3.2
3.6
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
VS
DL
(V)
SD Input Voltage (Off) versus Junction Temperature
1.0
1.4
1.8
2.2
2.6
Applicable to all SIM6800 series
20SANKEN ELECTRIC CO., LTD.
SIM6800-AN
I INH
(μA
)
SD Input Current versus Junction TemperatureVSD = 5 V
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
–25 25 75 150100 125500
TJ (°C)
MAX
MIN
TYP
t SD
(FIlt
er) (μs
)
SD Input Filter Delay versus Junction Temperature
0
1
2
3
4
5
0
1
2
3
4
5
6
7
8
9
Applicable to all SIM6800 series
21SANKEN ELECTRIC CO., LTD.
SIM6800-AN
SIM6812M MOSFET Characteristics
6.0
5.0
4.0
3.0
2.0
1.0
0
2.5
2.0
1.5
1.0
0.5
0
0 0.4 0.6 0.80.2 1.0 1.41.2
VSD (V)
RD
S(o
n) (Ω
)
I SD
(A)
SIM6812MMOSFET On-Resistance versus Drain Current
VGS = 15 V
TJ = 125°C
TJ = 75°C
TJ = 25°C
TJ = 125°C
TJ = 75°C
TJ = 25°C
SIM6812MMOSFET Source to Drain Current versus Voltage
VGS = 0 V
0 1.5 2.52.01.00.5
ID (A)
0
50
100
150
200
250
0.0 0.5 1.0 1.5 2.0 2.5
E (u
J)
ID (A)
SWloss- ID(Tc=25°C)
Eon(High side)
Eoff(High side)
Eon(Low side)
Eoff(Low side)
VBB=300V, VCC=15V
0
50
100
150
200
250
300
0.0 0.5 1.0 1.5 2.0 2.5
E (u
J)
ID (A)
SWloss- ID(Tc=125°C)
Eon(High side)
Eoff(High side)
Eon(Low side)
Eoff(Low side)
VBB=300V, VCC=15V
0
5
10
15
20
0 0.5 1 1.5 2 2.5
E (u
J)
ID (A)
Recoveryloss - ID(Tc=25°C)
Highside
Lowside
VBB=300V, VCC=15V
0
5
10
15
20
0 0.5 1 1.5 2 2.5
E (u
J)
ID (A)
Recoveryloss - ID(Tc=125°C)
Highside
Lowside
VBB=300V, VCC=15V
Switching Loss versus Drain CurrentTC = 25°C, VBB = 300 V, VCC = 15 V
Recovery Loss versus Drain CurrentTC = 25°C, VBB = 300 V, VCC = 15 V
Switching Loss versus Drain CurrentTC = 125°C, VBB = 300 V, VCC = 15 V
Recovery Loss versus Drain CurrentTC = 125°C, VBB = 300 V, VCC = 15 V
MOSFET On-Resistance versus Drain CurrentVGS = 15 V
MOSFET On-Resistance versus Drain CurrentVGS = 0 V
22SANKEN ELECTRIC CO., LTD.
SIM6800-AN
SIM6813M MOSFET Characteristics
0
50
100
150
200
250
300
0.0 0.5 1.0 1.5 2.0 2.5 3.0
E (u
J)
ID (A)
SWloss- ID(Tc=25°C)
Eon(High side)Eoff(High side)Eon(Low side)Eoff(Low side)
VBB=300V, VCC=15V
0
50
100
150
200
250
300
0.0 0.5 1.0 1.5 2.0 2.5 3.0
E (u
J)
ID (A)
SWloss- ID(Tc=125°C)
Eon(High side)
Eoff(High side)
Eon(Low side)
Eoff(Low side)
VBB=300V, VCC=15V
0
5
10
15
20
25
0 0.5 1 1.5 2 2.5 3
E (u
J)
ID (A)
Recoveryloss - ID(Tc=25°C)
Highside
Lowside
VBB=300V, VCC=15V
0
5
10
15
20
25
0 0.5 1 1.5 2 2.5 3
E (u
J)
ID (A)
Recoveryloss - ID(Tc=125°C)
Highside
Lowside
VBB=300V, VCC=15V
3.0
2.5
2.0
1.5
1.0
0.5
0
0 1.5 3.02.52.01.00.5
ID (A)
0 0.4 0.6 0.80.2 1.0 1.2
VSD (V)
I SD
(A)
SIM6813MMOSFET On-Resistance versus Drain Current
VGS = 15 V
TJ = 125°C
TJ = 75°C
TJ = 25°C
TJ = 125°C
TJ = 75°C
TJ = 25°C
SIM6813MMOSFET Source to Drain Current versus Voltage
VGS = 0 V4.54.03.53.02.52.01.51.00.5
0
RD
S(o
n) (Ω
)
Switching Loss versus Drain CurrentTC = 25°C, VBB = 300 V, VCC = 15 V
Recovery Loss versus Drain CurrentTC = 25°C, VBB = 300 V, VCC = 15 V
Switching Loss versus Drain CurrentTC = 125°C, VBB = 300 V, VCC = 15 V
Recovery Loss versus Drain CurrentTC = 125°C, VBB = 300 V, VCC = 15 V
MOSFET On-Resistance versus Drain CurrentVGS = 15 V
MOSFET On-Resistance versus Drain CurrentVGS = 0 V
23SANKEN ELECTRIC CO., LTD.
SIM6800-AN
SIM6822 IGBT Characteristics
2.01.81.61.41.21.00.80.60.40.2
0
5.04.54.03.53.02.52.01.51.00.5
0
0 2.0 5.04.03.01.0
IC (A)
0 0.5 1.0 1.5 2.0 2.5
Vf (V)
VC
E(s
at) (
V)
I f (A
)
SIM6822MIGBT Saturation Voltage versus Collector Current
VGS = 15 V
TJ = 125°C
TJ = 75°CTJ = 25°C
TJ = 125°C
TJ = 75°C
TJ = 25°C
SIM6822MIGBT Diode Forward Current versus Forward Voltage
VGS = 0 V
0
50
100
150
200
250
0 1 2 3 4 5
E (u
J)
ID (A)
SWloss- ID(Tc=25�)
Eon(High side)
Eoff(High side)
Eon(Low side)
Eoff(Low side)
VBB=300V, VCC=15V
0
50
100
150
200
250
0.0 1.0 2.0 3.0 4.0 5.0
E (u
J)
ID (A)
SWloss- ID(Tc=125ff)
Eon(High side)
Eoff(High side)
Eon(Low side)
Eoff(Low side)
VBB=300V, VCC=15V
0
5
10
15
20
0 1 2 3 4 5
E (u
J)
ID (A)
Recoveryloss - ID(Tc=25ff)
Highside
Lowside
VBB=300V, VCC=15V
0
5
10
15
20
0 1 2 3 4 5
E (u
J)
ID (A)
Recoveryloss - ID(Tc=125ff)
Highside
Lowside
VBB=300V, VCC=15V
Switching Loss versus Drain CurrentTC = 25°C, VBB = 300 V, VCC = 15 V
Recovery Loss versus Drain CurrentTC = 25°C, VBB = 300 V, VCC = 15 V
Switching Loss versus Drain CurrentTC = 125°C, VBB = 300 V, VCC = 15 V
Recovery Loss versus Drain CurrentTC = 125°C, VBB = 300 V, VCC = 15 V
MOSFET On-Resistance versus Drain CurrentVGS = 15 V
MOSFET On-Resistance versus Drain CurrentVGS = 0 V
24SANKEN ELECTRIC CO., LTD.
SIM6800-AN
SIM6827M IGBT Characteristics
2.01.81.61.41.21.00.80.60.40.2
0
5.04.54.03.53.02.52.01.51.00.5
0
0 2.0 5.04.03.01.0
IC (A)
0 0.5 1.0 1.5 2.0 2.5
Vf (V)
VC
E(s
at) (
V)
I f (A
)
SIM6827MIGBT Saturation Voltage versus Collector Current
VGS = 15 V
TJ = 125°C
TJ = 75°CTJ = 25°C
TJ = 125°C
TJ = 25°C
SIM6827MIGBT Diode Forward Current versus Forward Voltage
VGS = 0 V
TJ = 75°C
0
100
200
300
400
500
0 1 2 3 4 5
E (u
J)
ID (A)
SWloss- ID(Tc=25�)
Eon(High side)
Eoff(High side)
Eon(Low side)
Eoff(Low side)
VBB=300V, VCC=15V
0
100
200
300
400
500
0.0 1.0 2.0 3.0 4.0 5.0
E (u
J)
ID (A)
SWloss- ID(Tc=125ff)
Eon(High side)
Eoff(High side)
Eon(Low side)
Eoff(Low side)
VBB=300V, VCC=15V
0
2
4
6
8
10
0 1 2 3 4 5
E (u
J)
ID (A)
Recoveryloss - ID(Tc=25ff)
Highside
Lowside
VBB=300V, VCC=15V
0
2
4
6
8
10
0 1 2 3 4 5
E (u
J)
ID (A)
Recoveryloss - ID(Tc=125ff)
Highside
Lowside
VBB=300V, VCC=15V
Switching Loss versus Drain CurrentTC = 25°C, VBB = 300 V, VCC = 15 V
Recovery Loss versus Drain CurrentTC = 25°C, VBB = 300 V, VCC = 15 V
Switching Loss versus Drain CurrentTC = 125°C, VBB = 300 V, VCC = 15 V
Recovery Loss versus Drain CurrentTC = 125°C, VBB = 300 V, VCC = 15 V
MOSFET On-Resistance versus Drain CurrentVGS = 15 V
MOSFET On-Resistance versus Drain CurrentVGS = 0 V
25SANKEN ELECTRIC CO., LTD.
SIM6800-AN
Sanken reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be re quired to per mit im prove ments in the per for mance, reliability, or manufacturability of its prod ucts. Therefore, the user is cau tioned to verify that the in for ma tion in this publication is current before placing any order.
When using the products described herein, the ap pli ca bil i ty and suit abil i ty of such products for the intended purpose shall be reviewed at the users responsibility.
Although Sanken undertakes to enhance the quality and reliability of its prod ucts, the occurrence of failure and defect of semi con duc tor products at a certain rate is in ev i ta ble.
Users of Sanken products are requested to take, at their own risk, preventative measures including safety design of the equipment or systems against any possible injury, death, fires or damages to society due to device failure or malfunction.
Sanken products listed in this publication are designed and intended for use as components in general-purpose electronic equip ment or apparatus (home ap pli anc es, office equipment, tele com mu ni ca tion equipment, measuring equipment, etc.). Their use in any application requiring radiation hardness assurance (e.g., aero space equipment) is not supported.
When considering the use of Sanken products in ap pli ca tions where higher reliability is re quired (transportation equipment and its control systems or equip ment, fire- or burglar-alarm systems, various safety devices, etc.), contact a company sales representative to discuss and obtain written confirmation of your spec i fi ca tions.
The use of Sanken products without the written consent of Sanken in applications where ex treme ly high reliability is required (aerospace equip-ment, nuclear power-control stations, life-support systems, etc.) is strictly prohibited.
The information in clud ed herein is believed to be accurate and reliable. Ap pli ca tion and operation examples described in this pub li ca tion are given for reference only and Sanken assumes no re spon si bil i ty for any in fringe ment of in dus tri al property rights, intellectual property rights, or any other rights of Sanken or any third party that may result from its use. The contents in this document must not be transcribed or copied without Sanken’s written consent.