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John vonNeumann
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born in Budapest, Hungary on December 28,1903
renowned mathematician and computer scientistwho played an important role in computing
technologywrote a report on the stored program concept,known as the First Draft of a Report on EDVAC
died on February 8, 1957, after he was
diagnosed with cancer, he was 54 years old
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The Von-Neumann Machine
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Von Neumann Model
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MEMORY
CONTROL UNIT
MAR MDR
IR
PROCESSING UNIT
ALU TEMP
PC
OUTPUTMonitor
Printer
LED
Disk
INPUTKeyboard
Mouse
Scanner
Disk
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Memory
Basic Operations:
LOAD
read a value from a memorylocation
STORE
write a value to a memorylocation
Interface to Memory:
MAR-Memory AddressRegister
MDR-Memory Data Register
Processing Unit
Functional Units
ALU = Arithmetic and Logic Unit
performs the arithmetic operations
such as addition, subtraction,
multiplication and division, and the
logical operations
Registers
Small, temporary storage
has eight registers (R0, , R7),
each 16 bits wide Word Size
number of bits normally processed
by ALU in one instruction
also width of registers
16 bits
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Input and OutputDevices for getting data into andout of computer memory
Each device has its own interface,usually a set of registers like thememorys MAR and MDR
Some devices provide both inputand output
disk, network
Program that controls access to adevice is usually called a driver.
Control Unitorganize execution of the program
Instruction Register (IR)
- contains the current instruction
Program Counter (PC)
- contains the address of the nextinstruction to be executed
Control unit:
reads an instruction from memory
the instructions address is in the
PC interprets the instruction, generating
signals that tell the other componentswhat to do
an instruction may take manymachine cycles to complete
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The Stored Program Concept
The stored program concept says
that the program is stored with datain the computers memory. Thecomputer is able to manipulate it as
datafor example, to load it fromdisk, move it in memory, and store itback on disk.
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Stored-Program concept
Main memory stores both data and instructions
Arithmetic and logic unit (ALU) capable of operatingon binary data
Control unit, which interprets and executes the
instructions in memory
Input and output (I/O) equipment operated by thecontrol unit
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Early stored-program Computers
SEACStandards Eastern Autom
atic Computer
first-generationelectronic computer, built
in 1950 by
the U.S. National Bureau
Of Standards
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Manchester Mark1
one of the earliest stored
computer program,
developed from the SmallScale Experimental
machine
(SSEM) or
Baby(operational inJune 1948)
Manchester Automatic
Digital Machine or MADM
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SWAC
Standards Western
Automatic Computer
it was the fastest
computer in the world
until the IAS computer
was completed
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Von Neumann Architecture
All computers more or less based on the samebasic design, the Von Neumann Architecture
Model for designing and building computers,
based on the following three characteristics:1) The computer consists of four main sub-systems:
Memory
ALU (Arithmetic/Logic Unit)
Control Unit
Input/output System (I/O)
2) Program is stored in memory during execution
3) Program instructions are executed sequentially
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von Neumannvon Neumann
ArchitectureArchitecture
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The General and Expanded
Structure ofIAS Computer
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The IAS operates by repetitively performingan instruction cycle. Each instruction cycleconsists of two sub cycles.
a) Fetch cycle: the opcode of the nextinstruction is loaded into the IR and theaddress portion is loaded into the MAR
b) Execute cycle: the control circuitry interpretsthe opcode and executes the instruction bysending out the appropriate control signalsto cause data to be moved or an operationto be performed by the ALU
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MBR (Memory Buffer Register) -contains a word to be stored in memory oris sued to receive from memory
MAR (Memory Address Register) -specifies the address in memory of theword to be written from or read into the MBR
IR (Instruction Register) -contains the 8-bit op-code instruction beingexecuted
IBR (Instruction Buffer Register) -employed to hold temporarily the right-hand instructions from a word in memory
PC (Program Counter) -contains the address of the next instruction-pair tobe fetched from memory
AC and MQ (Accumulator and Multiplier Quotient) -employed to holdtemporarily operands and results of ALU operations
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Early IAS Computers
MANIACMathematical Analyzer, Num
rical Integrator, and Computer
or Mathematical
Analyzer, Numerator, Integrator, and Computer
early computer builtunder the directionofNicholas Metropolis
based on the vonN
eumann architecture ofthe IAS
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AVIDAC
Argonne Version of
the Institute's Digital Autom
atic
Computer
built by Argonne National
Laboratory
used in reactorengineering and
theoretical physics
research
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MISTIC
Michigan State Integral
Computer
Michigan State
University's first computer
consistof five sections -
input, memory, arithmetic
processing, control, andoutput
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Instruction Cycle
Fetch Instruction
Start
Execute
Instruction
Instruction cycle =
Fetch cycle + Execution cycleThe basic function performed by a computer
is program execution.
The program (to be executed) consists of a
set of instructions stored in memory
Instruction processing consists of two steps.
a) Fetch Cycle:
Processor reads (fetches) instruction from
memory one at a time is called "fetch cycle"
b)Execution Cycle:
Execution of a fetched instruction is called
"execution cycle"
All instructions and data are contained in
main memory
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Fetch Cycle
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Execute CycleProcessor-memory
data transfer between CPUand main memory
Processor I/O
Data transfer between
CPU and I/O moduleData processing
Some arithmetic or logicaloperation on data
Control
Alteration of sequence ofoperations
e.g. jump
Combination of above
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Interrupt Cycle
Interrupts
interrupt the normal
processing of the
processorInterrupts are providedfor improving theprocessing efficiency
Most external devicesare much slower thanthe processor.
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Classes ofInterrupts
Program interruptsInterrupt generated by some condition that occurs as a result of aninstruction execution. E.g., Arithmetic overflow, division by zero, etc..
Timer interrupts
This allows the operating system to perform certain functions on a regularbasis. E.g., Automatic saving of a document after certain time period.
I/O interruptsGenerated by an I/O controller to signal normal completion of an operationor to signal a variety of error conditions.
Hardware failure interruptsHardware failure interrupts will occur due to power failure, memory parity-error, etc.
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Interrupt Cycle
Added to instruction cycle
Processor checks for interrupt
Indicated by an interrupt signal
If no interrupt, fetch next instruction
If interrupt pending: Suspend execution of current program
Save context
Set PC to start address of interrupt handler routine
Process interrupt
Restore context and continue interrupted program
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Instruction Cycle - State Diagram
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Multiple Interrupts
Disable interrupts Processor will ignore further interrupts whilst
processing one interrupt
Interrupts remain pending and are checked afterfirst interrupt has been processed
Interrupts handled in sequence as they occur
Define priorities Low priority interrupts can be interrupted by
higher priority interrupts When higher priority interrupt has been
processed, processor returns to previous interrupt
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Multiple Interrupts - Sequential
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Multiple Interrupts Nested
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ComputerArchitecture &
Organization
Architecture -attributes visible to the
programmer
_Instruction set, number of bits usedfor data representation, I/O mechanisms,
addressing techniques, etc.
Organization-how features are
implemented
_Control signals, interfaces, memory
technology, etc.
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microprocessor vs. microcontroller
microprocessor
the heart of any normal
computer
also known as a CPU --is
a complete computation
engine that is fabricated on
asingle chip
The first microprocessor
was the Intel 4004,
introduced
microcontroller
is "special purpose
computers
is "embedded" inside
some
other device, dedicated to
one task and run one specific
Program, low-power devices,
dedicated input device and
often (but not always) has a
small LED or LCD display for
out ut
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Make everything as simple as
possible, but not simpler.
Albert Einstein
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