PERFORMANCE BENCHMARKING OF RVC BASED MULTIMEDIA SPECIFICATIONSJunaid Jameel Ahmad1,3, Shujun Li2, Marco Mattavelli3

{Junaid.Ahmad, Marco.Mattavelli}@epfl.ch, Shujun.Li@surrey.ac.uk1 University of Konstanz, Germany, 2 University of Surrey, UK, 3 Ecole Polytechnique Federale de Lausanne (EPFL), Switzerland

Financial Statements2009/10

Quick Questions and Answers

1. What is RVC (Reconfigurable Video Coding)?A dataflow programming framework standardized by ISO/IEC since 2009.

• ISO/IEC 23001-4 (MPEG-B Part 4), 2009 (1st Edition), 2011 (2nd Edi-tion) describes how to specify video codecs using three languages –RVC-CAL, FNL and RVC-BSDL.

• ISO/IEC 23002-4 (MPEG-C Part 4), 2010 (1st Edition) describes a li-brary of common tools used in MPEG video codecs.

2. What is an RVC specification?An implementation-agnostic description of a system specified by RVC.

3. What have you done in this work?We report performance benchmarking results of RVC-based C imple-mentations of an H.264/AVC intra codec and a JPEG codec and fourmultimedia security systems working with them.

4. How did you benchmark the performance of the RVC systems?By presenting a side-by-side comparison of the RVC-based implementa-tions against non-RVC reference implementations.

5. What are the main results you observed?

•RVC implementations have a performance similar to non-RVC ones.•On a dual-core machine we observed a performance gain up to 173%.

1. How does RVC work?

Development Environment: + Open RVC-CAL Compiler

Design Stage

Model Instantiation: Selection of FUs and

Parameter Assignment

Abstract Model(FNL + RVC CAL)

Tool Library 1(RVC-CAL Functional

Units (FUs))

Application Description(FU Network Description)Graphical FU

network editor, RVC-CAL editor, RVC simulator

Implementation Stage

(FNL + RVC-CAL)Tool Library 2

(RVC-CAL Functional Units FUs)

RVC simulator

Application ImplementationAutomatic code generation

to C/C++, Java, LLVM, VHDL/Verilog etc.

Tool Library 1 Implementation

Tool Library 2Implementation

Code generation tools

Input Data Application Solution Output Data

2. Benchmarked Systems

•RVC-based C implementations: specified manually in RVC by the RVCcommunity and C code automatically generated from the RVC specifica-tions by ORCC’s CAL2C backend.

•Non-RVC C implementations: JM (for H.264/AVC) and IJG (for JPEG),C code manually written/optimized/maintained.

Sign-bit encryption & decryption

3: JVEE & JVDD DC encryption & d i1

H.264/AVC codec

& decryption

2

4: JIEE & JIDD

6: JISE & JISDF5 steganographic

5: JIWE & JIWDDCT-based watermark

5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD5: JIWE & JIWD

2

JPEG codec

F5 steganographicembedder & detectorF5 steganographic

embedder & detectorDCT based watermark embedder & detector

3. Experimental Results

3.1 Run-time performance on a single-core machineH.264/AVC

JM−Encoder RVC−Encoder JM−JVEE RVC−JVEE0

50

100

150

H.264/AVC Implementations

Tim

e (s

econ

ds)

Foreman (QCIF) Highway (QCIF) Suzie (QCIF)

H.264/AVC based encoding implementations

JM−Decoder RVC−Decoder JM−JVDD RVC−JVDD0

0.5

1

1.5

2

2.5

H.264/AVC Implementations

Tim

e (s

econ

ds)

Foreman (QCIF) Highway (QCIF) Suzie (QCIF)

H.264/AVC based decoding implementations

Test Video JM-JVEE JM-JVDD RVC-JVEE RVC-JVDD

Foreman 0.16% 2.77% 6.01% 6.73%

Highway 0.18% 2.41% 1.98% 6.55%

Suzie 0.17% 2.54% 2.25% 6.97%

0.16%

0.18%

0.17%

6.01%

1.98%

2.25%

2.77%

2.41%

2.54%

6.73%

6.55%

6.97%

Overheads of sign-bit encryption module

•RVC-based encoding implementa-tions are (> 100%) faster.

•RVC-based decoding implementa-tions are comparable to JM ones.

•RVC implementations suffer moreencryption/decryption overhead.

JPEG

IJG−Encoder RVC−Encoder IJG−JIEE RVC−JIWE IJG−JISE RVC−JISE0

50

100

150

200

250

300

350

RVC−JIEE IJG−JIWE JPEG Implementations

Tim

e (m

illis

econ

ds)

airplane (512x512) Lena (512x512) yacht (512x480)

JPEG based encoding implementations

IJG−Decoder RVC−Decoder IJG−JIDD RVC−JIWD IJG−JISD RVC−JISD0

50

100

150

RVC−JIDD IJG−JIWD JPEG Implementations

Tim

e (m

illis

econ

ds)

airplane (512x512) Lena (512x512) yacht (512x480)

JPEG based decoding implementations

Test Image JIEE JIDD JIWE JIWD JISE JISD

RVC

airplane 7.02% 20.13% 13.67% 15.73% 26.46% 44.11%

Lena 6.06% 20.00% 5.60% 15.13% 24.50% 43.85%

Pepper 6.00% 21.59% 4.91% 14.09% 22.52% 43.52%

IJG

airplane 11.25% 11.55% 15.84% 18.50% 26.08% 31.12%

Lena 9.28% 12.50% 14.80% 17.66% 23.52% 30.11%

Pepper 11.13% 15.01% 16.85% 21.98% 27.77% 34.39%

7.02%

6.06%

6.00%

11.25%

9.28%

11.13%

13.67%

5.60%

4.91%

15.84%

14.80%

16.85%

26.46%

24.50%

22.52%

26.08%

23.52%

27.77%

20.13%

20.00%

21.59%

15.73%

15.13%

14.09%

44.11%

43.85%

43.52%

11.55%

12.50%

15.01%

18.50%

17.66%

21.98%

31.12%

30.11%

34.39%

Overheads of security modules

•RVC-based implementations areslower.

• JISE/JISD have the highest over-head due to image buffering.

3.2 Performance gain on a dual-core machine

Encoder JVDD100

110

120

130

140

150

160

170

180

JVEE Decoder H.264/AVC Implementations

Per

form

ance

Gai

n (%

)

Foreman (QCIF)Highway (QCIF)Suzie (QCIF)

Encoder JIEE JIWE JIDD JIWD JISD90

100

110

120

130

140

150

160

170

JISE Decoder JPEG Implementations

Per

form

ance

Gai

n (%

)

airplane (512x512)Lena (512x512)yacht (512x480)

Performance gain of H.264/AVC im-plementations:•Encoding implementations: 159% –

173%.•Decoding implementations: 110% –

119%.

Performance gain of JPEGimplementations:•Encoding implementations:

142% – 164%.•Decoding implementations:

127% – 148%.

ICIP 2013 – 20th IEEE International Conference on Image Processing, Melbourne, Australia, September 15-18, 2013.