Sanjeev Kumar, Lead Engineer, SrQualcomm India Private Limited

Purva Joshi, EngineerQualcomm India Private Limited

Ritesh Jain, Engineer, Sr Staff/ManagerQualcomm India Private Limited

MIPI-SPMISM 1.0 Multi-master Verification

©2017MIPIAlliance,Inc.

Agenda• MIPI-SPMI– AnIntroduction• MIPI-SPMIMulti-masterVerificationArchitecture• VerificationChallengesandtheirSolutions• ConclusionsandReferences

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©2017MIPIAlliance,Inc.

MIPI-SPMI– AnIntroduction• SPMI (System Power Management Interface):

– 2-wire serial interface– Supports up-to 4 masters and 16 slaves– Connects the integrated Power Controller (PC) of a System-on-Chip (SoC)

processor system with one or more Power Management IntegratedCircuits (PMIC) voltage regulation systems

• Within PC, SPMI-related functions are referred to as “Master”.• Within PMIC, SPMI related functions are referred to as “Slave”.

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©2017MIPIAlliance,Inc.

MIPI-SPMI– AnIntroduction

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©2017MIPIAlliance,Inc.

MIPI-SPMIMulti-masterVerificationArchitecture

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©2017MIPIAlliance,Inc.

VerificationChallengesandtheirSolutions• Multiplemasterswakingupatthesametimeandtryingtoconnect

– NoRCSrequest– PendingRCSrequest

• Secondmastertryingtoconnectwhenonemasterisalreadypresent– SSCDetection– BusIdle– BusArbitration

• Multiplemastersandslavesarbitratingwithdifferentprioritylevels– A-bitandSR-bitforslaves;priorityandsecondaryMPLsformasters

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©2017MIPIAlliance,Inc.

VerificationChallengesandtheirSolutions• BOM(BusOwnerMaster)transfer,i.e.SCLKHandover• Disconnectionofamaster

– UsingTBOcommand– Duringcommandparityerror

• Noiseduring– BusIdle– MasterArbitration– SlaveArbitration

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©2017MIPIAlliance,Inc.

Multiplemasterswakingupatthesametimeandtryingtoconnect

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©2017MIPIAlliance,Inc.

Secondmastertryingtoconnectwhenonemasterisalreadypresent

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©2017MIPIAlliance,Inc.

MultiplemastersandslavesarbitratingwithdifferentprioritylevelsandBOM(BusOwnerMaster)transfer

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©2017MIPIAlliance,Inc.

Disconnectionofamaster

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©2017MIPIAlliance,Inc.

NoiseonSDATAbus

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©2017MIPIAlliance,Inc.

ConclusionsandReferences• MIPI-SPMIprotocolplaysavitalroleinreducingthenumberofpin

connectionsinachipsetasitsupportmulti-masterandmulti-slavesystemsandvarioustypesofdatapathcommands.

• Therearecertainareaswhichneedssomeimprovement.SomeofthemhasbeenaddressedinMIPI-SPMIspecver.2.0.Somemoreareyettobetakencareassuggestedbyusinthispresentation.

• Reference:MIPI®AllianceSpecificationforSystemPowerManagementInterface(SPMI)- Version1.0– 27October2008

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