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July 2013
2013 Fairchild Semiconductor Corporation www.f airchildsemi.com
FAN7340 1.0.1
FAN7340L
ED
BacklightDrivingB
oostSwitch
FAN7340LED Backlight Driving Boost SwitchFeatures
Single-Channel Boost LED Switch Internal Power MOSFET for PWM Dimming:
RDS(on)= 3.4 at VGS=10 V, BVDSS=400 V
Current Mode PWM Control Internal Programmable Slope Compensation Wide Supply Voltage Range: 10 V to 35 V LED Current Regulation:1%
Programmable Switching Frequency Analog and PWM Dimming Wide Dimming Ratio: On Time=10 s to DC Cycle-by-Cycle Current Limiting Thermal Shutdown: 150C Open-LED Protection (OLP) Over-Voltage Protection (OVP) Over-Current Protection (OCP) Error Flag Generation (for External Load Switch) Internal Soft-Start 16-Lead SOIC Package
Applications LED Backlight for LCD TV LED Backlight for LCD Monitor LED Lighting
Description
The FAN7340 is a single-channel boost controller thatintegrates an N-channel power MOSFET for PWMdimming using Fairchilds proprietary planar Double-diffused MOS (DMOS) technology.
The IC operates as a constant-current source for drivinghigh-current LEDs.
It uses Current Mode control with programmable slopecompensation to prevent subharmonic oscillation. The IC
provides protections including: open-LED protection,over-voltage protection, and direct-short protection forhigh s ystem reliability.
The IC internally generates a FAULT signal with delay ifan abnormal LED string condition occurs. PWM dimmingand analog dimming functions can be implementedindependently. Internal soft-start prevents inrush currentflowing into output capacitor at startup.
Ordering Information
Part NumberOperating
TemperatureRange
PackagePackaging
Method
FAN7340MX -40C to +125C 16-Lead, Small-Outline Integrated Circuit (SOIC) Tape & Reel
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Block Diagram
+
-
+
-R
SQ
Gate
DriverCMP
ADIM
DRV
GND
CS
BDIM
TSD
16 Steps
Internal Soft-Start
1/4gm
OCP
+
-
VCC
5V, max. 3mA
UVLO 9V
Voltage Reference
& Internal Bias
Hys. 1.0V
-
+
Current
Sense
Drain
SEN
PWM
PWM
Current
Sense
3VOVP
OVP 100mV
20s Delay
ADIM*4
1.4~4V
1s
Delay
BDIM
OLPi
0.2V
PWM
5s Delay
PWM
REF
0 3~3V
Slope
Compensation
CLK+LEB
45A
-
+
0.5V
5k
Switch Off
-
+
Burst
Operation
100mV
0.5V
4V
3ms at 200kHz
POR
640s at 200kHz
Auto-Restart
S
R
Q
Dim off
Dim off
RTOscillator
OLPi
ENA
-
+
1.22V
40 96ms
at 200kHz
Debounce
Time
OLP
OLP
FAULT
Hys. 70mV
End of Soft-Start
Figure 1. Internal Block Diagram
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Pin Assignments
FPXYTT
FAN7340
1
2
3
4
5
6
7
8
16
15
14
13
12
10
9
OVP
DRAIN
VCC
FAULT
ENA
CS
RT
DRAIN
DRV ADIM
CMP
SENSE
GND
REF
BDIM
Figure 2. Package Diagram
Pin Definitions
Pin # Name Description
1 VCC This pin is the supply voltage of the IC.
2 DRV This pin is the gate drive signal of the boost switch.
3 GND This pin is the ground of the IC.
4 CS
This pin is for sensing the current flowing through an external MOSFET. It includes a built-in300 ns blanking time. The peak of the current flowing through the MOSFET is limited to thispin voltage. Slope compensation of the boost controller can be programmed through theseries resistor of this pin.
5 REF This pin is the 5 V reference voltage pin. Maximum current capability is 3 mA.
6 FAULTThis pin is for indicating the fault s ignal. This pin is connected to the open drain. When OLPprotection is occurred, the FAULT pin is pulled HIGH.
7 RT Oscillator frequency set of the boost switch (50 kHz ~ 300 kHz).
8 SENSEThis pin is for sensing the current flowing through the LEDs. A sensing resistor is connectedfrom this pin to ground. This pin is connected to the negative input of the internal erroramplifier.
9, 10 DRAIN Drain pin of PWM dimming power MOSFET.
12 ENAEnable input pin. If voltage of this pin is higher than 1.22 V, IC is s tarting to operate. If thevoltage of this pin is lower than 1.15 V, the IC stops operating.
13 OVPOver-voltage protection input pin. Output voltage of the boost circuit is connected to this pin
through a resistor divider circuit. If this pin voltage is higher than 3 V, OVP is triggered.
14 CMPThis pin is the error amplifier output. Typical ly, a compensation capacitor and resistor areconnected to this pin from the ground.
15 ADIMThis pin is for setting the current flowing through the LEDs. This pin is connected to thepositive inputs of the internal error amplifier. Linear voltage range of ADIM is 0.3 V~3.0 V.
16 BDIMThis pin is for the burst dimming signal. If this pin voltage is HIGH, the internal dimmingMOSFET is turned on. If this pin voltage is LOW, the dimming MOSFET is turned off.
Note:1. Pin 11 is a No Connectpin (not shown inFigure 2).
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Absolute Maximum RatingsStresses exceeding the absolute maximum ratings may damage the device. The device may not function or beoperable above the recommended operating conditions and stressing the parts to these levels is not recommended. Inaddition, extended exposure to s tresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. TA=25C unless otherwise specified.
Symbol Parameter Min. Max. Unit
VCC Supply Voltage 10 35 V
TA Operating Temperature Range -40 +125 C
TJ Junction Temperature +150 C
TSTG Storage Temperature Range -65 +150 C
JA Thermal Resistance Junction-to-Ambient(2, 3)
120 C/W
PD Power Dissipation 0.9 W
Notes:2. Thermal resistance test board; size 76.2 mm x 114.3 mm x 1.6 mm (1S0P); JEDEC standard: JESD51-2, JESD51-
3.3. Ass ume no ambient airflow.
Pin Breakdown Voltage
Pin # Name Value Unit Pin # Name Value Unit
1 VCC 35 V 9 DRAIN 400 V
2 DRV 20 V 10 DRAIN 400 V
3 GND V 11 N/A V
4 CS 6 V 12 ENA 6 V
5 REF 6 V 13 OVP 6 V
6 FAULT 35 V 14 CMP 6 V
7 RT 6 V 15 ADIM 6 V
8 SENSE 6 V 16 BDIM 6 V
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Electrical Characteristics
For typical values, TA = 25C and VCC = 15 V unless otherwise specified. Specifications to -40C ~ 125C areguaranteed by design based on final characterization results .
Symbol Parameter Condition Min. Typ. Max. Unit
Supply Voltage Section
VCC Input DC Supply Voltage Range(4)
10 35 V
ISD Shutdown Mode Supply Current BDIM Connected to GND 2 4 mA
Under-Voltage Lockout Section
Vth Start Threshold Voltage 8.3 9.0 9.7 V
Vth,hys Start Threshold Voltage Hysteresis 0.5 1.0 1.5 V
Ist Standby Current VCC=Vth-0.2 200 300 A
ON/OFF Section
Von On-State Input Voltage 2 5 V
Voff Off-State Input Voltage 0.8 V
Error Amplifier Section
Gm Error Amplifier Transconductance(4)
VADIM=1 V 100 300 500 mho
AV_ro Error Amplifier Output impedance(4) 20 M
AV Error Amplifier Open-Loop Gain(4)
60 dB
Voffset Input Offset Voltage VADIM=1 V -10 10 mV
Isin CMP Sink Current VADIM=1 V, VSENSE=2 V 100 200 300 A
Isur CMP Source Current VADIM=1 V, VSENSE=0 V 100 200 300 A
VIDR Input Differential Voltage Range 0 3 V
VO Output Voltage Range 0.7 4.0 V
Oscillator Section
fosc Boost Oscillator Frequency
Min. 50 kHz
RT=100 k 190 200 210 kHz
Max. 300 kHz
Dmax Maximum Duty Cycle(4)
86 90 94 %
Reference Section
VREF 5V Regulation Voltage 4.9 5.0 5.1 V
VREF,Line 5V Line Regulation 25 mV
VREF,Load 5V Load Regulation 0
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Electrical Characteristics (Continued)
For typical values, TA = 25C and VCC = 15 V, unless otherwise specified. Specifications to -25C ~ 85C areguaranteed by design based on final characterization results .
Symbol Parameter Condition Min. Typ. Max. Unit
Output Section (Boost / Dimming)
VDRV Gate Output Voltage VCC=15 V 10.8 11.8 12.8 V
Vuv Gate Output Voltage Before Startup -0.5 0.5 V
Idsur Gate Output Drive Source Current(4)
80 180 280 mA
Idsin Gate Output Drive Sink Current(4)
80 180 280 mA
trh Gate Output Ris ing Time (Boost)(4)
CL=2.0 nF 200 ns
tfl Gate Output Falling Time (Boost)(4)
CL=2.0 nF 120 ns
Current Sense Section
tblank Leading-Edge Blanking(4)
150 300 450 ns
tdelay,clDelay to Output of Current-LimitComparator
(4) 180 ns
Voffset,clc Offset Voltage of Current-LimitComparator
(4)
-20 20 mV
Slope Compensation Section
Islope Ramp Generator Current 36 45 54 A
Rslope Slope Compensation Resistor(4)
5 k
Soft-Start Section
tss Soft-Start Period(4)
fosc=200 kHz 3 ms
Protection Section
td,ovp.trDelay for Triggering Over- VoltageProtection
(4)
15 20 25 s
td,ovprDelay for Releasing Over-VoltageProtection
(4)
10 14 18 s
td.ocp Delay for Over-Current Protection
(4)
1 s
tARAuto-Res tart Time for Over-CurrentProtection
(4)
fosc=200 kHz 640 s
td,olpi Delay for Triggering Open-LED Protection(4)
3 5 7 s
td,ol p Delay for Open-LED Protection fosc=200 kHz 40.96 ms
Vth,ovp Over-Voltage Protection Threshold Voltage 2.85 3.00 3.15 V
Vhys,ovp Over-Voltage Protection Voltage Hysteresis 0.1 V
Vth.csocpBoost Switch Current Limit ThresholdVoltage
0.45 0.50 0.55 V
Vth,ocpLED Over-Current Protection ThresholdVoltage
1.4(Min.
Clamp)4.0xVADIM
4.0(Max.
Clamp)V
Vth,ol p Open-LED Protection Threshold Voltage (4) 0.15 0.20 0.25 V
TSD Thermal Shutdown Temperature(4)
140 150 160 C
THYS Thermal Shutdown Hysteresis(4)
20 C
Notes:4. These parameters, although guaranteed, are not tested in production.
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Typical Performance Characteristics
Figure 3.Start Threshold Voltage vs. Temperature Figure 4.Start Threshold Voltage Hysteresisvs. Temperature
Figure 5.Standby Current vs. Temperature Figure 6. Shutdown Mode Supply Current vs.Temperature
Figure 7.On-State Input Voltage vs. Temperature Figure 8.Off-State Input Voltage vs. Temperature
8.1
8.3
8.5
8.7
8.9
9.1
9.3
9.5
9.7
9.9
-50 -25 0 25 50 75 100 125
Vth,
[V]
Temperature, []
0.3
0.5
0.7
0.9
1.1
1.3
1.5
1.7
-50 -25 0 25 50 75 100 125
Vth.hys,
[V]
Temperature, []
50
100
150
200
250
300
350
-50 -25 0 25 50 75 100 125
Ist,[uA]
Temperature, []
0.5
1
1.5
2
2.5
3
3.5
4
4.5
-50 -25 0 25 50 75 100 125
ISD,[mA]
Temperature, []
1.05
1.1
1.15
1.2
1.25
1.3
1.35
1.4
-50 -25 0 25 50 75 100 125
Von,
[V]
Temperature, []
1
1.05
1.1
1.15
1.2
1.25
1.3
-50 -25 0 25 50 75 100 125
Voff,
[V]
Temperature, []
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Typical Performance Characteristics (Continued)
Figure 9.Error Amplifier Transconductancevs. Temperature
Figure 10.Input Offset Voltage vs. Temperature
Figure 11. CMP Sink Current vs. Temperature Figure 12. CMP Source Current vs. Temperature
Figure 13.Boost Oscillator Frequency vs. Temperature Figure 14. Maximum Duty Cycle vs. Temperature
0
100
200
300
400
500
600
-50 -25 0 25 50 75 100 125
Gm,
[umho]
Temperature, []
-14
-10
-6
-2
2
6
10
14
-50 -25 0 25 50 75 100 125
Voffset,[mV]
Temperature, []
50
100
150
200
250
300
350
-50 -25 0 25 50 75 100 125
Isin,[uA]
Temperature, []
50
100
150
200
250
300
350
-50 -25 0 25 50 75 100 125
Isur,[uA]
Temperature, []
185
190
195
200
205
210
215
-50 -25 0 25 50 75 100 125
fOSC,
[KHz]
Temperature, []
84
86
88
90
92
94
96
-50 -25 0 25 50 75 100 125
Dm
ax,
[%]
Temperature, []
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Typical Performance Characteristics (Continued)
Figure 15. 5V Regulation Voltage vs. Temperature Figure 16.PWM Dimming Input High Voltagevs. Temperature
Figure 17.PWM Dimming Input Low Voltagevs. Temperature
Figure 18.PWM Dimming Pull-Down Resistancevs. Temperature
Figure 19.Gate Output Voltage vs. Temperature Figure 20. Gate Output Drive Sink Currentvs. Temperature
4.85
4.9
4.95
5
5.05
5.1
5.15
-50 -25 0 25 50 75 100 125
VREF,[
V]
Temperature, []
1.2
1.3
1.4
1.5
1.6
1.7
1.8
-50 -25 0 25 50 75 100 125
VPDIM,H,[
V]
Temperature, []
1.1
1.2
1.3
1.4
1.5
1.6
1.7
-50 -25 0 25 50 75 100 125
VPDIM,L,[
V]
Temperature, []
80
100
120
140
160
180
200
220
240
-50 -25 0 25 50 75 100 125
RPDIM,[
Kohm]
Temperature, []
10.5
11
11.5
12
12.5
13
13.5
-50 -25 0 25 50 75 100 125
VDRV,
[V]
Temperature, []
50
100
150
200
250
300
-50 -25 0 25 50 75 100 125
I
dsin,[mA]
Temperature, []
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Typical Performance Characteristics (Continued)
Figure 21.Ramp Generator Current vs. Temperature Figure 22.Auto-Restart Time for OCPvs. Temperature
Figure 23.OVP Threshold Voltage vs. Temperature Figure 24. OVP Hysteresis Voltage vs. Temperature
Figure 25. Delay for Over-Current Protection vs. Temperature
35
39
43
47
51
55
-50 -25 0 25 50 75 100 125
Islope,[uA]
Temperature, []
0.45
0.5
0.55
0.6
0.65
0.7
0.75
0.8
0.85
-50 -25 0 25 50 75 100 125
tAR,[mS]
Temperature, []
2.8
2.85
2.9
2.95
3
3.05
3.1
3.15
3.2
-50 -25 0 25 50 75 100 125
Vth,ovp,[
V]
Temperature, []
0
0.04
0.08
0.12
0.16
0.2
-50 -25 0 25 50 75 100 125
Vhys,ovp,[
V]
Temperature, []
25
30
35
40
45
50
55
-50 -25 0 25 50 75 100 125
td,o
lp,[mS]
Temperature, []
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Functional Description
The FAN7340 operates as a constant-current source fordriving high-current LEDs. It uses Current-Mode controlwith programmable slope compensation to prevent sub-harmonic osci llation.
The IC provides protections such as open-LED
protection, over-voltage protection, and over-currentprotection for improved system reliability. The ICinternally generates a FAULT OUT signal with a delay incase an abnormal LED string condition occurs. PWMdimming and analog dimming functions can beimplemented independently. Internal soft-start preventsinrush current flowing into output capacitor at startup.Circuit operation is explained in the following sections.
VCCUnder-Voltage Lockout (UVLO)
An internal regulator provides the regulated 5 V used topower the IC. The Under-Voltage Lockout (UVLO) turnsoff the IC in the event of thevoltage dropping below thespecific threshold level. The UVLO circuit inhibitspowering the IC until a voltage reference is established,
up to predetermined threshold level.
Enable
Applying voltage higher than 1.22 V (typical) to the ENApin enables the IC. Applying voltage lower than 1.15 V(typical) to the ENA pin disables the IC. If ENA pinvoltage is higher than 1.22 V (typical) and VCC is higherthan 9.0 V (typical.), the IC starts to supply 5 V referencevoltage from VCC.
Oscillator (Boost Switching Frequency)
Boost switching frequency is programmed by the valueof the resistor connected from the RT pin to ground. RTpin voltage is set to 2 V. The current through the RT pinresistor determines boost switching frequency accordingto formula:
(1)
Soft-Start Function at Startup
During initial startup, the switching device can bedamaged due to the over-current coming from the inputline by the negative control. This can result in the initialovershoot of the LED current. Therefore, during initialstartup, the soft-start control gradually increases the dutycycle so that the output voltage can rise smoothly tocontrol inrush current and overshoot.
FAN7340 adapts the soft-start function in the boost
converter stage. During soft-start period, boost switchturn-on duty is limited by clamped CMP voltage. Thesoft-start period is dependent on boost switchingfrequency, which is decided by the RT resistor (Equation(1)). Soft-start period is set to be cumulative time whenthe BDIM (PWM dimming) signal is HIGH:
(2)
V
CMP
I
LED
V
LED
GATE
Soft-Start Period
t
V
Figure 26. Soft-Start Waveforms
LED Current SettingDuring the boost converter operating periods, the outputLED current can be set by equation:
(3)
where ADIM(V) isADIM pin appl ied voltage and, RSENSEis the sensing
resistor value. An additional 60 m comes from an
internal wire bonding resistor. To calculate LEDcurrent precisely, cons ider the wire bonding resistor.
Analog Dimming and PWM Dimming
Analog dimming is achieved by varying the voltage levelat the ADIM pin. This can be implemented either with apotentiometer from the VREF pin or from an externalvoltage source and a resistor divider circuit. The ADIMvoltage level is adjusted to be the s ame as the feedbacklevel (VSENSE). A VADIM range from 0.3 V to 3 V is
recommended.
PWM dimming (BDIM) helps achieve a fast PWMdimming response in spite of the shortcomings of theboost converter. The PWM dimming signal controls threenodes in the IC; gate signal to the switching FET, gatesignal to the dimming FET, and output connection of thetrans-conductance amplifier. When the PWM dimmingsignal is HIGH, the gates of the switching FET anddimming FET are enabled. At the same time, the outputof the transconductance ap-amp is connected to thecompensation network. This allows the boost converterto operate normally.
Dynamic Contrast Ratio
The Dynamic Contrast Ratio (DCR) means the maximumcontrast ratio achievable by adjusting the amount of light(dimming) of the screen instantaneously using thebacklight during the extremely short period of time.FAN7340 can normally drive the LED backlight under0.1% dimming duty cycle at 200 Hz dimming frequency.Even operating at 5 s-dimming FET turn-on time andextremely low dimming duty, FAN7340 can operateLEDs with normal peak current level.
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Internal Dimming MOSFET
A dim ming MOSFET (400 V N-channel MOSFET; suchas FDD3N40) is incorporated in the FAN7340. Thepower transistor is produced using Fairchildsproprietary, planar stripe, DMOS technology. Thisadvanced technology is tailored to minimize on-state
resistance (RDS(on)=3.4 ), to provide superior switchingperformance. This device is suited for high-efficiency
SMPS and shows desirable thermal characteristic duringoperation. To prevent initial LED current overshoot at lowVADIMlevels, gate resistance of the internal dimming FET
is designed as 5 k experimentally.
Feedback Loop Compensation
Stable closed-loop control can be accomplished byconnecting a compensation network between COMP andGND. The compensation needed to stabilize theconverter can be either a Type-I circuit (a simpleintegrator) or a Type-II circuit (and integrator with andadditional pole-zero pair). The type of the compensationcircuit required is dependent on the phase of the powerstage at the crossover frequency.
FAN7340 adopts a Type-II compensator circuit.
Programmed Current Control
FAN7340 uses a Current-Mode control method. Current-Mode control loops: an outer feedback loop that sensesoutput voltage (current) and delivers a DC controlvoltage to an inner feedback loop, which senses thepeak current of the inductor and keeps it constant on apulse-by-pulse basis. One of the advantages of theCurrent-Mode control is line/load regulation, which iscorrected instantaneously against line voltage changeswithout the delay of an error amplifier.
Programmable Slope Compensation
When the power converter operates in ContinuousConduction Mode (CCM), the current programmedcontroller is inherently unstable when duty is larger than50%, regardless of the converter topology. TheFAN7340 uses a Peak-Current-Mode control schemewith programmable slope compensation and includes aninternal transconductance amplifier to accurately controlthe output current over all l ine and load conditions.
An internal Rslope resistor (5 k) connected to sensingresistor RS and an external resistor R1 can control theslope of VSC for the slope compensation. Although thenormal operating mode of the power converter is DCM,the boost converter operates in CCM in the case of rapidLED current increase. As a result, slope compensationcircuit is an important feature.
The value of an external series resistor (R1) can beprogrammed by the user. In normal DCM operation, 5 k
is recommended.
5k R1
RS
I
peak
=45A
I
ramp
V
CS
V
S
V
SC
VCMP
I
inductor
m 1 m2m
Ts
Figure 27. Slope Compensation Block Diagram
Cycle-by-Cycle Over-Current Protection
In boost topology, the switch can be damaged inabnormal conditions (inductor short, diode short, outputshort). It is always necessary to sense the switch currentto protect against over-current failures. Switch failuresdue to excessive current can be prevented by lim iting Id.
DRV
CS
CLK+LEB
-
+
0.5V
5k
Switch Off
R1RS
Id
vcs
Figure 28. Cycle-by-Cycle OCP Circuit
When the voltage drops at R1 and RS exceed athreshold of approximately 0.5 V, the power MOSFETover-current function is triggered after m inimum turn-ontime or LEB time (300 ns).
The peak voltage level at CS terminal:
(4)
Choose the boost switch current-sensing resistor (RCS):
(5)
Open-LED Protection (OLP)
After the first PWM dimming-HIGH signal, the feedbacksensing resistor (RSENSE) starts sensing the LEDcurrent. If the feedback voltage of the SENSE pin dropsbelow 0.2 V, the OLP triggers to generate an error flagsignal. Because OLP can be detected only in PWM
dimming-HIGH; if OLP detecting time is over 5 s, PWM
dimming signal is pulled HIGH internally regardless ofexternal dimming signal. If OLP signal continues overblanking time, an error flag signal is triggered.
OLP blanking time is dependent on boost switchfrequency per Equation(6).FAULT OUT signal is madethrough the FO pin, which needs to be connected 5 Vreference voltage through a pull-up resistor. In normaloperation, FO pin voltage is pulled down to ground. InOLP condition, FO pin voltage is pulled HIGH.
(6)
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In system operation, OLP is triggered in only direct-shortcondition. Direct short means that some point of the LEDstring is shorted to set ground. In direct-short condition,the boost controller cannot control the LED current and alarge current flows into the LED string directly from inputpower. To prevent this abnormal condition, the FO signalis used to turn off input power or the total system. FOsignal is only triggered in OLP condition.
V
0.2V
Time
OLPi
Triggered
V
SENSE
0.2V
8192/f
seconds
Figure 29. Open-LED Protection
In LED open load condition, OVP is triggered ahead ofOLP.
Over-Voltage Protection (OVP)
Over-voltage protection is triggered when the voltage ofthe external output voltage trip point meets 3 V. Aftertriggering OVP, the dimming switch and boost switch areturned off. The protection signal is recovered when theoutput voltage divider is below 2.9 V.
OVP3V
ROVP1
ROVP2
VLED(Open)
Figure 30. Over-Voltage Trip Point
V
OVP
3 0V
Time
2 9V
Boost
Gate
Figure 31. OVP Trigger and Release
LED Over-Current Protection (OCP)
The primary purpose of the over-current protectionfunction is to protect the internal dimming MOSFET fromexcessive current. The OCP is triggered when thefeedback voltage meets the clamping level (1.4 V ~ 4 V)of the ADIM voltage x4. At 1 s delay after the OCP istriggered, the IC turns off both the boost FET anddimming FET and restarts the gate signal every tARautomatically. tARcan be calculated as:
(7)
1. When VADIM=0.3 V (VADIMx4=1.2 V).
2. OCP threshold level is set to 1.4 V.
3. OCP is triggered at feedback voltage level = 1.4 V.
V
SENSE
V
ADIM
= 3V
V
SENSE
=1 4V
GATE
Figure 32. OCP Waveforms at VADIM=0.3 V
1. When VADIM=0.8 V (VADIMx4=3.2 V).
2. OCP threshold level is set to 3.2 V.
3. OCP is triggered at VSENSE= 3.2 V.
V
SENSE
V
ADIM
= 8V
V
SENSE
=3 2V
GATE
Figure 33. OCP Waveforms at VADIM=0.8 V
1. When VADIM=1.2 V (VADIMx4=4.8 V).
2. OCP threshold level is set to 4.0 V.
3. OCP is triggered at VSENSE= 4.0 V.
V
SENSE
V
ADIM
=1 2V
V
SENSE
=4 V
GATE
Figure 34. OCP Waveforms at VADIM=1.2 V
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2013 Fairchild Semiconductor Corporation www.f airchildsemi.com
FAN7340 1.0.1
SLC1012C
LEDBacklightDriving
BoostSwitch
Typical Application Circuit (Boost Topology for LED Backlight)
Application Input Voltage Range Rated Output PowerOutput current
(Rated Voltage)LED
LED Backlight TV 120 VDC10% 250 mA (230 V) 72-LEDs/1-String
Features High Efficiency Constant Current Boost Converters High-Voltage, High-Current LED Driving
Typical Application Circuit
Figure 35. Typical Application Circuit
OVP
R23
10k
CN2
CON6
N.C1
N.C2
VLED3
VLED4
LED15
LED26
IC1
FAN7340
FO6
REF5
SENSE8
DRAIN9
RT7
GND3
CS4
DRV2
DRAIN10
CMP14
ENA12
1VCC
OVP13
BDIM16
ADIM15
R16
2.7R/1W
C122uF/160V
R12
100K
R17 3.9K
C101.2n
R20
100k
CN1
CON6
Vin1
Vin2
Vin3
GND4
GND5
GND6
R 1 1 0RC2
47uF/400V
C3
10uF/50V
C111.2n
R13 3.9K
R4
100K
R75.1k
CN3
CON6
GND2
n/Off6ADIM5BDIM4
VCC1
FO3
R10
11k
R2
300k
TP1
TP
C131.2nR
8
0.2
R/1W
R19
10k
D2 1SS355
R6
300k
Q1FDPF7N50F
L1200uH/PC44
R11
15k
R21
330k
C6
6.8n
C121.2n
R1420K
C7
100n
R18
220K
C810n
C5open
C4
1u
R 9 0 R
R5
300k
D1
FFD04H60S
R15
220K
R22
330k
D3
1N4148
BDIM
FO
FO
BDIM
ADIM
ADIM
VCC
VCC
On/Off
On/Off
ENA
ENA
0
0
0
FAN7
34
0
Vin : 120V
Vout : 230V
Output current : 250mA
Switching frequency : 200kHz
0
OVP
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2013 Fairchild Semiconductor Corporation www.f airchildsemi.comFAN7340 1.0.1 15
FAN7340L
ED
BacklightDrivingB
oostSwitch
Physical Dimension
Figure 36. 16-Lead, Small Outline Integrated Circuit (SOIC)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any mannerwithout notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify orobtain the most recent revision. Package specifications do not expand the terms of Fairchilds worldwide terms and conditions ,specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductors online packaging area for the most recent package drawings:http://www.fairchildsemi.com/packaging/.
X 45
DETAIL ASCALE: 2:1
80
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AC, ISSUE C.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD
FLASH AND TIE BAR PROTRUSIONS
D) CONFORMS TO ASME Y14.5M-1994
E) LANDPATTERN STANDARD: SOIC127P600X175-16AM
F) DRAWING FILE NAME: M16AREV12.
SEATING PLANE
GAGE PLANE
C
C0.10
SEE DETAIL A
LAND PATTERN RECOMMENDATION
PIN ONE
INDICATOR
1
16
8
M0.25
9
C B A
B
A
5.6
1.27 0.65
1.75
10.009.80
8.89
6.00
1.27
(0.30)
0.510.35
1.75 MAX1.50
1.25
0.250.10
0.25
0.19
(1.04)
0.900.50
0.36
(R0.10)
(R0.10)
0.500.25
4.003.80
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2013 Fairchild Semiconductor Corporation www.f airchildsemi.comFAN7340 1.0.1 16
FAN7340L
ED
BacklightDrivingB
oostSwitch
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