Jeffrey Hwang10 min to design your power supply (V)
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Design a
Champion AC Adapter
Jeffrey H. Hwang
CM6805/CM6806/CM6903/CM6201
Jeffrey Hwang10 min to design your power supply (V)
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CM6805/CM6806/CM6903/CM6201
Championand
FairChild
Two Sources:
Jeffrey Hwang10 min to design your power supply (V)
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CM6805/CM6806/CM6903/CM6201
WithCM6805, CM6806, CM6903
vs.
CRM +PWM
Cost Reduction by $0.30 to $0.20
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Jeffrey Hwang10 min to design your power supply (V) CM6805/CM6806/CM6903/CM6201
If the Microprocessor
Is the brain of the system,then the
Power Supplyis the heart.
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Jeffrey Hwang10 min to design your power supply (V) CM6805/CM6806/CM6903/CM6201
High Density AC Adapter
The Challenge: High Efficiency at Low Line (90VAC)
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Jeffrey Hwang10 min to design your power supply (V) CM6805/CM6806/CM6903/CM6201
Typical Power vs. Efficiency
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Jeffrey Hwang10 min to design your power supply (V) CM6805/CM6806/CM6903/CM6201
High Density AC Adapter
Jeffrey Hwang10 min to design your power supply (V)
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CM6805/CM6806/CM6903/CM6201
How to increase the Efficiency?(Rule of Thumb)
• Full Load due to Conduction Loss = I x I x R:
1. Spend more money to reduce R such as reduce Rdson of Mosfet
2. Reduce I by increasing VIN
• Light Load due to Switching Loss = fsw x C x V x V:
1. Reduce C
2. Reduce V = ZVS
3. Reduce fsw => Green Mode
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Failure Rate Vs. Temperature
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
It is desired to have a uniform Surface Temperature for Convection and Radiation
By Proper Layout/Package/Enclosure
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Maximum Power Dissipation vs. Shape
By Proper Layout/Package/Enclosure
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
The Maximum Output Power vs. Shape
h , Po
h , Po
By Proper Layout/Package/Enclosure
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Use the better Core Shape
By Proper Layout/Package/Enclosure
Due to the smooth surface, it has the better heat convection
Jeffrey Hwang10 min to design your power supply (V)
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Full Load Condition Analysis
A Good AC Adapter Layout
Keep the temperature uniform through out the board
By Proper Layout/Package/Enclosure
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
36W Fly Back AC Adapter Experimental Result
Design a Flyback Converter
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
36W Fly Back AC Adapter Experimental Result
Design a Flyback Converter
η~85.6% @ 90VAC with full load
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
How To Improve Flyback Transformer Power Loss?
1. Reduce the n, Turn Ratio to reduce the Secondary Peak Current
• When n ,Ip ,Is , D , Lm , Ls , then Maximum Secondary Voltage .
• When n , Ip , Is , D is , Lm , Ls ,then Maximum Secondary Voltage .
2. Increase the Flyback input voltage3. Use the better RM core instead of EPC core
Design Flyback Converter
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
How To Improve Flyback Transformer Power Loss?
Design Flyback Converter
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
How To Reduce Flyback Diode Rectifier Power Loss?
• Increase the Flyback input Voltage
• Use SR, Synchronous Rectification + DCM
• Reduce the secondary current by reducing n, the turn
ratio of Transformer (This will increase Mosfet Loss.)
Design a Flyback Converter
Jeffrey Hwang10 min to design your power supply (V)
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Full Load Condition Analysis
How To Reduce Flyback Diode Rectifier Power Loss?
Design a Flyback Converter
Use a Synchronous Rectifier
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
How To Reduce Flyback Diode Rectifier Power Loss?
Design a Flyback Converter
CCM + Synchronous Rectification has the lower efficiencydue to Trr, body diode recovery issue
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
How To Reduce Flyback Diode Rectifier Power Loss?
Design a Flyback Converter
CCM + Synchronous Rectification has Trr, body diode recovery issue
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
How To Reduce Flyback Diode Rectifier Power Loss?
Design a Flyback Converter
CCM + Synchronous Rectification has Trr, body diode recovery issue
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
How To Reduce Flyback Diode Rectifier Power Loss?
Design a Flyback Converter
CCM + Synchronous Rectification has Trr, body diode recovery issue
DCM Efficiency vs. Input voltage
86%,Efficiency @ 200V, Vin
Jeffrey Hwang10 min to design your power supply (V)
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Full Load Condition Analysis
How To Reduce Flyback Diode Rectifier Power Loss?
Design a Flyback Converter
CCM + Synchronous Rectification has Trr, body diode recovery issue
Solution:
•Use DCM + SR, Synchronous Rectifier + Vin >200V + Reduce n
Jeffrey Hwang10 min to design your power supply (V)
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Full Load Condition Analysis
How To Reduce Flyback Diode Rectifier Power Loss?
Design a Flyback Converter
CCM + Synchronous Rectification has Trr, body diode recovery issue
Solution:Use DCM + SR, Synchronous Rectifier + Vin > 200V + Reduce n
Load=3A / Fans
75.00%
80.00%
85.00%
90.00%
60 80 100 120 140 160 180 200 220 240 260 280
Input Voltage
Effici
ency Only Schottky
Only SR
SR+Schottky
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
How To Improve Flyback MOSFET Power Loss?
• Increase the Flyback input voltage so conduction loss can be reduced due to D drops.
• Using DCM to prevent the Trr, diode reverse current issue
• Use a lower Rdson Mosfet• Use ZVS
Design Flyback Converter
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Conventional Flyback Converter:
Design Flyback Converter
LC tank’s C is due to S1and
It is very small, so Ring frequency
(resonant frequency) is high.
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Conventional Flyback Converter:
Design Flyback Converter
Vds,S1
Ip
The Energy Stored in leakage inductor is wasted in the ringing.
resonant f is high so it is difficult to control (manufacture control) it.
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
ZVS Flyback Converter: Active Clamp
Design Flyback Converter
LC tank’s C is due to Cclamp~1uFand
It is relative big, so Ring frequency
(resonant frequency) is lower.
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
ZVS Flyback Converter: Active Clamp
Design Flyback Converter
No RingandZVS
The energy is stored in the core;release to the input
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
ZVS Flyback Converter: Active Clamp
Design Flyback Converter
No RingandZVS
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
ZVS Flyback Converter: Active Clamp
Design Flyback Converter
4.5% Improvement
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
ZVS Flyback Converter: Active Clamp
Design Flyback Converter
4.5% Improvement due to:•Energy in leakage L and Snubber is saved (Clamped)•Energy in Vds-parasitic capacitor is saved (ZVS)
However, it is expensive:• It needs a high side driver, an extra high side Mosfet
and a simple control circuit• Can we do it without additional cost?
Jeffrey Hwang10 min to design your power supply (V)
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Full Load Condition Analysis
ZVS Flyback:Secondary Synchronous Rectifier
with CM6201 (smart driver)
Design Flyback Converter
LC tank’s C becomes to Co/(n x n)~25uF to 50uF
andIt is big,
so Ring frequency (resonant frequency) is very
low.
Jeffrey Hwang10 min to design your power supply (V)
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Full Load Condition Analysis
ZVS Flyback:Secondary Synchronous Rectifier
with CM6201 (smart driver)
Design Flyback Converter
Benefits:• It does not need high side driver and high side mosfet
• Synchronous Rectification at DCM
Fly back full load Efficiency is increased from
~86% to~90% at Flyback input=200V
Jeffrey Hwang10 min to design your power supply (V)
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Full Load Condition Analysis
Summary:designing Flyback Converter @ full load & Vin=200V
Design Flyback Converter
Without additional cost: Efficiency~87.5% @Full load•Vin >= 200V (with PFC-PWM combo CM6805/06/CM6903)…. Δη =3%• n, turn ratio = 5 or 6….Reduce Is peak current• Full load at DCM but approach to CCM….remove Trr• ZVS by controlling LC variation….Δη=1.5%
With additional cost: Efficiency~93% @Full load• Secondary Synchronous Rectifier +ZVS: (CM6201) # Total additional Δ$~ $0.3 at high volume…. Δη=2%• RM core #Δ$ ~$0.2 at high volume….. Δη=1.5%• ZVS Active Clamp at primary side….Δ$ ~$0.8 with Δη=2%
Without the proper design, efficiency could be below 80%.
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Design a Follower Boost PFC
Choose Follower Boost InductorCM6805 family vs. CRM, 6561
• L ↑, Efficiency ↑• For CRM, 6561, it cannot increase boost inductance.
1. L↑, frequency needs to go lower and it can go below 20Khz2. Ton=L / Rload; for a given load, Ton is a constant3. L ~ 471uH cannot go higher for the Po = 100W 4. Ipeak = Iin Peak x 2 (I x I x R is big; efficiency is poor!)5. At high line and light load, frequency can go above 400Khz (EMI
issue is severe.)• For CM6805/CM6806/CM6903 fixed switching frequency=67.5Khz,
1. Lcm6805 family ~ Lcrm (67.5khz) x 5 (Optimal Inductance Value)2. Lcrm ~ 209uH @ 90VAC3. Loptimal = 1050 uH @ 100W to L= 698 uH @150W4. L ↑, Efficiency ↑5. Both the cost of Boost Mos and Boost Rectifier can be reduced
• Efficiency (CCM) – Efficiency (CRM) > 3% (total system)
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
η=91.37%, Vin=90VAC, Po=1KW
2%
MOSFETMOSFET
MOSFET
Boost Power Dissipation Breakdown
Boost 400V Cap
Design a Follower Boost PFC
1%
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
η=91.37%, Vin=90VAC, Po=1KW
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Power Dissipation in Boost Diode
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Power Dissipation in Boost Mosfet
Dominated One
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Design a Follower Boost PFC
4.5% Improvement
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
PFC Boost with 380V only
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Continuous Boost Follower
Added Circuit
VlineDC needs to be closed to Dc and > = 5V.
4.5% Improvement….cost~$0.03
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Two Level Boost Follower (Q1 on, 200V @ low line and Q1 off 380V @ high line)
4.0% Improvement….cost~$0.02
Added Circuit
VlineDC @ high line will turn off Q1 and @ low line will turn on Q1.
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Two Level Boost Follower or
Continuous Boost Follower
4.0% to 4.5% Efficiency Improvement….cost~$0.02 to $0.03
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
PFC Boost Rectifier Trr issue
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Use SiC to solve PFC Boost Rectifier Trr issue
Δη~1%Δ$~$1.0
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
SiC will help if the frequency is high.
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Use Soft Switching to solve Trr issue
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Use Soft Switching to solve Trr issue
Δη=2%Δ$~$1.3
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Bridgeless PFC
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Bridgeless PFC
Δη=1%......Δ$~$0.5
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Efficiency Improved due to LETE
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Efficiency Improved due to LETE
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
CM68XX
CM68XX
Δ$ = -0.1 at no cost…Δη=1% with LETE
Design a Follower Boost PFC
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Jeffrey Hwang10 min to design your power supply (V) Full Load Condition Analysis
Design a Follower Boost PFC
Without Cost: Efficiency~95.5% @full load•2 level Boost Follower(200V/380V)….Δη~4%
•CM6805/CM6806/CM6903…. Δη~1%
Summary:design a Boost PFC @ full load and Vin=90Vac
With Cost: Efficiency~97% @full load•SiC…. Δ$~1.0 and Δη~1%
•Soft Switching…. Δ$~1.0 and Δη~1%•Bridgeless PFC…. Δ$~1.0 and Δη~1%
Jeffrey Hwang10 min to design your power supply (V)
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•Without Additional Cost (CM6805/CM6806/CM6903):Efficiency~84.4% @full load & Vin = 90VAC
η pfc x η flyback = 96.5% x 87.5%= 84.4%
Full Load Condition Analysis
Design a Follower Boost PFC
Summary:Design a Champion AC Adapter @ Full Load and Vin=90Vac
•With Δ$~$0.3 (CM6201):Efficiency~86.85% @full load & Vin = 90VAC
η pfc x η flyback = 96.5% x 90%= 86.85%
•With Δ$~$3.3 :Efficiency~90.7% @full load & Vin = 90VAC
η pfc x η flyback = 97.5% x 93%= 90.7%
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Jeffrey Hwang10 min to design your power supply (V)
Green Mode
Build-in-Green-ModeCM6805/CM6806/CM6903
The Best Way
to Save Energy
is to “Turn Off”
Your Appliance
Light Load Efficiency ↑, Goes up, as fpwm↓, Goes down
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Jeffrey Hwang10 min to design your power supply (V)
Green Mode
Build-in-Green-ModeCM6805/CM6806/CM6903
User Defined GMth, Green-Mode Threshold
Light Load Efficiency ↑, Goes up, as fpwm↓, Goes down
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Jeffrey Hwang10 min to design your power supply (V)
CM6805/CM6806/CM6903 Build-In Green Mode Functions
Build-in-Green-ModeCM6805/CM6806/CM6903
•Reduce the switching frequency when the load is light
•Turn off PFC @ GMth
•Bleed Resistor can be 2 Mohm or higher
without influence the turn-on time
•Reduce operating current
Light Load Efficiency ↑, Goes up, as fpwm↓, Goes down
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Jeffrey Hwang10 min to design your power supply (V)
Green Mode
Light Load Efficiency ↑, Goes up, as fpwm↓, Goes down
Build-in-Green-ModeCM6805/CM6806/CM6903
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Jeffrey Hwang10 min to design your power supply (V)
The Timing Diagram of fRtCt = 2 x fPWM = 4 x fPFC in CM6805, CM6806 and CM6903
CLK
RTCT
TIME
TIME
TIME
280K Hz
280K Hz
140K HzPWMCLK=Maximum
PWM Duty Cycle
Exactly 50%
No Jitter
TIME
TIME
70K Hz
70K HzPFCCLK
PFC Modulation Ramp
fRtCt
fpwmCM6805
fPFC
fpwmCM6806
Pulse Skipping from the controller
Light Load Efficiency ↑, Goes up, as fpwm↓, Goes down
Build-in-Green-ModeCM6805/CM6806/CM6903
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Jeffrey Hwang10 min to design your power supply (V)
280K Hz TIME
280K Hz
CLK
TIME
RTCTPin 7
140K HzPWMComparatorOutput
TIME
TIME
PWM DutyCycle 140K Hz
No Jitter
Exactly 50% 140K HzMaximum
TIME
PWMCLK=
PWM Duty Cycle
PWM Green Mode Pulse Skipping Timing Diagram
70K Hz/
70K Hz/
70K Hz/
Light Load Efficiency ↑, Goes up, as fpwm↓, Goes down
Build-in-Green-ModeCM6805/CM6806/CM6903
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Jeffrey Hwang10 min to design your power supply (V)
Light Load Efficiency ↑, Goes up, as V↓& fpwm↓, Goes down
Build-in-Green-ModeCM6805/CM6806/CM6903
Turn Off PFC!When Load is below
Green Mode Threshold, GMth
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Jeffrey Hwang10 min to design your power supply (V)
Light Load Efficiency ↑, Goes up, as V↓& fpwm↓, Goes down
Build-in-Green-ModeCM6805/CM6806/CM6903
Po=100W Design for V+I pin and PWMtrifault
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Jeffrey Hwang10 min to design your power supply (V)
Light Load Efficiency ↑, Goes up, as V↓& fpwm↓, Goes down
Build-in-Green-ModeCM6805/CM6806/CM6903
Spread Sheet for the PWM Design for a FlyBackCM6805/CM6806 PWM SECTION for FlyBack Design User Inputs All Resistors, inductor and VCC Units User Inputs the Optical Couple Current and VCC Units
If the cell is filled with yellow color, it is a user input cell. Flyback Input Voltage (minimum) 200 V 200 V
Flyback Output Voltage 19 V 19 VLm p (Primary Side Flyback Inductance) 3.36E-04 H 3.36E-04 HLs (Secondary Side Flyback Inductance) 9.33E-06 H 9.33E-06 H
Turn Ratio, n = Np/Ns 6.00 6.00Switching frequency, fsw 6.75E+04 Hz 6.75E+04 Hz
Switching Period 1.48E-05 S 1.48E-05 SDuty Cycle, D (DCM but use CCM formula) 36.31% % 36.31% %
1-D 63.69% % 63.69% % Maximum Output Power 100 W 100 W
PWM system only efficiency 86% % 86% %Maximum input Power 116 W 116 W
Primary Peak Current @ Full load & Steady State 3.20E+00 A 3.20E+00 A Primary Peak Current with D=Dmax=50% @200V 4.41E+00 A 4.41E+00 A
Secondary Peak Current @200V 2.65E+01 A 2.65E+01 ARpwmsense 3.90E-01 OHM 3.90E-01 OHM
RV+I 500 OHM 500 OHMQphoto Couple Current @ 100% load 5.00E-04 A 5.00E-04 A
Voltage Drop cross RPWMRSENSE @ 100% load 1.25E+00 V 1.25E+00 V Voltage Drop cross RV+I @ 100% load 2.50E-01 V 2.50E-01 VQphoto Couple Current @ 50% load 1.75E-03 A 1.75E-03 A
Voltage Drop cross RPWMRSENSE @ 50% load 6.25E-01 V 6.25E-01 VVoltage Drop cross RV+I @ 50% load 8.75E-01 V 8.75E-01 VQphoto Couple Current @ 20% load 2.50E-03 A 2.50E-03 A
Voltage Drop cross RPWMRSENSE @ 20% load 2.50E-01 V 2.50E-01 VVoltage Drop cross RV+I @ 20% load 1.25E+00 V 1.25E+00 V
RPWMTRIFAULT1 2.60E+03 OHM 2.68E+03 OHMRPWMTRIFAULT2 + RNTC1 4.20E+04 OHM 4.20E+04 OHM
VCC=15V 15 V 15 VPWMTRIFAULT Voltage @ 20% load VCC="B12" 7.76E+00 V 6.80E+00 VPWMTRIFAULT Voltage @ 50% load VCC="B12" 9.71E+00 V 9.57E+00 V
Short Threshold ~ 14.3 V 14.3 VGreen Mode Threshold ~ 6.8 V 6.8 V
VCC=13V 13 V 13 VPWMTRIFAULT Voltage @ 20% load VCC="B18" 5.76E+00 V 5.56E+00 VPWMTRIFAULT Voltage @ 50% load VCC="B18" 7.71E+00 V 7.57E+00 V
Short Threshold ~ 12.3 V 12.3 VGreen Mode Threshold ~ 5.8 V 5.8 V
VCC=10V 10 V 10 VPWMTRIFAULT Voltage @ 20% load VCC="B22" 2.76E+00 V 2.56E+00 VPWMTRIFAULT Voltage @ 50% load VCC="B22" 4.71E+00 V 4.57E+00 V
Short Threshold ~ 9.3 V 9.3 VGreen Mode Threshold ~ 4.3 V 4.3 V
CPWMTRIFAULT 2.24E-07 F 2.24E-07 F CV+I 1.50E-10 F 1.50E-10 F
Design OK or Not TRUE TRUE
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Jeffrey Hwang10 min to design your power supply (V)
Increase Start-Up Resistor above 2M ohm without
Increasing Turn-On Time
Build-in-Green-ModeCM6805/CM6806/CM6903
Light Load Efficiency ↑, Goes up, as Rac ↑,V↓& fpwm↓
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Jeffrey Hwang10 min to design your power supply (V)
Light Load Efficiency ↑, Goes up, as Rac ↑,V↓& fpwm↓
Build-in-Green-ModeCM6805/CM6806/CM6903
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Jeffrey Hwang10 min to design your power supply (V)
Light Load Efficiency ↑, Goes up, as Rac ↑,V↓& fpwm↓
Build-in-Green-ModeCM6805/CM6806/CM6903
RAC functions:
• Serve as a Start-Up Resistor
• Feed-forward input Sine wave for PFC
1. Leading-edge-modulation-PFC-current-loop
slope compensation
2. Power Limit
Jeffrey Hwang10 min to design your power supply (V)
72Light Load Efficiency ↑, Goes up, as Rac ↑,V↓& fpwm↓
Build-in-Green-ModeCM6805/CM6806/CM6903
Improve Efficiency @ Light Load
CM6805/CM6806:
•Reduce PWM switching frequency by pulse skipping
•Turn Off PFC @ Green-Mode Threshold, GMth
•Increase Start-Up resistor, RAC > 2M ohm
@ No Load, Pin<0.3W
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Jeffrey Hwang10 min to design your power supply (V)
CM6805, CM6806 and CM6903
PFC - FlyBack
AC Adapter Controller
CM6805/CM6806/CM6903/CM6201
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Jeffrey Hwang10 min to design your power supply (V)
PFC Start Up then PWM Start Up
CM6805, CM6806 and CM6903
CM6805/CM6806/CM6903/CM6201
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Jeffrey Hwang10 min to design your power supply (V)
Soft Start for both PFC and Flyback
PFC Soft Start with PWM Soft StartCM6805, CM6806 and CM6903
CM6805/CM6806/CM6903/CM6201
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Jeffrey Hwang10 min to design your power supply (V)
Fast PFC Voltage Loop
Speed up the PFC Voltage Loop
by 3X
CM6805, CM6806 and CM6903
CM6805/CM6806/CM6903/CM6201
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Jeffrey Hwang10 min to design your power supply (V)
Fast PFC Voltage Loop
Error Amplifier
Transconductance Amp, GM vs.
Operational Amp, OP
CM6805, CM6806 and CM6903
CM6805/CM6806/CM6903/CM6201
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Jeffrey Hwang10 min to design your power supply (V)
Fast PFC Voltage Loop
Transconductance Amp, GM
Operational Amp, OP
Output Impedance, Zout ?
Output Impedance, Zout ?
Input Impedance Zin?
Input Impedance Zin ?
Zin ~ High
Zin ~ High
Zout ~ High
Zout ~ Low
Transconductance Amp, GM vs.
Operational Amp, OP
CM6805, CM6806 and CM6903
CM6805/CM6806/CM6903/CM6201
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Jeffrey Hwang10 min to design your power supply (V)
Fast PFC Voltage Loop
2 Main Purposes of the Error Amp
1. Force V+ = V- and it means Vfb = 2.5V
2. Compensation: It needs the Rc and Cc
CM6805, CM6806 and CM6903
CM6805/CM6806/CM6903/CM6201
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Jeffrey Hwang10 min to design your power supply (V)
Fast PFC Voltage Loop
VFB
OP Integrator
The Miller Effect slows down the Vfb node.Also, PFC Voltage Loop is very slow.The consequence: Vfb becomes very slow.
This local feedback is bad!
CM6805, CM6806 and CM6903
CM6805/CM6806/CM6903/CM6201
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Jeffrey Hwang10 min to design your power supply (V)
Fast PFC Voltage Loop
For GM,there is no local feedback.There is only one outer loop and there is no inner loop.Vfb is a much faster node.
GM Integrator
CM6805, CM6806 and CM6903
CM6805/CM6806/CM6903/CM6201
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Jeffrey Hwang10 min to design your power supply (V)
Fast PFC Voltage Loop
GMV (mho)
0
12u/div
2.5V0V 3.0V
Iveao (uA)
12u/div69.3u mho
-208.6nA
0uA
-60uA
60uAFB
VEAOV ΔV
ΔIGM
VFB
VFB=2.51V
CM6805, CM6806 and CM6903CM6805/CM6806/CM6903/CM6201
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Jeffrey Hwang10 min to design your power supply (V)
Easy to meet UL1950
CM6805, CM6806 and CM6903
CM6805/CM6806/CM6903/CM6201
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Jeffrey Hwang10 min to design your power supply (V)
• Leading Edge Modulation PFC• Synchronize with Trailing Edge Modulation PWM• Smaller 400V Bulk Capacitor with 1% better efficiency and 30% ripple reduction• Simplest PFC control, Input Current Shaping Technique, ICST (Open Loop Current Mode)• It works for both CCM or DCM• Fixed Switching Frequency, fpfc = 67.5Khz for easy input EMI filter design• Automatic Slope Compensation with IAC• Rac at IAC pin serves as a Start-Up Resistor• 3X PFC Voltage Loop• PFC has a Tri-fault protections for UL1950• PFC Soft Start• PFC OVP + VCC OVP• PFC Current Limit• Universal Input• AC Brown Out• Automatic Turn Off @ Green Mode• Easy to configure into Boost Follower
PFC Features
CM6805, CM6806 and CM6903
CM6805/CM6806/CM6903/CM6201
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Jeffrey Hwang10 min to design your power supply (V)
PWM Features
• Design for FlyBack Converter• Constant Maximum Power• Current Mode with inherent slope compensation• Constant Switching Frequency, fpwm = 67.5Khz (CM6805 and
CM6903), fpwm = 135Khz (CM6806)• Exact 50% maximum duty cycle• PWM has a PWMTri-fault protections for short and Green Mode• PWMTrifault can be programmed to turn off PFC @ Green Mode• PWMTrifault can be programmed to detect the short or can be
programmed to do thermal protection• PWM has 10 mS digital soft start• CM6805/CM6806 in 10 pin SOIC packages• CM6903 in 9 pin SIP package
CM6805, CM6806 and CM6903
CM6805/CM6806/CM6903/CM6201
86
Jeffrey Hwang10 min to design your power supply (V)
More Features
· Input Power, Pin<0.3 W @ No Load
· 23V BiCMOS (it can drive IGBT)
· ISTART ~ 100µA
· IOPERATING ~ 2mA without load
· Industry First CM6805/CM6806 PFC-PWM Combo in 10 pin
SOIC packages
· Industry First PFC-PWM Combo CM6903 in 9 pin SIP package
CM6805, CM6806 and CM6903
CM6805/CM6806/CM6903/CM6201
87
Jeffrey Hwang10 min to design your power supply (V)
CM6903
Input Current Shaping Technique PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903
88
Jeffrey Hwang10 min to design your power supply (V)
CM
Input Current Shaping Technique PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903
89
Jeffrey Hwang10 min to design your power supply (V)
CM6903
Input Current Shaping Technique PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903
90
Jeffrey Hwang10 min to design your power supply (V)
How does it work?
Input Current Shaping Technique PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903
91
Jeffrey Hwang10 min to design your power supply (V)
10pin SOIC PFC-PWM combo: CM6805/CM6806
Input Current Shaping Technique PFC with Leading Edge Modulation
92
Jeffrey Hwang10 min to design your power supply (V)
9pin SIP PFC-PWM combo: CM6903
Input Current Shaping Technique PFC with Leading Edge Modulation
93
Jeffrey Hwang10 min to design your power supply (V)
Typical CM6805/CM6806 & CM6903 application circuit
Circuit configuration has been modified.
400V Rated Capacitors Can Be Used!
6
ISENSE
8VFB
4
PFCOUT
7
VEAO
9IAC
2
VCC
3
PWMOUT
1
DCILIMIT
5
GND
VOUT
2.5V
VREF OK
2.75V
2.5V
-1V
0.5V
18V
VCC_CIRCLE
PWM CLK
19.4V
VREF OK
2.5V
VCC
VFB
1.5V
0.75V
0.5V
VEAO
SS
VCC
+
-
PWMCMP
-
.-
+
R13R14
UVLO
. .
R17
R16
SR1
C21
R2
D8
R15
D10
C1
U2
R10Q3
F1
L1
D1
D2Z1
S
R
Q
Q
R
100K ohm
VCC OVP+
-
.-
+
-
.
PFC OVP+
-
.-
PFC ILIMIT+
-
.
+
-
.
PFCCMP+
-
.
RAC
VIN OK
+
-
.+
. .
S
R
Q
Q
R
D10
R5
400K ohm
R4
10mS
. .
.
C5
C4
D8D9D11
R19
C13
D6
C14R11
C15
C11 C7
C16
C8
R3
C9
D3
R11
C8
R7
R20 T2
C9
T1
C10
D7
R8
R12
PFCCLKB
PWMCLK.
.
R9
Q1
CFilter
Q2
D5
PWMOFF
+
-
.
S
R
Q
Q
R
R
RFIlter
T1
+
+ OUT
U1
SUM
..
.
.
D13
D12
D4
C17
L2
1K ohm
C19
C18
VREFOK
AC IN
FAULTB
PFCCLKB
RAMP
fpfc= 67KHz
R1A
fpwm= 67KHz
67KHz
fpwm=
R1B
fpfc=
134KHz
CM6903 CM6904
Tri-FaultDetect
gmv
ISENSEAMP
OSC
R1C
UVLO
SS
PWMCLK
1V
Input Current Shaping Technique PFC with Leading Edge Modulation
94
Jeffrey Hwang10 min to design your power supply (V)
PWM SECTIONCM6805, CM6806 and CM6903
95
Jeffrey Hwang10 min to design your power supply (V)
CM6805/CM6806/CM6903 PFC Controller:
Leading Edge Modulation
with Input Current
Shaping Technique
(ICST)
Input Current Shaping Technique PFC with Leading Edge Modulation
PFC Control
96
Jeffrey Hwang10 min to design your power supply (V)
•ICST is based on the following equations:
in
ine IVR
inl II
•Equation 2 means: average boost inductor current equals to input current.•Assume that input instantaneous power is about to equal to the output instantaneous power.
doutlin IVIV
•For steady state and for the each phase angle, boost converter DC equation at continuous conduction mode is:
)1(1
dVV
in
out
(3)
Input Current Shaping Technique PFC with Leading Edge Modulation
PFC ControlCM6805, CM6806 and CM6903
97
Jeffrey Hwang10 min to design your power supply (V)
•Rearrange above equations, (1), (2),(3), and (4) in term of Vout and d, boost converter duty cycle and we can get average boost diode current equation (5):
e
outd R
VdI 2)1(
•Also, the average diode current can be expressed as:
dttIT
IoffT
dsw
d )(1
0
(5)
Input Current Shaping Technique PFC with Leading Edge Modulation
PFC ControlCM6805, CM6806 and CM6903
98
Jeffrey Hwang10 min to design your power supply (V)
•If the value of the boost inductor is large enough, we can assume
dd ItI ~)(
•It means during each cycle or we can say during the sampling, the diode current is a constant.•Therefore, equation (6) becomes:
)1(' dIdITtI
I ddsw
offdd
, Id is constant during each switching period, 1/67.5khz.
Input Current Shaping Technique PFC with Leading Edge Modulation
PFC ControlCM6805, CM6806 and CM6903
99
Jeffrey Hwang10 min to design your power supply (V)
•Using this simple equation (8), we implement the PFC control section of the PFC-PWM controller, CM6805, CM6806, CM6903 & CM6501
sw
off
e
outd
e
outd
e
outd
T
t
R
VI
RVdI
RVddI
'
2'' )(
(8)
Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
PFC Control
CM6805, CM6806 and CM6903
100
Jeffrey Hwang10 min to design your power supply (V) Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
PFC Control
Review Leading Edge Modulation & Average Current Mode PFC Control
CM6805, CM6806 and CM6903
101
Jeffrey Hwang10 min to design your power supply (V) Input Current Shaping Technique (ICST) PFC with Leading Edge
ModulationCM6805, CM6806 and CM6903
102
Jeffrey Hwang10 min to design your power supply (V) Input Current Shaping Technique (ICST) PFC with Leading Edge
ModulationCM6805, CM6806 and CM6903
103
Jeffrey Hwang10 min to design your power supply (V)
Usually, the pole of Isense filter ~ 1/6 of the switchingfrequency, and it is 67.5khz/6 = 1/(2×π×Rfilter×Cfilter)
If Rfilter =1K Ω, Cfilter=14.15nF.
2 purposes to add Isense filter:• Protect IC during inrush current• Using smaller inductor and still having good THD
Input Current Shaping Technique (ICST) PFC with Leading Edge
ModulationCM6805, CM6806 and CM6903
104
Jeffrey Hwang10 min to design your power supply (V) Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
D<50% needs Slope Compensation
CM6805, CM6806 and CM6903
105
Jeffrey Hwang10 min to design your power supply (V) Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
D<50% needs Slope Compensation
CM6805, CM6806 and CM6903
106
Jeffrey Hwang10 min to design your power supply (V) Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
D<50% needs Slope Compensation
CM6805, CM6806 and CM6903
107
Jeffrey Hwang10 min to design your power supply (V) Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
D<50% needs Slope Compensation
CM6805, CM6806 and CM6903
108
Jeffrey Hwang10 min to design your power supply (V) Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
D<50% needs Slope Compensation
CM6805, CM6806 and CM6903
109
Jeffrey Hwang10 min to design your power supply (V) Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
D<50% needs Slope Compensation
CM6805, CM6806 and CM6903
110
Jeffrey Hwang10 min to design your power supply (V) Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
D<50% needs Slope Compensation
CM6805, CM6806 and CM6903
111
Jeffrey Hwang10 min to design your power supply (V) Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
D<50% needs Slope Compensation
CM6805, CM6806 and CM6903
112
Jeffrey Hwang10 min to design your power supply (V) Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
D<50% needs Slope Compensation
CM6805, CM6806 and CM6903
113
Jeffrey Hwang10 min to design your power supply (V)
PFC Section
For CM6805/CM6806 & CM6903,Bleed Resistor Not Required
Negative Charge Pump Not Requiredfor the PFC section
Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
D<50% needs Slope CompensationCM6805, CM6806 and CM6903
114
Jeffrey Hwang10 min to design your power supply (V)
TIME
IACTIME
ISENSEOUT
TIME
ISENSEOUT+IAC
IAC enhances the THD during light load and high line ftSinB 2
ftSinA 2
ftSinBA 2)(
Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
D<50% needs Slope Compensation
CM6805, CM6806 and CM6903
115
Jeffrey Hwang10 min to design your power supply (V)
CM6800 or CM6805 Family
For CM6800 family, ΔVEAO=6V-0.625V=5.375V and For CM6805, CM6806 and CM6903, ΔVEAO=(6V-0.625V)/4=1.34V
Input Current Shaping Technique PFC with Leading Edge Modulation
Voltage LoopCM6805, CM6806 and CM6903
116
Jeffrey Hwang10 min to design your power supply (V)
CM6805/CM6806 & CM6903 PWM Control:
1.5V Precision Current CMP +
10 ms Digital Soft Start
Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation&
Trailing Edge Modulation PWM
117
Jeffrey Hwang10 min to design your power supply (V)
PWM Section
6
ISENSE
8VFB
4
PFCOUT
7
VEAO
9IAC
2
VCC
3
PWMOUT
1
DCILIMIT
5
GND
VOUT
2.5V
VREF OK
2.75V
2.5V
-1V
0.5V
18V
VCC_CIRCLE
PWM CLK
19.4V
VREF OK
2.5V
VCC
VFB
1.5V
0.75V
0.5V
VEAO
SS
VCC
+
-
PWMCMP
-
.-
+
R13R14
UVLO
. .
R17
R16
SR1
C21
R2
D8
R15
D10
C1
U2
R10Q3
F1
L1
D1
D2Z1
S
R
Q
Q
R
100K ohm
VCC OVP+
-
.-
+
-
.
PFC OVP+
-
.-
PFC ILIMIT+
-
.
+
-
.
PFCCMP+
-
.
RAC
VIN OK
+
-
.+
. .
S
R
Q
Q
R
D10
R5
400K ohm
R4
10mS
. .
.
C5
C4
D8D9D11
R19
C13
D6
C14R11
C15
C11 C7
C16
C8
R3
C9
D3
R11
C8
R7
R20 T2
C9
T1
C10
D7
R8
R12
PFCCLKB
PWMCLK.
.
R9
Q1
CFilter
Q2
D5
PWMOFF
+
-
.
S
R
Q
Q
R
R
RFIlter
T1
+
+ OUT
U1
SUM
..
.
.
D13
D12
D4
C17
L2
1K ohm
C19
C18
VREFOK
AC IN
FAULTB
PFCCLKB
RAMP
fpfc= 67KHz
R1A
fpwm= 67KHz
67KHz
fpwm=
R1B
fpfc=
134KHz
CM6903 CM6904
Tri-FaultDetect
gmv
ISENSEAMP
OSC
R1C
UVLO
SS
PWMCLK
1V
Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation&
Trailing Edge Modulation PWM
Jeffrey Hwang10 min to design your power supply (V)
118
Input Current Shaping Technique (ICST) PFC with Leading Edge
Modulation
Jeffrey Hwang10 min to design your power supply (V)
119
Design High Density AC Adapter
8 Pin 12V Secondary Fly Back Smart Driver, CM6201
VREF1
VCC2
VL_VTH3
VL4
AGND6
DCM_DET5
SRDRV7
PGND8
VCC
VOUT
VBUS
PWM
D2
D3
D4
R3
R2
R1
D1
C3
C2
C1
R5
R4
+
-
R6
-25mVM2
DIGITALCONTROL
DRV
CM62
01
VCC
DCM_DET
VREF
AGNDVL_VTH
VL
SRDRV
PGND
+
-
UVLOBIASBG
M1
OSC
Jeffrey Hwang10 min to design your power supply (V)
120
Design High Density AC Adapter
8 Pin 12V Secondary Fly Back Smart Driver, CM6201
• Pin to pin compatible with STSR30• Supply voltage range: 7 to 13.2V• Feed-Forward Peak Detect for wide input range• CCM or DCM Fly-back operation• Operating Frequency: up to 750 KHz• Automatic turn off for duty cycle less than 12.5%• Smart turn off (240nS)• Output driver: 15 Ohms sourcing and 6 Ohms
sinking capability
Jeffrey Hwang10 min to design your power supply (V)
121
24-hour Engineering Supports
• Champion Design Center– www.champion-micro.com
• Design Excel Spread Sheets– PWM design for Flyback Converter Section– CM6805, CM6806, CM6903 Design Tool
Input Current Shaping Technique PFC with Leading Edge Modulation
Jeffrey Hwang10 min to design your power supply (V)
122
PWM design for Flyback Converter Section
Input Current Shaping Technique PFC with Leading Edge Modulation
CM6805/CM6806 PWM SECTION for FlyBack Design User Inputs All Resistors, inductor and VCC Units User Inputs the Optical Couple Current and VCC
If the cell is filled with yellow color, it is a user input cell. Flyback Input Voltage (minimum) 200 V 200
Flyback Output Voltage 19 V 19Lm p (Primary Side Flyback Inductance) 3.36E-04 H 3.36E-04Ls (Secondary Side Flyback Inductance) 9.33E-06 H 9.33E-06
Turn Ratio, n = Np/Ns 6.00 6.00Switching frequency, fsw 6.75E+04 Hz 6.75E+04
Switching Period 1.48E-05 S 1.48E-05Duty Cycle, D (DCM but use CCM formula) 36.31% % 36.31%
1-D 63.69% % 63.69%Maximum Output Power 100 W 100
PWM system only efficiency 86% % 86%Maximum input Power 116 W 116
Primary Peak Current @ Full load & Steady State 3.20E+00 A 3.20E+00Primary Peak Current with D=Dmax=50% @200V 4.41E+00 A 4.41E+00
Secondary Peak Current @200V 2.65E+01 A 2.65E+01Rpwmsense 3.90E-01 OHM 3.90E-01
RV+I 500 OHM 500Qphoto Couple Current @ 100% load 5.00E-04 A 5.00E-04
Voltage Drop cross RPWMRSENSE @ 100% load 1.25E+00 V 1.25E+00Voltage Drop cross RV+I @ 100% load 2.50E-01 V 2.50E-01
Qphoto Couple Current @ 50% load 1.75E-03 A 1.75E-03Voltage Drop cross RPWMRSENSE @ 50% load 6.25E-01 V 6.25E-01
Voltage Drop cross RV+I @ 50% load 8.75E-01 V 8.75E-01Qphoto Couple Current @ 20% load 2.50E-03 A 2.50E-03
Voltage Drop cross RPWMRSENSE @ 20% load 2.50E-01 V 2.50E-01Voltage Drop cross RV+I @ 20% load 1.25E+00 V 1.25E+00
RPWMTRIFAULT1 2.60E+03 OHM 2.68E+03RPWMTRIFAULT2 + RNTC1 4.20E+04 OHM 4.20E+04
VCC=15V 15 V 15PWMTRIFAULT Voltage @ 20% load VCC="B12" 7.76E+00 V 6.80E+00PWMTRIFAULT Voltage @ 50% load VCC="B12" 9.71E+00 V 9.57E+00
Short Threshold ~ 14.3 V 14.3Green Mode Threshold ~ 6.8 V 6.8
VCC=13V 13 V 13PWMTRIFAULT Voltage @ 20% load VCC="B18" 5.76E+00 V 5.56E+00PWMTRIFAULT Voltage @ 50% load VCC="B18" 7.71E+00 V 7.57E+00
Short Threshold ~ 12.3 V 12.3Green Mode Threshold ~ 5.8 V 5.8
VCC=10V 10 V 10PWMTRIFAULT Voltage @ 20% load VCC="B22" 2.76E+00 V 2.56E+00PWMTRIFAULT Voltage @ 50% load VCC="B22" 4.71E+00 V 4.57E+00
Short Threshold ~ 9.3 V 9.3Green Mode Threshold ~ 4.3 V 4.3
CPWMTRIFAULT 2.24E-07 F 2.24E-07CV+I 1.50E-10 F 1.50E-10
Design OK or Not TRUE TRUE
Jeffrey Hwang10 min to design your power supply (V)
123
CM6805 CM6806 CM6903 Design Tool
Input Current Shaping Technique PFC with Leading Edge Modulation
CM6803 CM6804 CM6805 CM6806 CM6903 CM6904 Design Tool / Jeffrey H. Hwang Yellow cells are for user inputGreen-Mode Design USER INPUT INDUCTOR and CAPACITOR CALCULATED INDUCTOR and CAPACITOR
Output Pow er (Watt) 300 300PFC Output Voltage (V) 380 380
High LineEff iciency at High Line (%) 96 96High Line; Maximum Line Input Voltage (Vrms) (V) 260 260Peak Input Voltage at High Line(V) 367.6955262 367.6955262Input Line Current at High Line (Irms) (A) 1.201923077 1.201923077Peak High Line Current (A) 1.699775916 1.699775916Peak High Line Sw itching Current (A) 1.87616188 2.124719895Ripple Current at Peak High Line (%) 9.40142561 50Ripple Current at Peak High Line (A) 1.76E-01 0.424943979 Input Pow er at High Line (Watt) 312.5 312.5System Sw itching Frequency (Hz); Fixed fsw = 67.5 Khz 6.75E+04 6.75E+04Tperiod, Sw itching Cycle (Sec); Fixed fsw = 67.5 Khz 1.48E-05 1.48E-05Sw itch-On-Time at Peak input voltage (Sec) Assumed in CCM 4.80E-07 4.80E-07Sw itch-Off-Time at peak input voltage (Sec) Assumed in CCM 1.43E-05 1.43E-05Sw itching Duty Cycle at peak input voltage (%) Assumed in CCM 3.24E+00 3.24E+00
Low LineEff iciency at Low Line (%) 94 94Low Line; Minimum Line Input Voltage (Vrms) (V) 80 80Peak Input Voltage at Low Line (V) 113.137085 113.137085 Input Line Current at Low Line (Irms) (A) 3.989361702 3.989361702Peak Low Line Current (A) 5.641809424 5.641809424 Peak Low Line Sw itching Current (A) 6.82E+00 7.06E+00Ripple Current at Peak High Line (%) 17.26204392 20.08431848Ripple Current at Peak High Line (A) 1.18E+00 1.42E+00 Input Pow er at Low Line (Watt) 319.1489362 319.1489362Sw itch-On-Time at Peak input voltage (Sec) Assumed in CCM 1.04E-05 1.04E-05Sw itch-Off-Time at peak input voltage (Sec) Assumed in CCM 4.41E-06 4.41E-06Sw itching Duty Cycle at peak input voltage (%) Assumed in CCM 7.02E+01 7.02E+01
EXTERNAL POWER COMPONENTS RSENSE (Ohm) 0.08862405 0.08862405RAC (Ohm) 1.430E+06 1.430E+06 OPTION1: RACvcc (Ohm): the resistor betw een VCC and IAC 5.000E+05 5.000E+05Input Inductor for PFC Boost (H) 5.000E-04 4.151E-04Output Capacitor for PFC Boost (F) 2.50E-04 9.72E-05PFC Boost Output Before Droping for the Hold-Up Time Calculation
(V) 380 380PFC Boost Output After Droping for the Hold-Up Time Calculation
(V) 114 114Hold-Up Time (Sec) 0.051466567 0.02
COMPENSATION AND FEEDBACK for PFC Voltage Loop VEAO is a GMv, a Slew Rate Enhancement Transconductance
Amplif ier, a Voltage Loop Error Amplif ier
GMv, Transconductance at the w orse condition (mho) 9.00E-05 9.00E-05dVEAO for the maximum Pow er (V) 1.980E+00 1.980E+00Rvfb1 + Rvfb2 (Ohm) 3.00E+06 3.00E+06 Rvfb1 (Ohm) for VFB=2.5V 2.98E+06 2.98E+06Rvfb2 (Ohm) for VFB=2.5V 1.97E+04 1.97E+04R1c, Compensation Resistor for f tv =20Hz (Ohm) 1.25E+05 4.86E+04
Jeffrey Hwang10 min to design your power supply (V)
124
Summary High Density AC Adapter Design
• without additional cost– PFC: Efficiency~95.5% without additional cost
• 2 Level Boost Follower (200V and 380V)• Use LETE, CM6805, CM6806 and CM6903 family
– FlyBack: Efficiency~87.5% (without SR)– FlyBack: Efficiency~90% (with SR,
CM6201)– Total Efficiency ~ from 83.56% to 86%
Input Current Shaping Technique PFC with Leading Edge Modulation
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