7/27/2019 BIT IV Semester Syllabus
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Syllabus for BIT 4th Smester
Computer OrganizationBIT221CS
Year: II Semester: II
Teaching scheduleHours/Week
Examination Scheme
Theory Tutorial PracticalInternal
AssessmentFinal Total
3 1 -Theory Practical*
Theory
**Practical
100
20 - 80 -
** Duration: 3 hours
Course Objective: The main objectives of this course is to provide the knowledge of computer
hardware, Computer design as well as the various components is assumed to be in place and taskis to investigate the organizational structure to verify that the computer parts operate as intended.
1. Review of Digital Logic Circuits and Digital Components (2 Hrs)
1.1. Logic gates
1.2. Combination circuits1.3. Flip-flop
1.4. Sequential Circuits
2. Data representation (2 Hrs)
2.1. Data types2.2. Components
2.3. Fixed- point Representation2.4. Floating point Representation
2.5. Binary codes
2.6. Error detection codes
3. Computer organization and design (6 Hrs)
3.1. Instruction code3.2. Computer register
3.3. Computer instruction3.4. Timing and control
3.5. Instruction cycle3.6. Memory reference instructions
3.7. Input and output interrupt
4. Micro programmed control (3 Hrs)
4.1. Control memory
4.2. Address sequencing4.3. Design of control unit
5. Operating system support (3 Hrs)
5.1. Operating System Overview5.2. Scheduling
5.3. Memory Management
6. Central Processing Unit (6 Hrs)
6.1. Instruction formats
6.2. Addressing modes6.3. Data transfer and manipulation
6.4. Program Control
Kantipur City College 1
7/27/2019 BIT IV Semester Syllabus
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Syllabus for BIT 4th Smester
6.5. RISC and CISC
7. Pipeline and Vector Processing (5 Hrs)7.1. Parallel processing7.2. Pipelining
7.3. Arithmetic and Instruction Pipeline7.4. RISC pipeline
7.5. Vector processing7.6. Array processing
8. Computer Arithmetic (5 Hrs)
8.1. Addition and Subtraction8.2. Multiplication and Division Algorithms
9. Input and Output Organization (5 Hrs)
9.1. Peripheral Devices9.2. I/O interface9.3. Modes of transfer
9.4. Interrupt9.5. Direct Memory Access
9.6. I/O processor9.7. Data communication processor
10. Memory Organization (5 Hrs)
10.1. Memory Hierarchy10.2.Main Memory
10.3. Auxiliary Memory10.4. Cache Memory
10.5. Virtual Memory10.6. Memory Management Hardware
11. Multiprocessor (3 Hrs)
11.1. Characteristics of Multiprocessors11.2. Interconnection Structures
11.3. Inter Processor Arbitration11.4. Inter processor communication and synchronization
11.5. Cache Coherence
References:
1. M. Morris Mano Computer System Architecture2. William Stalling Computer Organization and Architecture
3. M. Morris Mano Digital Logic and Computer Design
4. David A. Paterson and John L. Hennessy Computer Organization and Design5. Vicent P. Heuring and Harry F. Jordan Computer Systems Design and Architerture6. Acdrew S. Tanenbaum Structured Computer Organization7. John P. Hayes Computer Architecture and Organization
Kantipur City College 2
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