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Fischer 08 1
Analog to Digital Converters
Nyquist-Rate ADCs
Flash ADCs
Sub-Ranging ADCs
Folding ADCs
Pielined ADCs
Successive Aro!i"ation #Algorith"ic$ ADCs
%ntegrating #serial$ ADCs
&versa"ling ADCs
Delta-Sig"a based ADCs
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Fischer 08 '
Conversion Princiles
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Fischer 08 (
ADC Architectures
Flash ADCs: )igh seed* but large area and high o+er dissiation,Suitable or lo+-"ediu" resolution #.-10 bit$,
Sub-Ranging ADCs: Require e!onentially e+er co"arators than
Flash ADCs, )ence* they consu"e less silicon area and less o+er, Pipelined ADCs: /ediu"-high resolution +ith good seed, he trade-
os are latency and o+er,
Successive Approximation ADCs: /oderate seed +ith "ediu"-
high resolution #8-1 bit$, Co"act i"le"entation,
Integrating ADCs or Ramp ADCs: 2o+ seed but high resolution,Si"le circuitry,
Delta-Sigma based ADCs: /oderate band+idth due to oversa"ling*
but very high resolution than3s to oversa"ling and noise shaing,
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Fischer 08
Peror"ance 2i"itations 1
n
Quant P 223
1 −=
≤
conveq f kTRn
6
1log
2log2
1
conveq N f kTR P TH 2=
her"al Noise 2i"itation Cloc3 4itter #Aerture$ 2i"itation
Normalized Noise Powers:
TH N Quant
P P ≥
2)(2
1 Jitter conv N t f P Jitter π =
LimitingCondition:
Jitter N Quant
P P ≥
≤
Jitter conv t f n
π 5.1
1log
2log
1
n-5it ADC Sinusoidal %nut S+ing6 719:
"a!; < conv
System Defnitions
MaximumResolution:
in;
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Fischer 08 =
Peror"ance 2i"itations '
Selection o ADC Architecture is driven by Alication
Displays
Audio
Sonar
Ultra Sound
Video
Wireless
Communications
Seismology
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Fischer 08 .
Parallel or Flash ADCs
Concetual Circuit
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Fischer 08 >
Sub-Ranging ADCs
)al-Flash or +o-Ste ADC
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Fischer 08 8
Folding ADCs
Princile Coniguration
…
2n1 Su!Ranges
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Fischer 08 ?
Folding Processor
"xam#le: 2!$it %olding Cir&uit
'2n-1+1)Io for n-Bit
2(o
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Fischer 08 10
Successive Aro!, ADCs
Concet %"le"entation
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Fischer 08 11
DAC Reali@ation 1
#9oltage /ode$
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Fischer 08 1'
DAC Reali@ation '
Sread Reduction through R-'R 2adder
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Fischer 08 1(
DAC Reali@ation (
C)arge!Redistriution Cir&uit
Pros %nsensitive +,r,t, &-a" ain &set #1B Noise$ co"ensated
Cons Requires non-overlaing Cloc3 )igh le"ent Sread Area &utut requires S)
valid only during φ'
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Fischer 08 1
DAC Reali@ation
S#read Redu&tion t)roug) &a#a&iti*e +oltage Di*ision
+= ∑ ∑
= =
−−3
0
7
4
)8()4( 2216
1
i i
i
i
i
iref out bbV V
valid only during φ'
Sread;'nB'
!a"le6 8-5it ADC
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Fischer 08 1=
DAC Reali@ation =
C)arge!Redistriution Cir&uit wit) ,nity!-ain .m#lifer
Pros 9oltage divider reduces sread 5uer lo+ outut i"edance No cloc3 required
Cons Parasitic ca causes gain error )igh &-a" co""on "ode inut required No a"liier oset co"ensation
A"liier %nut Ca/
C ain rror6 E;-CB1.C
1.B1=C
+= ∑ ∑= =−−
3
0
7
4
)8()4( 2216
1
i i
i
i
i
iref out
bbV V Sread;
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Fischer 08 1.
DAC8 +ith nity-ain A"liier
Su!range ut#ut ' LS$s3
0 0,=u 'u1,=u ',=u (,=u ,=u =,=u .,=u(u u =u .u1u
.m#lifer ut#ut
.,=u0 0,=u 'u1,=u ',=u (,=u ,=u =,=u(u u =u .u1u
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Fischer 08 1>
DAC Reali@ation .
Current Mode (m#lementation
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Fischer 08 18
Current Cell Floor Plan
Unit Current Cell
Sy""etrical Current Cell Place"ent
Current summing RailIout
Cascode
Current
Source
Switching
Devices
Array o '=. CellsR
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Fischer 08 1?
DAC %"le"entation
2ayout o 10-5it Current-/ode DAC '0,=µ" C/&S$
Current su""ing Rails
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Fischer 08 '0
/odiied SA Algorith" 1
%dea6 Relace DAC by an Accu"ulator
Consecutively divide Re by '
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Fischer 08 '1
/odiied SA Algorith" '
First cycle only
Accu"ulator
%dea6 /aintain Co"arator Reerence #< FS;nd$
Double revious Accu"ulator &utut
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Fischer 08 ''
SC %"le"entation
SC (m#lementation o4 modifed S. .DC
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Fischer 08 '(
i"ing Diagra"
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Fischer 08 '
&set Co"ensated Circuit
5set Com#ensated SC (m#lementation
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Fischer 08 '=
5uilding 5loc3s 1
DC -ain 66 d$
-ain!andwidt)
17 M8z9
CL 1/;#%
Power 1/< m=
ut#utSwing
+ #!#
ransconductance A"liier
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Fischer 08 '.
5uilding 5loc3s '
Power 7/; m=
Resolution > 7/; m+
Settling ?ime
< ns
Lat&)ed CMS Com#arator
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Fischer 08 '>
2ayout o 8-5it ADC
1.= µm #0,= µ" C/&S$
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Fischer 08 '8
Sice Si"ulation #5si"($
8-5it ADC6 cl3;10/)@ conv;1,'=/)@
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Fischer 08 '?
Pielined ADCs
Pielined "odiied SA or Algorith"ic ADC
Pros &set #1B Noise$ co"ensated /ini"u" C-sread &ne conversion every cloc3 eriod
Cons /atching errors digital correction or nG8 Cloc3 eed-through very critical )igh a"liier sle+ rate required
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Fischer 08 (0
%ntegrating or Serial ADCs
Dual Sloe ADC Concet
Constant Ram#Pro#/ to (n#utRam#
Using 2N/k samples requires ef ! F"/k re#uce# Integrator Constant
$%lement "prea#)
N represents #igital
equi&alent of analog Input
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Fischer 08 (1
SC Dual-Sloe ADC
10-5it Dual-Sloe ADC
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Fischer 08 ('
ADC esting
yes o ests
Static esting
Dyna"ic esting
%n static testing* the inut varies slo+ly to reveal the actual codetransitions, Hields %N2* DN2* ain and &set rror,
Dyna"ic testing sho+s the resonse o the circuit to raidly
changing signals, his reveals settling errors and other dyna"ic
eects such as inter-"odulation roducts* cloc3-eed-trough* etc,
Circuit
nder est
&utut%nut
Cloc3
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Fischer 08 ((
Peror"ance /etrics 1
rror yes
&set
ain
DN2
%N2
/issing Codes
%DA2 ADC
Stati& "rrors
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Fischer 08 (
Peror"ance /etrics '
2log2
)2
3(log
10
][
10
10max −
=
dBSNDR
ENOB
Noise
Signal
P
P SNR 10log10=
Frequency Do"ain Characteri@ation
%deal n-5it ADC6
SNR ; .,0' ! n I 1,>. d5:
Har Noise
Signal
P P
P SNDR
+= 10log10
fsig
A m p l i t u d e
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Fischer 08 (=
ADC rror Sources
Static rrors le"ent or Ratio /is"atches
Finite &-a" ain
&-a" Co"arator &sets Deviations o Reerence
Dyna"ic rrors Finite #A"liier$ 5and+idth
&-a" Co"arator Sle+ Rate Cloc3 Feed-through
Noise #Resistors* &-a"s* s+itched Caacitors$
%nter"odulation Products #Signal and Cloc3$
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Fischer 08 (.
Static esting
Servo-loo echnique
Co"arator* integrator* and ADC under test are in negative eedbac3 looto deter"ine the analog signal level required or every digital code transition,
%ntegrator outut reresents equivalent analog value o digital outut,
ransition values are used to generate inutBoutut characteristic o ADC*
+hich reveals static errors li3e &set* ain* DN2 and %N2,
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Fischer 08 (>
Dyna"ic esting
yes o Dyna"ic ests )istogra" or Code-Density est
FF est
Sine Fitting est
?est Set!u#
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Fischer 08 (8
)istogra" or Code-Density est
DN2 aears as deviation obin height ro" ideal value,
(ntegral nonlinearity '(NL3is &umulati*e sum 'integral3o4 DNL/
&set is "aniested by a
hori@ontal shit o curve,
ain error sho+s ashori@ontal co"ression or
deco"ression o curve,
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Fischer 08 (?
)istogra" est
Pros and Cons o )istogra" est
8istogram test #ro*ides in4ormation on ea&)&ode transition/
DN2 errors "ay be concealed due to rando" noise incircuit,
%nut requency "ust be selected careully to avoid
"issing codes # cl3B in "ust be non-integer ratio$,
%nut S+ing is critical #cover ull range$
Requires a large nu"ber o conversions #o 'n ! 1*000$,
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Fischer 08 0
Si"ulated )istogra" est
0!$it S. .DC wit) 7/;@Ratio "rror and ;m+A+Com#arator 5set
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Fischer 08 1
FF est
Pros and Cons o FF est
&ers quantitative %nor"ation on outut oise* Signal-to-Noise Ratio #SR$* Surious Free Dyna"ic Range
#SFDR$ and )ar"onic Distortion #SDR$,
FF test requires e+er conversions than histogra"
test,
Co"lete characteri@ation requires "ultile tests +ith
various inut requencies,
Does not reveal actual code conversions
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Si"ulated FF est
0!$it S. .DC wit) 7/;@ Ratio "rror and ;m+A+ Com#arator 5set
SFDR=! d"
S#DR=$% d"
'"=()*+
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