An Introduction to Assembler Language andSubroutine Linkages / Save Areas
Ch.5 - Topic 1
See Page 95
Additional information on subroutines in Topic 1 of Chapter 8 if you wish to read ahead
General Purpose Registers
• 16 GRPs – live in the Processor• All programs use the same 16 GPRs• Each GPR is 4 bytes (1 fullword)• Some GPRs should be avoided as they are often
used by the Operating System– Reg 0 & 1 used by system to pass info– Reg 13 always points to current Savearea– Reg 14 used for Return address– Reg 15 used for Forward address
• That leaves you 11 GPRs for your use
Subroutines
• Program within a program• Internal or External
– Internal: Assembled with the Main Program– External: Assembled separately from the Main Program – introduces some
interesting communication problems
• Requires Housekeeping– All routines must provide a
Register Save Area– All routines should adhere to linkage conventions
Main Program
SubRoutine
Register SaveArea
LA 13,SAVEAREABALR 14,15
SUBRTN SAVE (14,12) ST 13,SAVEA+4 LA 13,SAVEA --
Register SaveA
--L 13,SAVEA+4
RETURN (14,12)
START 0
• Does not create object code• Assembler Command• Signals beginning of source code• Establishes what should be the beginning location of the
program• If labeled, names the program
• Your program will be loaded into memory for its execution at location X’200’
Program Entry
REGS
• Creates names for the GPRs – Names appear in CROSS-REF list, numbers do not.
• Generates no Object Code
BEGIN BEGIN
• Performs what SAVE macro does• Names program (if not in START)• Provides a SaveArea
USING *,12
• Generates no object code• Establishes a Base Register• 1st Operand indicates the address -
* = address of next instruction• 2nd Operand identifies which register to use for Base Reg• Normally (not always) goes with:
• BALR example loads the address of the next instruction into R12, then would Branch to the location in the 2nd operand register – unless it is zero, then it does not Branch. Since USING establishes the Base register and BALR is first executable instruction in your program, your program is 2 bytes (length of BALR) different from load point of your program.
BALR 12,0
BAL & BALR
• Branch & Link (4-byte & 2-byte)• Places address of the next instruction into the 1st operand (a
Return Address?)• Then branches to the address in the 2nd operand (Entry to a
Subroutine?) unless the second operand is zero, then it doesn’t branch.
BALR 12,0USING *,12
Together BALR and USING establish addressability in your program. They need to appear in your program before the first symbolic reference used, which should be the next few instructions (not shown) which saves the calling programs registers into its savearea and makes your savearea current.
BAL & BALR
Calling Program
SubRoutine
LA 10,SUBRTNBALR 14,10
START 0REGS
BEGIN BEGINSAVE (14,12)BALR 12,0USING *,12
LA 14,SAVE+4RETURN (14,12)BR 14
SAVEAREA DS 18FSAVEAREA DS 18F
SAVE macro is changed into a STM 14,12,12(13) instruction. Recall, it saves the calling programs registers. The next executable instruction is BALR to establish addressability in your program.
SAVE
• A standard Macro Instruction• Generates multiple Assembler instructions• If used, it follows START (or CSECT)• Almost always coded as:
SAVE (14,12)
RETURN
• A standard Macro Instruction• Acts as the back end of SAVE - -• Restores registers that were SAVE’d and branches back to the
calling program
L 13,SAVEAREA+4RETURN (14,12)
LOAD (L, LR)
• 4-byte or 2-byte instruction• Takes contents of 2nd operand and places it as contents of the
1st operand• In both formats, 1st operand is a GPR
18 R1 R2
58 R1 X2
LR
L D2B2
LOAD (L,LR)
GPR 3 DIVISOR
BEFORE: 00 00 00 00 00 00 01 5C
AFTER: 00 00 01 5C 00 00 01 5C
L 3,DIVISOR
Load is used to move 4-bytes from memory into a register. Register instructions execute faster since they are located closer to the processor than memory. This is especially useful if the same value is to be used multiple times in a program.
LOAD ADDRESS (LA)
• 4-byte format only• Takes the address of the 2nd operand (rather than the contents)
and makes it the contents of the 1st operand
LA 13,SAVEAREA
The location (not the contents of the first word) is loaded into register 13
STORE (ST)
• 4-byte format• Takes the contents of the 1st operand and makes it the contents
of the 2nd operand• Reverse of LOAD
ST 13,SAVEAREA+4
The content of register 13 is moved to memory into SAVEAREA+4 in the program (a fullword). Remember that Load moved a fullword in the other direction – from memory into the register. There is no STORE instruction in the RR-format – A STR instruction would do the exact same thing as the LR instruction, if there was such an instruction as STR.
Extended Logical Branching
B
BH
BL
BE
BNH
BNL
BNE
Unconditional
Branch if 1st operand High
Branch if 1st operand Low
Branch if both operands Equal
Branch if 1st operand Not High
Branch if 1st operand Not Low
Branch of operands Not Equal
See page 114 - top
The contents of the first operand is compared to the contents of the second operand and the Branch is taken based on the results of the compare. If condition is not true, then the Branch is not taken.
END
• Assembler Command• Generates no instruction• Opposite of START (or CSECT)• Simply tells the Assembler there are no more source
statements to decode
The End
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