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5 Analog/Digital-Conversion
5.1 Components of A/D-ConvertersSample and hold circuit, Quantisation
P. 5-1Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.3 Iterative A/D-Converter 5.4 A/D-Converter with an Intermediate Quantity
5.5 Sigma-Delta-Converter
5.6 Errors by A/D-Converters
5.2 Flash A/D-Converter
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5.1 Components of A/D-Converters
Analog Mul t ip lexer
(MUX)
Selects anInput Channel
AnalogInputs
Control
Sample & Hold (S&H)
Holds the Analog
ValueConstantduring the
ConversionTime
Analog Digi ta l
Conver ter
Quantisation
Coding
Digital-Value
SOC EOC
MUX- Address S&H....
start endof conversion
0100
Pref i l te r ing
Keeps theSamplingTheorem
f 0
g Sampl f f 2
P. 5-2Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
8/19/2019 5 AD Conversion
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Sampling
Autliers Autliers
Earlier or later sampling gives adifferent result
P. 5-3Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.1 Components of A/D-Converters
Signal Frequency
“Apparent”Frequency
Sampling pulses
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k ea kT t t x t x
0
Sampling
t x e dt et x X t j ee )(Fourier Transformation
Inverse Fourier Transformation
dt e X t x t j ee )(21
Multiplication in Time Domain Convolution in Frequency Domain
)(t ut x ')'()'()( d U X U X
Sampl f T
10 Sampling Periode
P. 5-4Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.1 Components of A/D-Converters
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k
ea kT t t x t x 0
Sampling
n T nf
T 001
k kT t 0 0T : Sampling Periode
t x e e X
ne
en
en
n
ea
T n
f X T
duuf X T
nu
T
duuf X T n
uT
T
nf
T
f X f X
00
00
00
00
1
1
1
1
(Changing Summation and Integral)
(Dirac-Function)
P. 5-5Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.1 Components of A/D-Converters
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Sampling
Example Convolution ')'()'()( d U X U X
)'( X
'
)'( U
'
)'( U
'
)'( U
'
Mirroring
Translation
P. 5-6Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.1 Components of A/D-Converters
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)'( X
'
Sampling
Example Convolution
)'( X
'
1
Multiplication
Translation
Integration
')'()'()( d U X U X
)( U X
P. 5-7Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.1 Components of A/D-Converters
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SamplingExample Convolution with a Dirac Pulse
)()()()( 000 t t X d t X t t t t t X
t
X(t)
t
)( 0t t
0t
X(- )
t
)( 0t t
0t t 0t
)()( 0t t t x
P. 5-8Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.1 Components of A/D-Converters
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Sampling
t
X(t)
t
)( i t t
t
)()( i t t t x
1t 2t
1t 2t
P. 5-9Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.1 Components of A/D-Converters
Example Convolution with a Dirac Pulse
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SamplingTime Domain Frequency Domain
Multication Convolution
P. 5-10Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.1 Components of A/D-Converters
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g Sampl f f 2
Sampling
)(2 minmax f f f Sampl or more general
)(f X e
f g f
f Abt f g Abt f f g Abt f f Abt f 2 Abt f 3g f
2 Abt f
g Abt f f
2Overlapping Signal can not be reconstructed
Sampling theorem by Shannon or Nyquist-Criterion
P. 5-11Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.1 Components of A/D-Converters
Sampled Signal
Sampl f 3Sampl f 2Sampl f Sampl f Sampl f
2Sampl f
2
Sampl f
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Anti-aliasing-Filter
g f
2Sampl f f Pre-filtering no overlapping!
g Sampl f f 2 g Sampl f f 3,3
The slow rate of the Filter should be considered!
P. 5-12Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.1 Components of A/D-Converters
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Sample & Hold Circuit
+
-C
S 2
'
eu
auC ueu
S 1Sampling
Save
Forward Voltage Follower
No galvanic Connection tothe input
eu
Signal amplitude is hold constantduring A/D-Conversion
P. 5-13Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.1 Components of A/D-Converters
S 1 S 2opened
opened
closed
closed
Step 1: Sample
Step 2: Hold
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Opening the relais Response time andcharging the Capacitance(low pass from Q1 and C)
Droop (Regeldifferenz):
Discharge of the Capacitancebecause of leakage currents inQ1 und IC2(~1mV/ms)
C should habe a high value so that the „Droop“ is minimizedC should have a low value, so that fast changing signals can be followed
P. 5-14Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.1 Components of A/D-Converters
Sample & Hold Circuit
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Quantisation step12 2
max, eq
U U
Number of Digits
Number of
Output Stages
3 = 2 2-1
N-digits number
12max,
N e
q
U U
2-digits number
Quantisation noise
qqe
Um U U U
U 122
12
max,qqN
eUm U U
U U
1221 max,
1221 max,
N eU
2 N
n= 2 N
2N-1
4=2 2
Number of counting steps
Shift Thresholds at
1221
6 2max,max, ee U U
N-Digits digital number
01z z 011 z z z N
P. 5-15
5.1 Components of A/D-Converters
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Quantisierungsfehler
1221
21
2
minmax
minmax
N
LSBung quantisier
X X
StepsOutput X X X
error
minmax X X : Analog values sector
N : Number of Digits
eff noise
eff signal
U
U dB
N S
,
,lg20
12
1 2
2
2
,LSB
T
T LSBeff noise
U dt
T t
U T
U
Signal-Noise-ratio
P. 5-16Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.1 Components of A/D-Converters
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5.2 Flash A/D-Converter
P. 5-18Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
PrincipleComparison of the voltage to beconverted with well known graduated reference voltages
PropertiesResolution 4 to 12 Bit Suitable for a high signal dynamic
Stufe 1
Stufe 2
Stufe 3
Stufe 4
Comparators
BinaryOutputs
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P. 5-19
Example:Parallel-A/D-Converter with4-Comparators
1K
2K
3K
4K Voltage Comparator Signals DigitalNumber Output
00
4
2
4
1U U U E
00 43
42
U U U E
00 44
43
U U U E
0U U E
4321 K K K K 012 z z z
0001
0011
0111
000
001
010
011
25,0
0
5,0
75,0
1111 100 1
041
0 U U E
ref E U U
Decoder
0U
043
U
0
4
2U
041
U
Conversion Time dependent on switching speed of the comparators and the coder
– 10 8 Values/sec – high expenditure, 8-Bit ADU necessitates 2 8 – 1 comparators!
0000
5.2 Flash A/D-Converter
5 3 It ti AD C t
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5.3 Iterative AD-Converter Counting Procedure Use of D/A-Converter
– Count increases by 1 U V increases by Q= U – Reference voltage U V at the output of the DAU – Compare with U e – Equality stop counting – otherwise the counter increased (at clock) – new counter signal is D/A-converted – Procedure is repeated until U V > U e
Convesion time is dependent on : – Transient behavior of D/A-Converter
– Switching speed of comparators – Input value – Number of digits n of output(max. 2 n
steps) – Clock Frequency f
Advantage: better resolution through moreadjustable steps
P. 5-20Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
ClockGenerator
Clock
Stop
Comparator
Stop
Input
Erasecount-up counter
5 3 I i AD C
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5.3 Iterative AD-Converter
Incremental Follow-Up-Converter
forward and reverse counter
By a new conversion U v is notreset to „0“
Saves time in comparisonwith the incremental converter
The conversion is terminated,when U v is alternating increased
and decreased by U
P. 5-21Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
Set
Count-up
Counter
Forward
Reverse
Digital-AnalogConverter
5 3 I i AD C
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Digital- Analog-Converter by Pulse Wide Modulation
Basic CoponentsDigital stream
digital Pulse Stream analog Output Signal
FunctionThe digital pulses have the same frequency
The pulse wide („High“ -Duration) is proportional to the output voltageThe digital pulse stream is low pass filtered
The analog output voltage of the low pass filter is proportional to the mean
duration of the „High“ -level
RC-low pass filter
5.3 Iterative AD-Converter
P. 5-22Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5 4 A/D C t ith I t di t Q tit
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5.4 A/D-Converter with an Intermediate Quantity
u
f ||||
u x N x = f T Tor = k u x T Tor
VCO(VoltageControlledOscillator)
&
T Tor
u/f-Converter
u/t-Converter
ut ||||
u x &
Clock Signal f 0
N x = t f 0 = k‘ u x f 0
P. 5-23Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5 4 A/D C t ith I t di t Q tit
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P. 5-24
T x
T 0=1/ f 0
t
t
t
t
T 0
t
t
T x =1/f x
00 T f
T T
N x x
x x x x T f T T
N 00
Periode Duration Measurement Frequency Measurement
S 0
ux&S0 ux&S0
S 0
uxux
Counter & x N T 0
ux
given
Counter & x N f 0
ux
given
0f N
T x x 0T
N f x x
x x
x
x
x N f
f N N
T T 1
0
0
x x
x
x
x N T
T N N
f f 1
0
0
5.4 A/D-Converter with an Intermediate Quantity
5 4 A/D C t ith I t di t Q tit
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25
u/f- Sawtooth-Converter
• Relative slow, sampling time can beuntil 2n / f ref long
• Sensitive to noise-peaks
The frequency of occurence of thepulses is dependent on theIntegration time ( t x-t 1)
If U a reaches U r the relais is closedduring T a
The capacitance is discharged duringthe constant time T a
entladen des Kondensators
Impulsformer
P. 5-25
5.4 A/D-Converter with an Intermediate Quantity
5 4 A/D Converter with an Intermediate Quantity
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u/f- Converter by the charge balancing method
I 0: Constant current source
0t t
0t t r a U U
mono-stable trigger circuitchanges ist input during T a
ux is integratedIntegration time isdependent on ux
Discharging during current sourceis connected
Faster conversion
Integration during T a(constant time intervall)
T g and f g are the maesure for thevoltage U x
P. 5-26Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.4 A/D-Converter with an Intermediate Quantity
5 4 A/D Converter with an Intermediate Quantity
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27
u/t- Pulse Wide Converter
f N
RC U
U x x 0
RC t U
U dt U RC
U U at
aa 0
max,0
0max,1
0)( 3 t U a
x x a
x x a
t t RC U
RC t U
U
U t U
300
max,
)(
f N
U RC U
t t x x x 0
3
5.4 A/D-Converter with an Intermediate Quantity
5 4 A/D Converter with an Intermediate Quantity
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Dual Slope Voltage-Time -Converter
-
+
-
+
Integrator
Comparator
Ue
-Uref
Rs 1
s 2 Ua
Control+Clock
s
& Counter Z000000
Dual-Slope-Converter
• First, U e is integrated during the given Time intervall T 1, than U a is desintgratedthrough Integration of – U
ref by 0
• Is U a=0 reached, the counting is stopped
• The time intervall T1 is well known but independent on U e
• The time intervall T 2 of the desintegration is proportional to U e
P. 5-28Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.4 A/D-Converter with an Intermediate Quantity
5 4 A/D Converter with an Intermediate Quantity
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-
+
-
+
Integrator
Comparator
Ue
-U ref
Rs
1
s 2 Ua
Control+Clock
s
& counterZ000000
Dual-Slope-Converter
T1(given):Integrator charges the capacitance (counter N 1)
T2(whilst U a>0) :Integrator discharges capacitance; (counter N 2)
Typisch: Conversion Time 10 msResolution: >14 bit
s
01
Ua
T1 T2
t
t
für U e2 >U e1
P. 5-29Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.4 A/D-Converter with an Intermediate QuantityDual Slope Voltage-Time -Converter
-
5 4 A/D Converter with an Intermediate Quantity
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1~ N
The precision is onlydependent on U ref !
2~ N
1
2
N N
U u ref x
Dual Slope Voltage Time Converter
• Very high resolution• Slow (typ. f Tast a few10 Hz)• Not sensitive to drift (clock,
RC,...) and to noise (because ofintegration)
P. 5-30Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.4 A/D-Converter with an Intermediate Quantity
01
)(2
1
3
2
3
t
t
t
t ref xa dt U dt u RC
t U
0)()( 2312 t t U t t u ref x
021 N U N u ref x
-
5 5 Sigma Delta Converter
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Integrator
1 Bit-Delta-Modulator
Prediction
Error Value
Analogsignal
Bit Stream
1 Bit-Sigma-Delta-Modulator (Smoothed Version of the Delta-Modulator)
1 Bit-A/D-Converter
5.5 Sigma-Delta-Converter
Rising
more „1“
DecayMore „0“
constant valuemore swiches
y(t)„1“
„0“t
t
Inputsignal
P. 5-31Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5 5 Sigma-Delta-Converter
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5.5 Sigma-Delta-Converter
PropertiesSampling frequency typ. 100 kHzOversampling: f a >> f smaxTyp. 10-24 Bit resolution
Application in audio technology
„Delta“ „Sigma“Components
ref ref U BitstreamU 2
„1“-Density≈ Information
Mean value (Bit stream) = Mean Value (Signal) = Mean Value (Feed Back)
+U ref
-U ref t
„1“
„0“t
P. 5-32Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
comparator 1 Bit storeintegrator Difference
AnalogInput
Clock
Bit streamoutput
5 5 Sigma-Delta-Converter
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Typical: Conversion Time 1 msResolution: >16 bit
0
0
10
10
I I K U
I I K U
r a
r a
1 Word
01
T i i C
U r x a
V V U N N
U M x 8,0154
2
1
[Schrüfer]
5.5 Sigma-Delta-Converter Possible Realisation
P. 5-33Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5 5 Sigma-Delta-Converter
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5.5 Sigma Delta Converter
Integration
Difference
Compare with0V
Fit to the clockedge
Clock rate =Sampling rate(64-times higher thansignal frequency
Pulse proportionModulated Signal
Eingangsspannung bei U ref Less Switching
P. 5-34Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5 5 Sigma-Delta-Converter
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P. 5-35http://www.beis.de/Elektronik/DeltaSigma/DeltaSigma_D.html
5.5 Sigma Delta Converter
Integration
Difference
Compare with0V
Fit to the clockedge
Clock rate =Sampling rate(64-times higher thansignal frequency
Pulse proportionModulated Signal
5 5 Sigma-Delta-Converter
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Mean Value of the bit stream corresponds to:Input signal overlapped with disturbing signals
The more bit stream pulses are used the more precise is the mean valueOversampling is necessary
Reducing the sampling pointsincreasing resolution
Input:16 1Bit-Values
16:1decimation
Meanvalue
Output : 4Bit-Value
Digital Decimation from Bit Stream
01114375,0167
5.5 Sigma Delta Converter
(Down Sampling, reducing the number of samples in a discrete-time signal)
P. 5-36Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.5 Sigma-Delta-Converter
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Input Signal
Input Signal –Feedback Signal
Feedback Signal
Integrator Output Signal
5.5 Sigma Delta Converter
P. 5-37
5.5 Sigma-Delta-Converter
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Comparator
Bit Stream
Low Pass Filtered Signal
Digital Low Pass Filter:
g
g
s s F
)(
gesa mt ref N
N U t U 1)(
5.5 Sigma Delta Converter
P. 5-38
5.5 Sigma-Delta-Converter
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39
0 0.5 1 1.5 2 2.5 3x 10-3
00.5
1Digital zurückgerechnetes Signal mit Fenster=1
Zeit ins [s]Amplitudein[V]
0 0.5 1 1.5 2 2.5 3x 10-3
00.5
1Digital zurückgerechnetes Signal mit Fenster=10
Zeit ins [s]Amplitudein[V]
0 0.5 1 1.5 2 2.5 3x 10-3
00.5
1Digital zurückgerechnetes Signal mit Fenster=50
Zeit ins [s]Amplitudein[V]
0 0.5 1 1.5 2 2.5 3x 10-3
00.5
1Digital zurückgerechnetes Signal mit Fenstergrösse= 125
Zeit ins [s]Amplitudein[V]
0 0.5 1 1.5 2 2.5 3x 10-3
00.5
1Digital zurückgerechnetes Signal mit Fenster=500 (eine Periode)
Zeit in [s]Amplitudein[V]
Example. Window 1
Example. Window 2
The bigger the window is, thesmaller the limit frequency of
the digital Low PassMean ValuePhase Shift
125120
196.0
12594
175.0
5.5 Sigma Delta Converter
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P. 5-40Frequency of the disturbing signals in theneighborhood of the signal frequencyHigh Signal Value
5.5 Sigma-Delta-Converter 1 O d g
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g
Sigma-Delta-Converter 2. Order Reducing disturbing signals
1. Ordnung
http://www.beis.de/Elektronik/DeltaSigma/DeltaSigma_D.html
Signal band width can be higher Clock rate kann be smaller Accuracy of the output signal can be higher (less conversion noise)
Not one after the other!
P. 5-41Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.5 Sigma-Delta-Converter
http://www.beis.de/Elektronik/DeltaSigma/DeltaSigma_D.htmlhttp://www.beis.de/Elektronik/DeltaSigma/DeltaSigma_D.html
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gStructure
Two Disturbations
• Quantisation noise (Digitalisation)
• Conversion Noise (within the Bitstream) dependent on:
- Order of the Sigma-Delta-Converter
- Oversampling rate
P. 5-42Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
5.5 Sigma-Delta-Converter
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gConversion Noise
Modulator Order
Typical:24 Bit, Modulator third order with 64-Times Oversampling(-160 dB Conversion Noise and -147 dB Quantisation Noise)
P. 5-43Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
SNR [dB]
Oversampling Rate
5.5 Sigma-Delta-Converter
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g
High FrequencySignal is supressedDistrubing Effects are amplified(„ Alias-Effekt “)
Lower Frequency BandDesired input signals are transmittedDisturbing signals are significantly reducedFor Modulators of a higher order disturbingsignals are even better supressed (" NoiseShaping ")
Störsignal (Komparator und Speicher)
Störsignal (Komparator und Speicher)Nutzsignal
First Order
Zweite Ordnung
Nutzsignal
P. 5-44Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
Disturbing Signal
Usefull SignalDisturbing Signal
Usefull Signal
Second Order
5.6 errors by A/D-Converter
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Offset-Error
Amplification Error
Absolute Deviation of the
width of theQuantisation Steps fromIdeal Value 1 U LSB
Deviation betweenconverted value and theright value
Integral Nonlinearity
Differential Nonlinearity
P. 5-45Prof. Dr.-Ing. O. KanounChair for Measurement and Sensor Technology
Overview A/D-Converter
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Overview A/D Converter
Prof. Dr.-Ing. O. Kanoun
Flash Converter SuccessiveApproximation
Dual Slope Sigma Delta
MainAdvantages
Disadvantages
ConversionTime
Typ.Resolution
Slow Conversionrate. Highprecision external
componentsnecessary
Speed limited to~5Msps. Mayrequire anti-
aliasing filter.
Metastability, highpowerconsumption, large
size, expensive.
Higher order (4thorder or higher) -multibit ADC and
multibit feedbackDAC.
Ultra-High Speed
when powerconsumption notprimary concern
Medium to high
resolution (8 to16bit), 5Msps andunder, low power,small size.
high resolution,
low powerconsumption,good noiseperformance
High resolution, low
to medium speed,digital filter reducesanti-aliasingrequirements.
Does not changewith increasedresolution.
Increases linearlywith increasedresolution.
Increases linearlywith increasedresolution.
Tradeoff betweendata output rateand noise freeresolution.
Ca. 10 ns-100ns Ca. 1 µs-100µs Ca. x ms Ca. 200 µs-2ms
16 bit24 bitMore bits?
12 bit22 bit
8 bit18 bit
4 bit8 bit
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