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4_DC Biasing BJTs
4.1
Introduction4.2
Operating Point
Active or Linear Region Operation
Base Emitter junction is forward biasedBase Collector junction is reverse biased
Good operating point
Cutoff Region Operation
Base Emitter junction is reverse biased
Saturation Region Operation
Base Emitter junction is forward biasedBase Collector junction is forward biased
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4.3
Fixed-Bias Circuit
-VCE ICRC+ VCC= 0
VCE= VCC ICRC
Base Loop (voltage drops)
-VCC+ IBRB+ VBE= 0
IB= (VCC VBE)/RB
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Fixed_base_current_load_line.obj simulation
Q1
Q2N2222
V1
0Vdc
I1
0.5mAdc
0
R1
40
V2
10Vdc
I
I
V_V1
0V 1V 2V 3V 4V 5V 6V 7V 8V 9V 10VIC(Q1) - I ( R1)
0A
200mA
400mA
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Example 4.1
Work through finding the base and collector currents.
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Saturation Region
ICsat= (VCC- 0)/RCand in active region,
IC= IB or IB= ICmax/
In saturationIBis greater than ICmax/
There is
Saturation 0.2V is
better approximation,
but use 0V for now.
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Bjt_resistor_bias.obj simulation
Q1
Q2N2222
V2
10Vdc
0
R1
150k
V1
5Vdc
R2
150k
V3
5Vdc
Q2
Q2N2222
V4
10Vdc
0
R3
1k
Run simulation and note voltages and currents.
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Saturation ....continued
Modify Example 4.1
Find ICmaxFind RBminimum where transistor is on the edge of saturation.
Reduce RBfurther and find base and collector currents.
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Load-Line Analysis
Maximum collector-emitter
voltage occurs when ICequalszero.
No drop across RC.
Maximum current is
ICsat= (VCC- 0)/RC
Collector-emitter volageequlas zero.
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BJT_load_line.obj simulation
Q1
Q2N2222
V1
0Vdc
I1
0Adc
0
R1
100
V2
10Vdc
I
I
V_V1
0V 1V 2V 3V 4V 5V 6V 7V 8V 9V 10VIC(Q1) - I ( R1)
0A
100mA
200mA
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4.4 Emitter-Stabilized Bias Circuit
Find the base current. Use Kirchhoffs voltage around the base-emitter loop.
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Show that,
IC= (V
CC V
BE)
RB+ (+ 1)REand when,
RB
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Use the base current equation to find the part of the input resistance due to the emitter resistor.
Look at the loop equation written earlier
VCC IBRB VBE- (+ 1)RE = 0
Now draw the circuit that matches this equation,
Note that the voltage drop across Re has not changed. The resistor Re is reflected back into the base input
circuit and multiplied.
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Collector-emitter loop
Go around the loop and show the voltage relationships including
VC, VE, and VB
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R1
20k
R2
10k
Rc
1k
Re
1k
Vcc
15Vdc
Q1
Q2N2222
0
R3
100k
Run simulation and note the voltages and currents.
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Emitter-stabilized bias circuit for Example 4.4.
Find the currents and voltages for this circuit.
Review the load line for the circuit.
Write the collect-emitter loop equation again and show the min and max current conditions.
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4.5 Voltage-Divider Bias
Show that by developing a Thevenin equivalent for the input the circuit becomes the same as the emitter-
stabilized circuit.
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4.6 Beta-stabilized circuit for Example 4.7.
Work the circuit.
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Common_base
CB-1.obj simulation
R1
1k
Rc
1k
Q1
Q2N2222
V15Vdc
Vcc
12Vdc
0
CB-2.obj simulation
Rc
1.5k
Q1
Q2N2222
V1
3Vdc
Vcc15Vdc
0
Vee
3.5Vdc
Rc1
2.5k
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Common Collector (Emitter Follower)
CC-1.obj simulation
RB
1k
Re
1k
Q1
Q2N2222VB
5Vdc
Vcc
12Vdc
0
V
CC-2.obj simulation
RB
100k
Re
1k
Q1
Q2N2222VB
5Vdc
Vcc
12Vdc
0
Re1
1k
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DC bias circuit with voltage feedback.
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4.8 Design Operations
Start with a set of transistor collector-emitter characteristics.Draw a load line.
Determine the values of component values, voltages and currents.
Perform for,
Fixed bias circuit.
Emitter-stabilized circuit.
Voltage-divider circuit.
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4.9 Transistor Switching Networks
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4.11 PNP Transistors
Perform for,
Fixed bias circuit.
Emitter-stabilized circuit.
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4.12 Bias Stabilization
Shift in dc bias point (Q-point) due to change in
temperature: 100 degrees C
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4.13 Practical Applications
Relay driver
Transistor switch
Constant current source - CB and CE configurations.
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