ZXG10 IBSC Architacture,Hardware Detail,System Discription

117
Internal User Only▲ iBSC System Structure and Pri nciples

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Transcript of ZXG10 IBSC Architacture,Hardware Detail,System Discription

G_TM_iBSC_R1.0Internal User Only
Purpose of this course
You are expected to know the following knowledge after this course
Functions, features and specifications of iBSC
Hardware structure, shelves and boards of iBSC
Interface design and logic units of iBSC
Control plane and user plane signal flow of iBSC
Internal cable connection of iBSC
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Signal Flow on iBSC Control Plane and User Plane
iBSC Internal Cable Connection
intelligent
with only two racks
EFR
All IP hardware architecture
Modular design with good scalar
Separation of control streams from media streams
Supporting Flex A and Flex Gb
Coding scheme: FR/HR/EFR/FR-ARM/HR-AMR
Transmission interface: E1/T1/FE/STM-1
ZXG10 iBSC Product Features
Support 2G/3G inter-operating, co-platform of hardware with 3G equipments to future network convergence and evolution;
High integration, small footprint and low power consumption;
Max. Traffic reaches 15,000 Erl and Max. transceiver number is 3072 TRX;
Support 900M/1800M dual band networking, EGPRS, and eMLPP;
Large capacity to reduce inter-switches among BSCs and assure network KPI;
Supports concentric circle and dense frequency multiplexing etc. as to ensure total coverage and capacity;
Using traffic equalization algorithm like dynamic priority of cell switching and portfolio switching to assure network quality;
Supports AMR-HR/AMR-FR;
Supports TC POOL to save A interface resources;
Supports dynamic distribution of CS and PS resources to make full use of Abis interface resources;
BSCplus implements local traffic switching.
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Universal
Internal User Only
Boards
Different software can be used to define different functions for the same board.
AIU, BIU, PCU and TCU are logical units; All interface units are in the resource shelf.
Easy Scalability
3 RCBUs/2 racks.
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iBSC supports multiple access modes
E1/T1
STM-1
FE/GE
Evolution
iBSC
iBSC
iBSC
Advantages
Saves 20% space when 2G and 3G modules are integrated into the same site.
Shares cabinets, spare parts, transmission and OMM.
Saves power consumption
BSC
BSC
RNC
RNC
3072
2,000 * 800 * 600
Power Consumption
All E1: 2,558W/1 rack, 6,368W/2 rack All IP: 2,542W/1 rack,3,808W/2 rack
Power Source Requirements
Operating Temperature
Long-term temperature: 0°C–40°C. Short-term temperature: -5°C–45°C.
Operating Humidity:
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Now, I will introduce ZTE BSC dimensioning principle and result. First please, please focus on BSC capacity, which is showed in this table.
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The all-IP architecture conforms to the trend towards an IP-based network
Large capacity and strong processing capabilities
Supports E1, T1, STM-1 and IP interfaces and flexible networking modes
ZXG10 iBSC Performance Specifications
E1 Gb: 256Mbps IP Gb: 600Mbps
Maximum TRXs supported
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Signal Flow on iBSC Control Plane and User Plane
iBSC Internal Cable Connection
A – TDM (E1, STM-1), IP
Gb – TDM (E1), IP
Control shelf (BCTC), resource shelf (BGSN), switch shelf (BPSN)
Boards
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Work Planes: The iBSC adopts the control and bearer separated structure. Work planes include the control plane and the user plane.
Major Interfaces: see the previous introductions.
The iBSC contains four levels of shelves (three shelf types). The control shelf is in Level 2 and the packet switch shelf is in Level 4. The resource shelf is in Level 1 and Level 3.
The iBSC has 16 physical boards. Some physical boards can provide different logical functions by loading different logical drives.
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System operation and maintenance
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ZXG10 iBSC Boards
Level 2 switch of control plane signaling
CMP
Control Main Processor
Control and management of CS and PS services, processing of BSSAP and BSSGP protocols, and resource management of the system
CHUB
OMP
SBCX
BPSN
GLI
PSN
Packet Switch Network
Provides bi-directional user plane data switch with a capacity of 40 Gbps on each direction
BGSN
SPB2
Signaling Processing Board
Signaling processing, interface board (16 E1 lines for A/Gb, eight E1 lines for Abis)
GUIM
Giga bit User Interface Module
Level 2 switch between the control plane and the user plane, resource shelf management
GUP2
GSM Universal Processing
Processing of user plane protocols, such as TC, PCU and RTP
DTB
SDTB2
Provides two STM-1 interfaces
Provides four FE interfaces or one GE interfaces for Abis/A/Gb
EIPI
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This page introduces the 16 physical boards of iBSC. Boards marked red can provide different logical functions by loading different logical drivers.
All boards ending with "2" refer to the second generation. Their functions are the same as the first generation but the processing capacity is stronger.
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Physical Board
Logical Board
Functions
GIPI
IPBB
Completes IP access over the Abis interface, and sever the control plane from the user plane
IPI
Completes IP access over the A interface, and sever the control plane from the user plane (signaling from service)
IPGB
Completes IP access over the Gb interface, and sever the control plane from the user plane
GUP2
BIPB2
Search 20 ms TRU frames according to the channels and form IP packets For IP access over the Abis interface, it also processes RTP.
AIPB
UPPB2
DRTB2
Completes the transcoding and rate adaptation of TRAU frames, and provides FR, EFR, AMR and TFO functions
SPB2
LAPD2
GIPB2
Provides Gb interface functions, and processes the FR, NS and partial BSSGP of GPRS.
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Internal User Only
Introduction to BCTC
Completes the global operation and maintenance of the system, provides the global system clock, manages the control plane, and responsible for the switch between the control plane and the Ethernet
Each iBSC must be configured with one control shelf, which is located in Shelf 2 in Rack 1
No.
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BCTC Working Principles
The clock generation board (ICM) distributes clock signals to the switch shelf and resource shelves through cables.
OMP and SBCX boards are connected to the iOMCR through the hub to sever intranet segments from Internet segments.
The CHUB acts as the control stream convergence center for the control streams from the switch shelf, the resource shelf and the control shelf.
CHUB
CMP
UIMC
OMP
ICM
BCTC
Outside
network
UIMC
BPSN
GUIM
BGSN
8
K
Acts as the Level 2 switch center.
The BGSN is configured in Shelf 1 and Shelf 3 of the main rack. When a single shelf constitutes an office, it is configured in Shelf 2.
No.
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BGSN Working Principles
The GUIM board is the convergence and switch center for various data in the resource shelf. It completes the information exchange between modules.
The GUIM board interconnects with the GLI board in the packet switch shelf to carry out level 1 switch between different resource shelves.
DTBs and SPBs provide E1 interfaces, and SDTBs provide STM-1 access.
GIPI boards provide FE and GE access.
Processes universal services (conversion from TC and TDM to IP packets, processing of user plane protocols).
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Introduction to BPSN
Interconnects BGSNs and Level 1 switch centers on the user plane.
Each iBSC should have one BPSN, which is configured in Shelf 4.
If the iBSC has two BGSNs, then the BPSN is not mandatory. However, this can affect the capacity expansion of the system.
No.
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BPSN Working Principles
The GLI board receives user plane data from the GUIM board.
The PSN provides 40Gbps data switch capacity.
The UIMC receives clock and control signals from the control shelf and distributes control & management interfaces and clock signals in the shelf.
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Shelf Configuration (1)
Abis Interface E1
Signal Flow on iBSC Control Plane and User Plane
iBSC Internal Cable Connection
OMP
The OMP board processes the global procedure, performs O&M related control of the entire system (including O&M proxy), and connects to the OMM through the 100M Ethernet.
As the processing core of iBSC operation & maintenance, the OMP board can directly or indirect monitor and manage all boards in the system. It provides two links (Ethernet interface and RS485) for configuration management of system boards.
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CPU A is responsible for global operation & maintenance.
CPU B is the Router Processing Unit (RPU).
The HD Disk is a 2G hard disk to store system data, for example, board software version files, configuration files and logs.
What are the functions of the RPU?
1. Enables intranet addresses within the BSC to communicate with each other.
2. Provides routes for the operation and maintenance of the BTS.
RPU 1 BSC 2 iomcrIPAbisomcbOMCB

CMP
The CMP board controls and manages service calls in the PS and CS fields, and manages the resources of BSSAP, BSSGP and the system.
Its physical board is MPx86/2, the same as the OMP, but the memory capacity is slightly different: 1GB/CPU for the OMP, and 2GB/CPU for the CMP, and the OMP has a hard disk).
Internal User Only
UIMC
The UIMC is responsible for Ethernet Level 2 switch within the BCTC and the BPSN and the management of the BCTC.
The UIMC provides the clock drive function inside the BCTC and the BPSN. It inputs 8K and 16M signals, which are sent to different slots in the BGSN after phase lockup to provide 16M and 8K clocks for the boards.
The UIMC provides management interfaces for the BCTC and the BPSN; it also provides board resetting and resetting signal collection functions for the BCTC and the BPSN.
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UIMC
The UIMC provides one internal GE interface that is connected to the CHUB.
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CHUB
The CHUB works together with the UIMC/GUIM to be responsible for control plane data stream exchange and convergence in the system.
The control plane data from each shelf is sent to the Ethernet switching unit of CHUB board through the Ethernet cables on the control plane.
The data is then sent to UIMC board of the BCTC through GE for level-2 switch, and then distributed to each CMP board for processing.
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CHUB
The RCHB1 board has three FE buses, on which FE interfaces are grouped as FE1–8, FE9–16 and FE17–24.
The RCHB2 board has three FE buses, on which FE interfaces are grouped as FE25–32, FE33–40 and FE41–46.
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ICM
Responsible for system clock supply and external synchronization. The board extracts clock reference via the A interface and drives multiple channels of clock reference signals for use by each interface unit.
It receives GPS satellite signals and extract 1PPS signals and related TOD messages. The 1PPS signals are used as reference for phase lockup in order to create PP2S,19.6608MHz and 8 K clock references for iBSC.
Supports background or manual selection of clock references, including BITS, line (8 K), GPS, local (Level 2 or Level 3); supports software shielding of manual switchover.
Supports four work modes: CATCH, TRACE, HOLD and FREE.
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ICM
8 K reference inputwhen DTB/SDTB2 provides the clock reference, it connects with the 8KOUT/DEBUG-232 interface of RGIM1.When SPB2 provides the clock reference, it connects with the 8KOUT/CPU1-RS232 interface of RSPB.
One CLKOUT interfaces outputs a one-to-six cable; one shelf has two UIM/GUIM boards with two clock sockets, so one CLKOUT interface can connect with three shelves. The RCKG1 board has two CLKOUT interfaces providing six clock output lines, that is , it can connect with six shelves.
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SBCX
The SBCX board is the server board. It mounts the server on the rack.
It provides the keyboard, the mouse and the VGA interface.
Uses Sossaman dual-path dual-core CPU with a frequency of 2G Hz.
Supports multiple operating systems, including Windows XP/2000/2003, Linux and Solaris.
Provides three FE interfaces, two GE interfaces and one RS232 serial port.
Provides four universal USB interfaces.
Supports boot from hard disk and boot from USB drive.
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SBCX
OMC1(eth3) is set to an external network address to communicate with NetNumen M31 server.
OMP1(eth6) is set to an intranet address to communicate with the OMP.
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Provides 32 E1/T1 links for external connections.
Supports extraction of 8K synchronization clock from the lines, which is transferred to the CLKG/ICM board through the cable as clock reference.
Supports 120/75 Ω impedance selection for E1 cables, and supports coaxial cables and twisted-pair cables.
Supports 100 Ω twisted-pair T1 cables.
Internal User Only
S1~S6 S9 S12
Used to set the resistances that match the impedances of different E1 paths to 75 Ω or 120 Ω.
75 Ω
S7 S8
Used for indicating the receiving matching impedance of corresponding E1 chip to the CPU.
75 Ω
S10 S11
Used for reporting the long/short wire status of each E1 chip to the CPU.
SHORT HAUL
S10 S11 DTBDDF
RDTB Jumpers
On the RDTB, the E1 cable works in the 75 Ω unbalanced coaxial transmission mode by default.
If the E1 line uses 120 Ω balanced transmission mode, the short-circuit block at X9–X16 on the RDTB needs to be removed.
The sending end is grounded through the jumper. The receiving end is connected to a capacitor and then grounded through the jumper. Jumpers X9–X16 are used to complete such settings.
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Connect E1_TXN-R to the protection ground (Path N)
3-4
Connect E1_RXN-R to the protection ground (Path N)
5-6
Connect E1_TXN+1-R to the protection ground (Path N+1)
7-8
Connect E1_RXN+1-R to the protection ground (Path N+1)
9-10
Connect E1_TXN+2-R to the protection ground (Path N+2)
11-12
Connect E1_RXN+2-R to the protection ground (Path N+2)
13-14
Connect E1_TXN+3-R to the protection ground (Path N+3)
15-16
Connect E1_RXN+3-R to the protection ground (Path N+3)
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SDTB2
The SDTB2 acts as the digital trunk interface board. It provides two 155M STM-1 standard interfaces.
Supports CAS and CCS, and provides an access processing capacity equal to 126 E1 lines or 168 T1 lines.
Outputs one path of differential 8 K synchronous clock signals for the reference of the clock board.
Internal User Only
SPB2
According to its functions, the SPB2 board can be classified into the LAPD processing board (LAPD2), the signaling processing board (SPB2) and the Gb interface processing board (GIPB2).
The LAPD2 board processes LAPD signaling. LAPD signaling data from the BTS are received by the DTB/SPB/SPB2 board, and then switched to the LAPD2 board through the circuit switching net on the UIM board in the local resource shelf or the GUIM board in the local Gigabit resource shelf. The LAPD2 completes the processing of LAPD signaling data.
The SPB2 board processes MTP2 and X.25 protocols. It supports extraction of 8 K synchronization clock from the lines, which is transferred to the CLKG board through the cable as clock reference.
The GIPB2 board processes the FR, NS and partial BSSGP protocols for the GPRS, and provides Gb interfaces.
SPB2SPBR8R9
SPB2
Interface unit, which connects with the switching unit and provides E1 interfaces.
Circuit switch unit, which implements the switching between interface unit circuits and backplane circuits.
CPU, which implements signaling processing, board management and internal connection control.
Ethernet Switch Unit, which implements control plane and user plane data switch and provides FE interfaces.
Clock Unit, which extracts line clock signals and sends them to the ICM board.
Each SPB2 board contains four CPUs.
Each SPBs board provides 16 E1/T1 interfaces.
SPB24CPUCPU8K16E1
GIPI
The GIPI board provides IP interfaces between iBSC and the BTS, the SGSN and the MSC/MGW.
Implements Layer 3 protocol interface processing, separates control plane data from user plane data, and sends the data respectively to the Ethernet interfaces on the internal control plane and user plane.
According to functions, GIPI can be classified into four functional boards:
Abis interface Gigabit IP interface board(IPBB)
A interface Gigabit IP interface board IPAB(Signaling)
A interface Gigabit IP interface board IPI signaling and service
Gb interface Gigabit IP interface board(IPGB)
TIPB2aTer Interface Process BoardAterTDM/IP20 msTRAUIP
Internal User Only
GIPI
The Interface Unit receives data and sends it to the service processing unit, which separates user plane data from control plane data. User plane data is then sent to the GUP2 through the user plane switch network, and control plane data is sent to the CMP through the control plane switch network.
The GIPI board can choose RGER (providing one GE interface) or RMINIC (providing four FE interfaces) as its rear board.
GE2DEBUG1/2-232
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EIPI
The EIPI board provides E1 or T1 based IP connection and works together with the DTB. It has no external interface and no rear board. One EIPI works together with two DTBs to provide up to 64 E1 or T1 ports.
TIPB2aTer Interface Process BoardAterTDM/IP20 msTRAUIP
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EIPI
The interface unit receives HW data and sends it to the HPS daughter card. The data is then processed according to the HDLC protocol and then sent to the service processing unit. It sends user plane data through the user plane switch network to the GUP2 for processing, and sends control plane data through the control plane switch network to the CMP for processing.
Internal User Only
GUIM
The GUIM performs Ethernet Level 2 switching between the control plane and the user plane in the Gigabit resource shelf, the CS field timeslot multiplexing slot switching and Gigabit resource shelf management. It also provides external interfaces for the Gigabit resource shelf.
It has the capability of 16 K circuit switching, and provides an internal circuit switching network for the GE resource shelf.
It provides the clock drive in the resource shelf. It inputsPP2S, 8K and 16M signals, which are sent to different slots in the resource shelf after phase lockup to provide 16M, 8 K and PP2S clocks for resource modules in this shelf.
The UGIM board performs Gigabit resource shelf management and provides RS485 management interfaces in the Gigabit resource shelf; It also provides board resetting and in-slot signal collection functions.
Internal User Only
GUP2
According to functions, GUP2 boards are classified into five functional boards: Abis interface processing board BIPB2, A interface processing board AIPB, user plane processing board UPPB2, dual rate transfer board DRTB2 and Ater interface processing board TIPB2.
Over the STM-1 or E1 Abis interface, CS and PS services from the BTS are switched to the BIPB2 board through the UIM board in the local resource shelf or the GUIM board in the local Gigabit resource shelf. The BIPB2 board searches 20ms TRU frames or PCU frames and form them into IP packets, which are sent to the TCU or the UPU for processing. Over the IP Abis interface, the BIPB2 board is also used to process RTP.
The DRTB2 implements code conversion, finishes TRAU frame conversion and rate adaptation, and provides FR/EFR/HR/AMR/TFO function.
The AIPB board processes RTP and forms data into IP packets over the A interface.
The UPPB2 processes user plane protocols such as BSSGP, PDCP and GTP_U under the A/Gb mode.
The TIPB2 processes user plane data of the Ater interface.
TIPB2aTer Interface Process BoardAterTDM/IP20 msTRAUIP
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a. CPU
FE
b.
GUP2
CPU: responsible for board management, and provides control plane FE interfaces for external connection.
DSP: processes universal services, including functions of BIPB2, AIPB, DRTB2, UPPB2 and TIPB2.
Circuit Switch Unit: connects the serial ports of multiple-chip DSP with the circuit switching network.
Ethernet Switch Unit: implements the Ethernet connections for multiple-chip DSP and provides the user plane FE interface for external devices.
Clock Unit: provides necessary clock signals for the units on the board.
a. CPU
FE
b.
GLI
The GB Line Interface (GLI) board is located at level 1 switching subsystem of iBSC. It finishes physical layer adaptation, IP package query, segmentation, forwarding, and flow management functions, processes bi-directional 2.5Gbps forwarding, and implements the interfaces to different resource shelves and external interface functions.
Internal User Only
GLI
Interface Unit: provides GE optical interface and supports physical backup. SD1–SD2, SD3–SD4, SD5–SD6 and SD7–SD8 are backup groups.
Processing Unit: implements bi-directional IP packet table look-up, fragmenting, forwarding and traffic management.
Queue Management Unit: implements bi-directional queue management.
The GE optical interface receives user plane data from the GUIM and sends it through the backplane to the PSN board for user plane data exchange.
Internal User Only
PSN
Provides bi-directional user plane data switch with a capacity of 40 Gbps on each direction
The data from each GLI board is sent to the Matrix Switching Unit through the high-speed serial links on the backplane. It is switched and then sent to the destination GLI board.
Internal User Only
Includes the PWRD board and the alarm box
PWRD is responsible for collecting some peripheral and environment board information within the cabinet, including the power distributor and fan status as well as some environment alarms like temperature/humidity, smog, water and infrared alarms. Each cabinet has one PWRD board.
The Alarm Box (ALB) can report system alarms at different levels according to system fault grades to facilitate timely interference and handling by equipment management personnel.
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Board Summary 1
Serdes: parallel-to-serial and serial-to-parallel converter.
The User Plane FE interface of SPB2 is used to transmit user plane data when the SPB2 serves as the GIPB2 board.
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Board Summary 2
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Active/Standby Board Design
Key boards have 1+1 backup.
Key interface boards such as GIPI and SDTB can have 1+1 backup if necessary.

Front board and rear board
Rear boards are passive boards that provides cabling from the backplane (such as E1 and network cables) in order to work together with corresponding front boards.
Front boards are physical boards that process resources. All system optical cables are led from the front board panels.
All front boards have four indicators on their panels (RUN, ENUM, ACT, ALM) to indicate board status.
Internal User Only
ALM
Red
Alarm indicator
Flashing at 5 Hz: version download fails; board self test fails because of inconsistency between board and configuration
ENUM
Yellow
Board extraction indicator
Solid on: the microswitch is opened; the board is not in position; or version files are not downloaded.
Flashing at 5 Hz (quickly): the microswitch generates an alarm because it is opened when the board is still running.
Flashing at 1 Hz (slowly): the board can be extracted. The microswitch is opened when the board is running, and the board is in standby mode or release the resource.
Solid off: the microswitch is normal.
ACT
Green
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Signal Flow on iBSC Control Plane and User Plane
iBSC Internal Cable Connection
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Logical units of iBSC include: Access Unit(BIU GIU AIU), Switch Unit, CMPU, UPU, TCU, O&MU, PMU
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SDRGIPI,OMCB?
OMCBSDROMMOMMiBSC,SBCXGSMOMCB
MR Measurement ReportMR ServerGIPIMR
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E1 Abis
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BIU - E1 Abis
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The E1 Abis-interface unit consists of the DTB, the GUP and the SPB.
1. The DTB completes E1 access.
2. LAPD signaling from the BTS is switched to the SPB through the GUIM board in the local resource shelf. The SPB processes LAPD signaling.
3. CS and PS services are switched to the GUP board through the GUIM board in the local resource shelf. The GUP board finds 20ms TRU frames or PCU frames according to channel search,and forms these frames into IP packets that are sent to the TCU or UPU for processing.
Internal User Only
BIU - IP Abis
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The IP Abis interface unit is composed of the GGIPI board and the GUP board.
1. As the interface board, the GIPI board receives IP packets from the BTS through the external Ethernet interface, and differentiates
user plane data from control plane data.
UDP data is sent through the user plane switch network to the GUP for processing.
SCTP data is sent through the control plane switch network to the CMP for processing.
2. On the uplink direction, the GUP divides the IP packet payload that are composed based on carriers according to the channel,and searches the 20ms TRU frames or PCU frames in each channel. It then forms these frames into IP packets that are sent to the TCU(UPU) for processing. The downlink direction is just opposite.
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BIU - IPoE Abis
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E1 A
7SPBE1SPBCPU MTP2IP CMPDTB/SDTBUIMTSPB
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AIU - IP A
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The IP A interface unit is composed of GIPI boards and GUP boards.
1. The GIPI board completes IP access, and separates user plane data from control plane data.
UDP data is sent through the user plane switch network to the GUP for processing.
SCTP data is sent through the control plane switch network to the CMP for processing.
2. The GUP processes RTP and sends the processing result to the BIU through the GUIM.
Internal User Only
E1 Gb
The E1 Gb interface unit consists of SPBs.
The SPB completes E1 access, processes FR protocol, and separates the user plane from the control plane for some data. It sends
user plane data through the user plane switch network to the GUP for processing, and sends control plane data through the control plane switch network to the CMP for processing.
Internal User Only
GIU - IP Gb
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The IP Gb interface unit consists of CIPI boards. The GIPI board completes IP access, and separates user plane data from control plane data.
UDP data is sent through the user plane switch network to the GUP for processing.
For SCTP data, some is sent through the control plane switch network to the CMP for processing, and some is sent through the user plane switch network to the GUP for processing.
Internal User Only
O&M Unit
Operation and Maintenance Networking
The networking mode of SBCX is as follows: iBSC OMP board (OMC2 port) and SBCX (omp1 port) form a subnet. The SBCX (omc1 port), OMM/EMS Client and EMS Server form a subnet. The local OMM usually consists of the SBCX (OMM Server), the OMM Client (PC).
When the iBSC needs to manage SDR BTSs, the OMCB server manages all SDR configurations (physical, transmission and radio configurations), links, alarms and versions. The OMCB program is installed on the SBCX and a pair of GIPI boards must be configured.
Internal User Only
Monitoring Unit - PMU
The PWRD board collects the environment monitoring information of peripheral devices, including temperature and humidity, smoke, water and infrared alarms.
Internal User Only
Internal User Only
IP Switch Unit (PSU)
Level 1 switch: GLI and PSN, 40G large-capacity user plane data switch.
Level 2 switch: UIMU,GUIM, UIMC, and CHUB, responsible for the switch and convergence of control plane and user plane data in the system.
Internal User Only
IP Switch Unit (PSU)
If there are only two resource shelves, the Level-1 switch subsystem is not needed on the user plane. The two resource shelves can be directly interconnected using Gigabit optical interfaces.
Internal User Only
Signal Flow on iBSC Control Plane and User Plane
iBSC Internal Cable Connection
User Plane Signal Flow in the CS Domain
The BIU severs user plane data from control plane data, and then sends user plane data to the TCU, which processes such data and then sends it to the AIU. Signal flow 1→2.
Internal User Only
User Plane Signal Flow in the PS Domain
The BIU severs CPU frames from all frames and sends them to the UPU(UPPB2) through the user plane switching network. The UPU then separates PS field user plane data from CPU frames received for further processing. After data processing is complete, the data is sent to the GIU through the user plane switching network.
Internal User Only
Control Plane Signal Flow in the CS Domain
Abis interface signal flow Abis interface unit (BIU) sends signaling in the LAPD channel to the CMP board as control plane data. The CMP processes such data and sends some of it directly back to the BIU (flow direction: 1→1). Some signaling data will be sent to the AIU in the form of A-interface signaling flow (flow direction: 1→2).
A-interface signal flow: The AIU processes the MTP2 part of A-interface signaling, and then sends it to the CMP to complete the processing of MTP3 and layers above. Some global processes need the participation of the OMP. The data flow direction is 2→3→3→2 or 2→2.
Internal User Only
Control Plane Signal Flow in the PS Domain
For some control plane signaling in the PS field, the system requests resources from the CMP board, and then sends the signaling to the UPPB2 for processing.
When the MS is processing PS services, control plane signaling should be separated from UPPB2 and then sent to the CMP for processing.
Internal User Only
Abis interface signaling flow
The Abis interface unit sent (BIU) sent control plane data in the LAPD channel to the CMP board. The CMP processes such data, such as the immediate assignment message, and sends it directly back to the BIU (flow direction: 1→1). Some data, such as the packet assignment message, are sent to the UPU, which processes then and send them to the BIU through the user plane switching network (flow direction:: 1→3→2).
Data from the Abis interface unit are sent to the UPU through the user plane switching network. The UPU processes the data and separates control signaling packets, which are sent to the control plane processing board (CMP). The data flow direction is: 2→3→3→2
Internal User Only
Gb interface signaling flow
The GIU sends BVC channel data as control plane data to the active CMP. The CMP processes the data and sends some of it (such as PTP BVC restart) to other CMPs and some (such as signaling BVC restart) to the OMP. The CMP or the OMP processes the data and some signaling generates the Abis signaling traffic, such as paging messages in the PS or CS field, whose data flow is 5→1 or 5→3→2; other signaling, such as PTP BVC restart acknowledgement and signaling BVC restart acknowledgement, is sent to the Gb interface through the GUI, with the data flow as 5→5 or 6→6.
The GUI routes data from other BVC channels to the user plane processing unit, which separates control plane data and sends it to the CMP. The CMP processes the data and some signaling, such as PTP paging messages, is sent to the Gb interface through the GIU with the data flow as 4→3→5; some signaling generates the Abis signaling flow, such as location messages, with the data flow as 4→3→1.
Internal User Only
E1 AbisE1 A
The BIU severs user plane data from control plane data, and then sends user plane data to the TCU, which processes such data and then sends it to the AIU.
Internal User Only
E1 AbisE1 A
The Abis interface unit (BIU) sends signaling in the LAPD channel to the CMP board as control plane data. The CMP processes such data and sends some of it generates the A interface signaling flow to the AIU.
Internal User Only
IP AbisIP A
The BIU severs user plane data from control plane data, and then sends user plane data to the TCU, which processes such data and then sends it to the AIU.
Internal User Only
IP AbisIP A
The Abis interface unit (BIU) sends signaling in the LAPD channel to the CMP board as control plane data. The CMP processes such data and sends some of it generates the A interface signaling flow to the AIU.
Internal User Only
E1 AbisE1 Gb
The BIU severs CPU frames from all frames and sends them to the UPU(UPPB) through the user plane switching network. The UPU then separates PS field user plane data from CPU frames received for further processing. After data processing is complete, the data is sent to the GUI through the user plane switching network.
Internal User Only
E1 AbisE1 Gb
The Abis interface unit (BIU) sends control plane data in the LAPD channel to the CMP board. The CMP processes such data and sends some of it to the UPU (such as packet assignment message). The UPU processes such data and then sends it to the BIU through the user plane switch network.
Internal User Only
E1 AbisE1 Gb
The GIU sends BVC channel data as control plane data to the main CMP. The CMP processes the data and some signaling generates the Abis signaling flow, such as paging messages in the CS field
Internal User Only
IP Abis IP Gb
The BIU severs PCU frames from all frames and sends them to the UPU(UPPBs) through the user plane switching network. The UPU then separates PS field user plane data from CPU frames received for further processing. After data processing is complete, the data is sent to the GUI through the user plane switching network.
Internal User Only
IP Abis IP Gb
The Abis interface unit (BIU) sends control plane data in the LAPD channel to the CMP board. The CMP processes such data and sends some of it to the UPU (such as packet assignment message). The UPU processes such data and then sends it to the BIU through the user plane switch network.
Internal User Only
IP Abis IP Gb
The GIU sends BVC channel data as control plane data to the main CMP. The CMP processes the data and some signaling generates the Abis signaling flow, such as paging messages in the PS or CS field
Internal User Only
Signal Flow on iBSC Control Plane and User Plane
iBSC Internal Cable Connection
Internal User Only
System Interconnection Modes
Most boards are managed by the OMP via the internal control plane.
The CLKG/ICM board are connected to the UIMC via the RS485 bus, and then managed by the OMP.
*
BPSN
System Clock Capture and Distribution Principles
The CLK board is responsible for supplying clock signals and external synchronization functions.
Clock level: Level 3 clock
The board extracts clock reference via A Iu interface and drives multiple channels of timing reference signals for use by each interface shelf after intra-board synchronization.
Level 2 forwarding of the UIM board
DTB, SDTB2 and SPB2 can be used to extract line reference
The BPSN does not need a clock reference
8K2M
Control plane and Ethernet interconnection cables;
User plane optical cable connection;
Monitoring cable.
8K2M
Clock Extraction and Distribution Cables
The clock extraction cable connects the 8KOUT interface on the DTB rear board to the 8KIN interface on the ICM.
The ICM can also extract GPS signals as the clock reference.
The clock distribution cables connect the CLKOUT interface on the ICM rear board to the CLKIN interfaces on UIM boards in each shelf.
To use the clock reference of the A interface, please extract it from the 1st E1 of the A interface.
Internal User Only
Control Plane and Ethernet Interconnection Cables
The FE interfaces of the CHUB rear boards connect to the FE interfaces of the UIM boards in each shelf.
Internal GE connection is used inside the BCTC.
Internal User Only
User Plane Optical Cable Connection
The optical interface on the GUIM front panel in the BGSN connects to the optical interface on the PLI front panel.
Supports physical backup.
Internal User Only
Monitoring Cables
The cables between fans to PWRD boards are usually 120 ohm twisted-pair cables that are connected to the FANBOX interfaces to monitor fan running status.
The environment monitoring sensor is connected to the SENSORS interface on the PWRD board to collect environment alarms.
The door access sensor is connected to the DOOR interface on the PWRD board to monitor door access status.
The PWRD board reports monitoring information to the OMP board via RS485 cables.
Internal User Only
Oscillastor
RS232
GPS
2Mbps/2MHz
PP2S/16CHIP
RS232
CP FE 1~6