x86-session08.ppt

26
Property of Accel Technol ogies Ltd., Copyright pro tected 1 X86 Session_08 Memory management

Transcript of x86-session08.ppt

Page 1: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

1

X86 Session_08

Memory management

Page 2: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

2

Semaphore

• Tasks should have orderly access to resources– E.g: If one user wants to read a file

from the hard disk and send it to the printer,20ms time slice may not be enough;To hang on to the resources, a flag or semaphore in memory is used to indicate whether the disk drive is in use or not and another semaphore for the printer status

Page 3: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

3

Semaphore

• If a task cannot access a resource because it is busy,the task is said to be blocked

• Operating system sets up queues of tasks waiting for a resource

• When one task finishes with a resource it resets the semaphore

• The next task in the queue can set the semaphore

Page 4: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

4

Protection

• A problem can occur in a multitasking operating system when two or more users attempt to read and change the contents of a memory location at the same time

• Such a section must be protected from access by other tasks

• The section of code that must be protected is called a critical region or critical section

Page 5: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

5

Protection

• A technique known as mutual exclusion is used

–by masking an interrupt in the critical region

• A semaphore is used in time slice systems

Page 6: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

6

Example for a semaphore

;user1 MOV AL,01 ; load semaphore value for region

busyHOLD: XCHG AL,SEMAPHORE ;swap and set semaphore

CMP AL,01 ; check if region is free JE HOLD

;critical region instructions MOV SEMAPHORE,00 ;reset semaphore for others to avail ;critical region

;user2 MOV AL,01

HOLD: XCHG AL,SEMAPHORE CMP AL,01

JE HOLD;critical region instructions

MOV SEMAPHORE,00

Page 7: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

7

More about Protection

• The second region requiring protection is the operating system code that could be corrupted by user’s programs

• To give protection,usually,the OS is constructed to have multiple layers resembling an onionskin

• The inner circle representing the code and data area of the OS and the outer layer for the user

Page 8: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

8

More about Protection

• The Devices in the Motorola MC68000 family of processors are designed to accommodate a two level structure– They operate under user and

supervisory modes

• The Intel processors have hardware features that allow four levels of protection to be built into a system

Page 9: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

9

Memory Management

• What is the necessity for memory management?– Physical memory is usually not large

enough to hold the OS and all of the application programs

– To make sure that executing tasks do not access protected areas of memory

• Could be done through OS software; but require the aid of hardware called a memory management unit or MMU

Page 10: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

10

Overlays

• A method to overcome the limited memory problem

• Have the application program in modules and load them in sequence to main memory in an area called the overlay

• This approach is used with assemblers, compilers and word processors

Page 11: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

11

Bank Switching

• An other method to overcome the limited memory problem

Port

BS

Bank 0

Bank 1

Bank 7

A 0 - A 13

Page 12: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

12

Bank Switching

• At the time of 8086,any application program requiring above 640Kbytes was inconceivable

• Hence,all space above that was reserved for BIOS,the video frame buffer and system uses

• DOS was also designed to directly address only 1 Mbyte

Page 13: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

13

Bank Switching

• Memory located in the address space above 1 MB is commonly referred to as extended memory or XMS memory

• A hardware for the expanded memory selection can be inserted as a plug in board

• Bank switch registers will be used to select the pages

Page 14: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

14

Expanded Memory

• Disadvantages:– system must contain enough memory

for the largest program to be run

– Application programs must manage the switching of pages which adds overhead to the execution time

– If a program is modified,the switching points may have to be changed

Page 15: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

15

Virtual Memory

• A solution to the expanded memory scheme problems

• Hard disk becomes the main program and data memory

• DRAM functions as an intermediate cache

• High speed,costlier SRAM functions as the cache

Page 16: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

16

Virtual Memory

• Swapping of data and code blocks can be done in different ways– By swapping segments

– Fixed length pages of typically 4 Kbytes each

– programmer writes a program using logical segments and divides the segments into 4 Kbyte pages - implemented in 386 and 486

Page 17: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

17

• Pros and Cons of Swapping

segments

Advantage: segments correspond to

the code and data in the program

Disadvantage: But,in 386 and

486 ,can be very large segment

swapping consuming time

Virtual Memory

Page 18: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

18

• Pros and Cons of Swapping fixed

length pages

Advantage: small pages can be quickly

swapped in and out of memory

Disadvantage: They do not correspond

to the logical structure of the program

Virtual Memory

Page 19: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

19

• Can be managed by the operating

system

• But, most systems use a

hardware device called a memory

management unit placed in

between the processor and the

physical memory

Virtual Memory

Page 20: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

20

• The addresses one works with in a

program is the logical address -

represented using 16 bit offset and

a 16 bit segment

– E.g: JNZ NEXT (’ NEXT’ is the logical

address)

• The 8086 BIU produces the actual

physical address by adding the

above two parts

Virtual Memory

Page 21: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

21

• In a system with an MMU, such as 286, 386,486,the upper 16 bit is segment selector ( 14 address bits and 2 privilege bits) and the lower component is the offset

• The MMU uses the segment selector to access a descriptor,which is s series of memory locations containing the physical base address for a segment , privilege level of the segment and some control bits

Virtual memory

Page 22: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

22

Virtual memory

SELECTOR OFFSET

+

DESCRIPTOR TABLE

Segment Base

Address

Control and

protection bits

Logical Addressphysical Address

Page 23: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

23

Virtual Memory

• The selectors for the 286,386 and 486 have 14 address bits and 2 privilege level bits

• The 14 address bits select any one of the 16384 descriptors

• For 80286,the offset part is 16 bits capable of accessing 64Kb

• Hence,virtual address space is 16384 x 65536 = 1Gb

Page 24: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

24

Operation of MMU

• When MMU receives the logical address from the CPU,– it checks to see if that segment is in

the physical memory– If present,it forms the physical

address– If not,it sends an interrupt to the CPU – In response,the OS executes an ISR to

read the desired code or data segment from disk and loads to the physical memory

Page 25: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

25

Operation of MMU

• MMU has to make space for the segment to be loaded from disk into physical memory– either by compacting the segments

already present and changing the descriptors to point to the new physical locations

– swapping the segment being brought with one currently in memory

• To decide which segment to swap back,an accessed bit is used

Page 26: x86-session08.ppt

Property of Accel Technologies Ltd., Copyright protected

X86 class 08 Version 1.0

26

Protection

• The selector has 2 privilege bits

• The descriptor contains 2 privilege bits

• The MMU compares the two sets of privilege bits whenever an executing program tries to access a segment

• MMU allows the segment to be accessed only if the selector has the same or a greater privilege level