WP2 Review Meeting Milan, October 05, 2011
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Transcript of WP2 Review Meeting Milan, October 05, 2011
CONFIDENTIALWP2 Review Meeting
Milan, October 05, 2011
MODERN ENIAC WP2 Meeting(WP2-T2.1)
WP2 and Tasks review
Milano Agrate, 2011 Oct. 05
Meeting hosted by Micron
CONFIDENTIAL 22
WP2: Relationship among work packages
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T2.1 Task
Task T2.1: PV-aware process simulation
Process simulation tools will be extended to include the impact of variations in TCAD simulations especially in etching and deposition processes; an interface to commercial process and device simulation programs will be developed. Process simulations for the extraction of behavioral models will be performed. In addition it is intended to build up an interface between the process simulation environment and the semiconductor FAB to obtain equipment parameters which affect variability.
Partners: ST-I, AMS, TUW
In the analysis and modelling of PV ST-I wants to link process information out of the silicon manufacturing facility into TCAD environment in order to take into account inevitable process variations and doping fluctuations with the objectives to create a behavioural model of the process to be simulated and to perform statistical process analysis and process optimization to improve parametric yield. AMS and TUW will focus on TCAD process simulation to reflect major sources for PV in 0.35um, 0.18um and 0.13um CMOS and HV technologies; main inline/equipment parameters will be taken into account. TCAD based statements about pros and cons of emerging device options will be given concerning variability. The methodology will be compared to the one used in task 2.2.
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Process simulation: T2.1 Deliverables
Ref Deliverable/ Contributors Due date
D2.1.1 First process simulation including treatment of PV for Discrete Power Device, HV-CMOS, SiC, GaN/AlGaN technologies, interfaced to commercial TCAD tools
(ST-I, AMS, TUW)
M15
DONE
D2.1.2 Enhanced process simulation including treatment of PV for Discrete Power Device, HV-CMOS, SiC, GaN/AlGaN technologies, interfaced to commercial TCAD tools
(ST-I, AMS, TUW)
M27
DONE
Task Leader: [email protected]
Partners: ST-I, AMS, TUW
Task 2.1 goal is to perform process simulation including treatment of PV. Application for discrete power devices, SiC, AlGaN/GaN (ST-I) and HV-CMOS technologies (AMS)
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Activity done so far:
– Interface between commercial process simulator and fab equipments: a web – based tool has
been realized. The tool accepts in input the product code used in manufacturing and produces in output the process parameters that can be passed to the TCAD software tools (Silvaco or Synopsys syntax) (Implementation activity is included in WP5)
– Process simulator setup & calibration– Process simulation with Synopsys platform has been performed.– Screening parameters: first device simulations have been executed in order to select the
process parameters that mainly affect the electrical behavior of the device: – Design of Experiment has been arranged to build structures with a systematic variation of the
selected process parameters.
The activity done on a Silicon Power MOS (D2.1.1) has been extended to compound materials (SiC and AlGaN/GaN devices) (D2.1.2)
– PCM extraction: polynomials function of process parameters have been extracted (T2.2)– PCM validation: As a check for the robustness of the PCM, a new set of simulation data,
choosing a random combination of input parameters, have been generated and compared with the prediction given by the PCM (T2.2)
Interactions
– T2.1 DOE results T2.2 for device simulation and PCM extraction.
T2.1 Review Summary (ST-I)
WP2 Review MeetingMilan, October 05, 2011
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Activity done so far, with highlights on technical results, and dissemination
- HV-CMOS technologies (AMS, TUW):• Statistical fab data analysis (FEOL, BEOL): 0.35µm HV-CMOS Tech. done• HV devices for DOE: NMOSI20T and PMOS20T• Process simulator setup & calibration done• Critical PV selection: 6 ~ 8 variables (substrate resistivity, implant dose, CD & overlay,
GOX thickness, …) done• PMOS20T process simulations with 7 PV variables done (see Back-up slides)• 286 (W/L=10/0.6, 10/10) structures from process simulations go to Minimos-NT for device
simulation.• Device simulations for statistical spice modeling: done (PMOS20T)• Script development for electrical parameter extraction inline measurement
D2.1.2 deliverable: Done
– An interface between commercial process simulator and Minimos-NT (a two-dimensional device simulator from TUW)
– Complete set of NMOS20T and PMOS20T process and device simulations done– Script update for electrical parameter extraction– NMOS20T and PMOS20T sensitivity analysis with 7~8 process variations: done
Issues
Interaction need:
– T2.1 results (HV-CMOS) T2.3 for Spice Monte-Carlo Model (D2.3.3)
T2.1 Review Summary (AMS, TUW)
WP2 Review MeetingMilan, October 05, 2011
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T2.1 Back-up slides for ST-I
WP2 Review MeetingMilan, October 05, 2011
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ST-I WP2 Activity
High Level factory
Process recipes
Specific process
conditions
Mask Layout
Process flowVirtual device
TCAD Experiments
Process Compact model
derived from TCAD
PCM
PCM
FAB1FAB1
FAB2FAB2
Technology Technology transferred to transferred to
FAB2 using PCMFAB2 using PCM
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WEB-Based Interface: High-level factory
WP2 Review MeetingMilan, October 05, 2011
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T2.1
10
Process compact modeling approach incorporates statistical design of experiment methods within the calibrated TCAD environment allowing to capture relationships between process variations and device performance through a set of analytic functions (Response Surface Method).
The flow of PCM extraction from TCAD simulation consists of the following steps:- Definition of a calibrated TCAD flow (process and device);- Analysis of process parameter sensitivity (parameter screening);- Simulations of process splits and electrical variables extraction (design of experiment);- PCM generation.
Input process parameters
Output device characteristics
Process Compact Model
Process Compact Model
Predicted device
response
New process conditions
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Application to Power-Mos cell (D2.1.1)
Parameter screening to identify the process parameters that have an important impact on target electrical parameters.
Parameterized simulation setup (DOE) generating several simulation runs.
Device simulations of breakdown and I-V characteristic for each experiment.
DOE
EHD5 SEMICELL
SENTAURUS WORKBENCH
PCM STUDIO
PCM
Applied methodology flow.
Synopsys platform:Sentaurus and PCM Studio
Simulation of Power-Mos semi cell with the nominal values of the process input parameters
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Process variability
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Variable Description
epithick Thickness of the epitaxial layer
epiconcDoping concentration of the epitaxial layer
gateox Thickness of the gate oxide
bmask CD of POLY gate mask
pmask CD of JFET mask
Input process parameters that have influence on the device behavior.
Output electrical parameters: RDSon and BV
A large number of process variables requires a very high computational cost.
Selecting only those process parameters showing the greatest impact on electrical performances.
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epithick epiconc gateox bmask pmask
Ele
ctri
cal
par
amet
er v
aria
tio
n (
%)
Ron
BV
Sensitivity index for process parameter variation
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Design of experiments
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The DOE depends on the degree of the polynomial required for a good data fit.
The output electrical parameter is a non-linear function of the input process parameters, modeled by a second order polynomial.
To fit a second-order model, a DOE with at least three levels is required: 81 experiments are generated.
For each structure, device simulations are performed to extract Ron and BV.
BV histogram
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1
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28
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.8
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.6
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.4
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.2 32
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.8
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.6
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.4
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.2 36
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.8
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.6
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.4
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.2 40
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.8
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.6
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.4
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.2 44
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.8
BV (V)
BV
BV 5%
Ron histogram
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9.1
9.5
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.3
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.7
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.1
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.3
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.7
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.1
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.5
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.9
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.3
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.5
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.9
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.3
Ron (m Ohm *m m 2)
Ron
Ron 5%
WP2 Review MeetingMilan, October 05, 2011
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Application to 4H-SiC JBS diode (D2.1.2)
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Process Step Value
Epi Thickness 6 µm
Epi Doping 1e16 atm/cm3
Pwell mask 8 µm
PreImplant Oxide Thickness
0.06 µm
Error Dose Factor 1 (nominal Value)
Activation percentage 35%
Schottky Barrier 1.14 eV
Resistance Anode 0.45e-3 Ω*µm
Resistance Schottky 1e-7 Ω*µm
Resistance Cathode 1.1e-3 Ω*µm
Forward and reverse characteristics comparison between measure and simulation.
Calibration of TCAD simulations
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Process variability and DOE setup
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Variable Description Nominal Min Max Unit
SpSpace among
p-wells8 7.6 8.4 µm
EpiT Epitaxy Thickness 6 5.7 6.3 µm
EpiD Epitaxy Doping 1e16 9e15 1.1e16Atm/cm3
OxT Pre-implant oxide Thickness 0.06 0.054 0.066 µm
errD Dose Error 1 0.9 1.1 -
Att Doping Activation 0.35 0.1 0.6 %
Barrier Schottky Barrier 1.14 1.083 1.197 eV
Rc Cathode Resistance 1.1e-3 9.9e-4 1.21e-3 Ω
Input process parameters that have influence on the device behavior:-FW6 (anode voltage @6A)-FW80 (anode voltage @80A)-BV (breakdown Voltage)-LK600 (leakage current @600V)
Parameters screening
DOE setup in SWB
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Application to AlGaN/GaN HEMTs (D2.1.2)
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Variable Description Nominal Min Max Units
thAlGaN Thickness of the first AlGaN layer 25 20 30 [nm]
GateFoot Width of the gate foot 0.5 0.4 0.6 [µm]
GatePlate Width of the gate plate 1.3 1.2 1.4 [µm]
Ldg Drain-Gate distance 2.5 2.0 3.0 [µm]
Lsg Source-Gate distance 2.0 1.5 2.5 [µm]
Hgate Height of the gate foot 0.08 0.06 0.1 [µm]
GateRec Erosion of the AlGaN layer under the gate contact 0 0 0.02 [µm]
MolFrac Molar fraction of the first AlGaN layer 0.26 0.24 0.27 --
Schematic cross-section of the AlGaN/GaN HEMT under examination
Input process parameters that have influence on the device behavior:- Id_MAX (maximum drain current value at Vg=2V)- Vth (threshold voltage)- gm (maximum of transconductance for a given Id–Vg)
WP2 Review MeetingMilan, October 05, 2011
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Process variability and DOE setup
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Variable Id_MAX Vth gm
thAlGaN 121.3% 32.9% 76.0%
GateFoot 0.50% 0.69% 1.0%
GatePlate
0.33% 0.32% 1.8%
Ldg 13.2% 0.56% 13.6%
Lsg 16.2% 1.0% 20.0%
Hgate 0.08% 0.05% 2.54%
GateRec 0.99% 87.5% 86.5%
MolFrac 47.4% 12.6% 32.1%
Experiments generated by DoE
Sensitivity analysis
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Conclusions
In D2.1.2 the methodology used to increase TCAD simulation efficiency, by deriving Process Compact Models from systematic well-calibrated simulations, is described.
In order to demonstrate the general concepts of how to use the PCM approach, a 4H-SiC JBS diode and an AlGaN/GaN HEMT device have been investigated. The Synopsys platform (Sentaurus and PCM Studio) has been used.
First the standard cell of the device under examination has been simulated with the nominal values of the process input parameters. Second the process parameters that have an important impact on target electrical parameters have been identified performing a parameter screening. Then, a parameterized simulation setup has been arranged.
To complete the analysis, device simulations have been performed, for each experiment. Moreover post-processing scripts need to be introduced to automatically extract the list of electrical outputs. In this way the RSM model of device characteristics as function of process parameters will be generated by using PCM Studio. Details on this work has been included on D2.2.4.
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T2.1 Back-up slides for AMS and TUW
WP2 Review MeetingMilan, October 05, 2011
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Process Variation
• Input Parameters (HV-PMOS)
SX 18 20 22
DN_DOSE 4.05E+012 4.10E+012 4.15E+012
DPOverlay -0.1 0 0.1
SNOverlay -0.1 0 0.1
PADOX_VthM 0.1 10.05 20
Vt_2p7e12 2.65E+012 2.70E+012 2.75E+012
TOXTH -2 0 2
- 143 (7 PV for HV-PMOS) and 272 (8 PV for HV-NMOS) Full Process and Device Simulations
WP2 Review MeetingMilan, October 05, 2011
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Process Variation
• Variation Setup (RSM)
WP2 Review MeetingMilan, October 05, 2011
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Process Variation
• TCAD Flow
Parameters
SentaurusWork Bench
Minimos
ParameterExtraction
CorrelationInterface between commercial Synopsys Process Simulator and Minimos Device Simulator
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Process Variation
• Minimos Device Simulation• Linked to commercial Synopsys Process Tools• Input from .grd and .dat output of Sentaurus Device• Geometry output of Minimos to .grd and .dat• Characteristics to .crv
• Parameter Extraction• Inhouse Measurement Methods at AMS• extract BSIM Parameters from Simulation• Ron, Vth, Idsat, Sleak, Gamma, Leff
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Process Variation
• Parameter Extraction• Original Matlab Methods at AMS• Rewritten to extract Parameters from Minimos• In Python with SciPy and Numpy• Nearly identical Syntax as in Matlab
WP2 Review MeetingMilan, October 05, 2011
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Process Variation
• Vth Extraction
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Process Variation
• Extracted Data
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Process Variation
• Output Parameters <Gamma,Sleak>(SNOverlay)
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Status of PV-aware Process & Device Simulations
• Status
Type Parameters Process Device Parameters
HV-PMOS(20/0.6) finished finished finished finished
HV-PMOS(20/10) finished finished finished finished
HV-NMOS(20/0.7) finished finished finished finished
HV-NMOS(20/10) finished finished finished finished
• Electrical parameter extraction (for Monte Carlo spice model) : done
(Vth_lin, Vth_sat, Idlin, Idsat, Ron, Sleak, Gamma, Leff, …)D2.3.3
*Remarks: HV-PMOS = PMOS20T, HV-NMOS=NMOSI20T
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CONFIDENTIAL 29
Quadratic fitting from the simulation results
- H35 technology (0.35 µm HV-CMOS process)
- PMOS20T: 143 structures (7 PV)
- NMOSI20T: 272 structures (8 PV)
TCAD Process & device simulations (sprocess & Minimos-NT)
Quadratic fitting (all PV versus electrical data)
Random 10000 PV-set generation by considering inline PV distributions
Electrical parameter calculation from the quadratic formula
Data analysis
WP2 Review MeetingMilan, October 05, 2011
CONFIDENTIAL 30
PMOS20T(20/0.6): Ron and Ron-fit
0 50 100 15011
11.5
12
12.5
13
13.5
14
14.5
15
15.5
16
count
Ron
, R
on-f
it
0 50 100 150-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
count
Ron
- R
on-f
it
WP2 Review MeetingMilan, October 05, 2011
CONFIDENTIAL 31
PMOS20T(20/0.6): Vthlin and Vthlin-fit
0 50 100 1500.5
0.52
0.54
0.56
0.58
0.6
0.62
0.64
0.66
0.68
count
vthl
in,
vtlin
-fit
0 50 100 150-0.025
-0.02
-0.015
-0.01
-0.005
0
0.005
0.01
0.015
0.02
count
vthl
in -
vth
lin-f
it
WP2 Review MeetingMilan, October 05, 2011
CONFIDENTIAL 32
PMOS20T(20/0.6): Ron and Vthlin correlation
0.5 0.55 0.6 0.65 0.711
11.5
12
12.5
13
13.5
14
14.5
15
15.5
16
vthlin
Ron
0.5 0.55 0.6 0.65 0.711
11.5
12
12.5
13
13.5
14
14.5
15
15.5
16
vthlin-fit
Ron
-fit
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CONFIDENTIAL 33
PMOS20T(20/0.6): 7 PV distributions (10000 random values)
16 18 20 22 240
50
100
150
200
250
300
350
SX
n
4 4.05 4.1 4.15 4.2
x 1012
0
50
100
150
200
250
300
350
400
DN dose
n
-0.2 -0.1 0 0.1 0.20
50
100
150
200
250
300
350
DP overlay
n
-0.2 -0.1 0 0.1 0.20
50
100
150
200
250
300
350
SN overlay
n
-10 0 10 20 300
50
100
150
200
250
300
350
Pad Ox
n
2.6 2.65 2.7 2.75 2.8
x 1012
0
50
100
150
200
250
300
350
Vt implant
n
-4 -2 0 2 40
50
100
150
200
250
300
350
GOX
n
WP2 Review MeetingMilan, October 05, 2011
CONFIDENTIAL 34
PMOS20T(20/0.6): Ron and Vthlin distribution
11 12 13 14 150
50
100
150
200
250
300
350
Ron random
n
0.5 0.55 0.6 0.65 0.70
50
100
150
200
250
300
350
400
vthlin random
n
WP2 Review MeetingMilan, October 05, 2011
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PMOS20T(20/0.6) & NMOSI20T(20/0.7): Ron versus Vtlin
0.5 0.55 0.6 0.65 0.711
11.5
12
12.5
13
13.5
14
14.5
15
15.5
vthlin random
Ron r
andom
0.39 0.4 0.41 0.42 0.43 0.448.5
9
9.5
10
10.5
11
vthlin random
Ron
ran
dom
WP2 Review MeetingMilan, October 05, 2011
CONFIDENTIAL 36
Conclusions
Statistical fab data analysis (FEOL, BEOL) for 0.35µm HV-CMOS Techhnology was done for PV TCAD simulations.
TCAD environment construction: - Process simulator setup & calibration - Critical 7~8 PV selection - Interface development between commercial process simulator and Minimos-NT (a two-dimensional device simulator from TUW) - Script development for electrical parameter extraction
TCAD simulations: - A set of NMOS20T and PMOS20T process and device simulations - NMOS20T and PMOS20T sensitivity analysis - Quadratic curve fitting of simulation results, Random PV generation - PV-aware statistical electrical parameters
T2.1 results (HV-CMOS) T2.3 for Spice Monte-Carlo Model (D2.3.3)
WP2 Review MeetingMilan, October 05, 2011