William Stallings Computer Organization and...
Transcript of William Stallings Computer Organization and...
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William Stallings Computer Organization and Architecture
Chapter 3System Architecture
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• Le persone che scoprono la potenza e la bellezza di idee di altolivello di astrazione spesso commettono l'errore di credere che le idee concrete a livelli inferiori di astrazione sono tutto sommato inutili e possono essere dimenticate.
• Al contrario, i migliori informatici sono sempre saldamente radicati nei concetti basilari che governano il funzionamento dei calcolatori, ed in verità l'essenza dell'informatica è l'abilità di comprendere e governare molti livelli di astrazione contemporaneamente.
• Donald Knuth, Keynote Address at the 8th Annual Conference on Innovation and Technology in Computer Science Education (ITiCSE-03)
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From hardware to software
• Hardwired systems are inflexibleChanging function requires changing the wiringe.g.: sum 2 numbers with k digits, sum k numbers
• But general purpose hardware can do different tasks, given correct control signals
• Supply a new set of control signals as needed under the control of a “program”
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What is a program?
• A sequence of steps• For each step, an arithmetic, logical, control or
data movement operation is done• For each operation, a different set of control
signals is needed
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Execution of the program
• For each operation a unique code is providede.g. ADD, MOVE
• A hardware circuit interprets the code and issues the control signals
• We have a computer!
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The von Neumann computer
MainMemory
Arithmetic and Logic Unit
Program Control Unit
InputOutputEquipment
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von Neumann/Turing architecture
• Binary representation for data and program• Main memory storing data AND PROGRAMS• Control unit interpreting instructions from
memory and executing• Normal control flow is sequential• Specialized device (ALU) to operate on data• Memory accessed by means of address• Input and output equipment operated by control
unit
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Architecture & Organization 1• Architecture expresses those attributes visible to
the programmer (i.e.: functions, commands)Instruction set, number of bits used for data representation, I/O mechanisms, addressing techniques.e.g. Is there a multiply instruction?
• Organization is how features are implementedControl signals, interfaces, memory technology.e.g. Is there a hardware multiply unit or is it done by repeated addition?
• Architecture = Specification• Organization = Implementation
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Architecture & Organization 2
• All Intel x86 family share the same basic architecture
• The IBM System/370 family share the same basic architecture
• This gives code compatibilityAt least backwards
• Organization differs between different versions
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Structure & Function
• Structure is the way in which components relate to each other
• Function is the operation of individual components as part of the structure
• Structure = static relations among components• Function = dynamic behaviour of each component
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Function
• All computer functions are:Data processingData storageData movementControl
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Structure - Top Level
Computer
Main Memory
InputOutput
SystemsInterconnection
Peripherals
Communicationlines
CentralProcessing Unit
Computer
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Structure - The CPU
Computer Arithmeticand Logic Unit
ControlUnit
Internal CPUInterconnection
Registers
CPU
I/O
Memory
SystemBus
CPU
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Structure - The Control Unit
CPU
ControlMemory
Control Unit Registers and Decoders
SequencingLogic
ControlUnit
ALU
Registers
InternalBus
Control Unit
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Computer Components:Top Level View
Central Processing Unit (CPU)MemoryI/OSystem Interconnections (usually a “bus")
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Components
• Central Processing Unit (CPU):Control Unit Arithmetic and Logic Unit Internal Registers
• Input/outputData and instructions need to get into the system and results out
• Main memory Temporary storage of code and results is needed
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CPU Components: Top Level View
Control Unit
ALU
Registri
CP
U In
tern
alB
us
Control Signals
PC
MAR
IR
MBRAC
Dat
a Li
nes
Add
ress
Line
s
Con
trol L
ines
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CPU: Function of registers
• Program CounterAddress of the next instruction
• Instruction RegisterCode of instruction to execute
• AccumulatorTemporary storage for ALU operations
• Memory Address RegisterMemory address where to R/W
• Memory Buffer RegisterData read/written from/to memory
Registers
PC
MAR
IR
MBRAC
Dat
a Li
nes
Add
ress
Line
s
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Instruction Cycle
• Two phases:FetchExecute
Fetch Phase Execute Phase
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Fetch Phase
• Program Counter (PC) holds address of next instruction to fetch
• Processor fetches instruction from memory location pointed to by PC
• Instruction loaded into Instruction Register (IR)• Increment PC (but PC may be changed later…)
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Execute Phase
• Processor decodes instruction and set-up circuits to perform required actions
• Actual execution of operation:Processor-memory
• data transfer between CPU and main memory
Processor-I/O• Data transfer between CPU and I/O module
Data processing• Some arithmetic or logical operation on data
Control• Alteration of sequence of operations• e.g. jump
Combination of above
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A very simple processor
• INSTRUCTION: OP_CODE + ADDRESS
• OP_CODES:1 (address) -> Accumulator2 Accumulator -> address5 (address)+Accumulator -> Accumulator
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Example of Program Execution
3 0 1
3 0 2
3 0 3
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Instruction Cycle -State Diagram
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Connecting
• All the units must be connected• Different type of connection for different type of
unitMemoryInput/OutputCPU
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Memory Connection
• Receives and sends data• Receives addresses (of locations)• Receives control signals
ReadWriteTiming
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Input/Output Connection(1)
• Similar to memory from computer’s viewpoint• Data (during output operations)
Receive data from computerSend data to peripheral
• Data (during input operations)Receive data from peripheralSend data to computer
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Input/Output Connection(2)
• Receive control signals from computer• Send control signals to peripherals
e.g. spin disk
• Receive addresses from computere.g. port number to identify peripheral
• Send interrupt signals (control)
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CPU Connection
• Reads instruction and data• Writes out data (after processing)• Sends control signals to other units• Receives (& acts on) interrupts
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Buses
• There are a number of possible interconnection systems
• Single and multiple BUS structures are most common
• e.g. Control/Address/Data bus (PC)• e.g. Unibus (DEC-PDP)
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What is a Bus?
• A communication pathway connecting two or more devices
• Usually broadcast • Often grouped
A number of channels in one buse.g. 32 bit data bus is 32 separate single bit channels
• Power lines may not be shown
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Data Bus
• Carries dataRemember that there is no difference between “data”and “instruction” at this level
• Width is a key determinant of performance8, 16, 32, 64 bit
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Address bus
• Identify the source or destination of data• e.g. CPU needs to read an instruction (data)
from a given location in memory• Bus width determines maximum memory
capacity of systeme.g. 8080 has 16 bit address bus giving 64k address space
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Control Bus
• Control and timing informationMemory read/write signalInterrupt requestClock signals
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Bus Interconnection Scheme
• Every device is attached to the bus:its use needs to be coordinated
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Big and Yellow?
• What do buses look like?Parallel lines on circuit boardsRibbon cablesStrip connectors on mother boards
• e.g. PCI
Sets of wires
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Single Bus Problems
• Lots of devices on one bus leads to:Propagation delays
• Long data paths mean that co-ordination of bus use can adversely affect performance
• If aggregate data transfer approaches bus capacity
• Most systems use multiple buses to overcome these problems
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Traditional (ISA)(with cache)
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High Performance Bus
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Bus Types
• DedicatedSeparate data & address lines
• MultiplexedShared linesAddress valid or data valid control lineAdvantage - fewer linesDisadvantages
• More complex control• Ultimate performance