White Paper

Benchmarking IC Development for Automotive Applications

August 2017

German Electrical and Electronic Manufacturers’ Association

IC

Benchmarking

Concept Phase

AutomotiveThoughout

Design Implementation

ProductivityComplexity Units

2 3

The request for individual mobility in our society is constantly rising. Today and prob-ably for the next decade the individual as well as commercial demands for mobility solutions are mainly fulfilled by the automo-tive industry. New functions like automated driving as well as services e.g. navigation, vehicle to vehicle communication, software upgrades, …, are enabled by new highly integrated semiconductors which become more and more complex. In parallel devel-opment cycles in the automotive industry are getting shorter and costs are facing a high pressure. To stay in this attractive and demanding market for semiconductors, the suppliers need to deal with cost pressure, shortened development cycles and rising quality demands – i.e. just being competi-tive and being “best in class”.

But – what does the wording “best in class” mean? Lowest Cycle Time? Lowest

Cost? Lowest number of silicon design Iterations? This is widely discussed in a white paper by numetrics (1). Each semiconductor company might give one or the other parameter a higher relevance in their key performance indicators (KPI) But for comparison “productivity” and “thoughput” are always relevant for evaluating, if the own company is working in a competitive mode.

It is certainly of interest to measure the parameters “productivity” and “though- put” on several projects in the own company and to discuss, why the development of some projects performs better compared to others. But it is also of interest to widen the view and to compare the project development performance of the whole semiconductor industry in an integral and neutralised way and to derive out of that some trends for the future.

Because of that several european semi-conductor suppliers under the head of the ZVEI decided to define and to run a regular benchmark survey to compare the product development performance in a neutral way.

This benchmark is running since 2006 and gives some valuable insight based on real project data. For this purpose the bench-marks collects for each project character-istic data as for instance the number of wafer mask layers, the number of digital gates, the number of analogue transistors, since 2016 also the ASIL level, man power, design iterations to get the product in pro-duction, etc.

It might be obvious, that an IC with a higher complexity level will need a longer development time and a higher man power, than an IC, what is developed with a lower complexity. At the end the results must be comparable.

The integrated circuits for automotive applications of today are mainly mixed signal ICs. This means, they have analogue and digital design-in one piece of silicon. It is also obvious, that analogue design,

simulation, verification requires different efforts in time and man power than a digital design, what is automated in a wide manner.

The participating companies spend quite some effort to describe the complexity level for a given IC, so that at the end the results can be compared. A good indicator – and in – between already confirmed for several years – is the complexity unit (CU), which assigns a weight of 8 digital NAND2 equivalents to an analogue transistor. Thus the total number of complexity units

CU = #NAND2 equivalents + 8 x #Analog Transistors

is describing then in a good way the complexity of an IC design project. In general the higher the number of complexity units the higher the efforts needed to execute the project. By using complexity units different mixed signal ICs can be compared in an easy way between each other. In the benchmark we defined 3 ranges for designs based on the Com-plexity Units. These are “low”, “medium” and “high” complexity. The thresholds for these ranges are calculated out of the complexity units of all projects of the benchmark for a given benchmark survey.

1 Introduction

2 Benchmark

3

3 Results

All the data of the projects provided by the participants is anonymised and pro-cessed through a data analysis process. The results enable the participating companies to assess their own performance in terms of productivity and throughput during the development in comparison to other survey participants. The basic calculations are re-lated to numetrics (2).

Each benchmark was made up from at least three different projects from each partici-pating company (3) in the 3 complexity levels giving a total of 20 to 30 projects included into each benchmark run. Data are anonymised by a notary as neutral 3rd party and normalised. A predefined statistical analysis is done on the data.

As results the productivity and the through-put depending on IC complexity are given for instance, the influence of the team size or the reusability aspect of given design

blocks or test concepts on the productivity is shown in several graphs.

The benchmark provides for instance also an answer on the typical question of the engineering management, how many complexity units can be handled by a project team of a given team size in a given time as an industry standard.

The benchmark further collects reasons for delays and difficulties in the development in categories and also gives reasons for shifts between planning and real achieve-ments in a neutralised manner.

Also trends influencing the complexity on an IC development project and the impact of changes are demonstrated. New requirements like the influence of ISO 26262 functional safety are noticed in the 2016 run as well.

The following can show only some typical and representative results out of the devel-opment benchmark of 2016.

Figure 1: Normalised productivity vs. throughput

Source: ZVEI

Dev

elop

men

t Thr

ough

put

(Com

plex

ity

Uni

ts p

er F

TE +

FTE

(R)

per

tim

e un

its)

Development Productivity(Complexity Units per FTE)

4,5

4,0

3,5

3,0

2,5

2,0

1,5

1,0

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00,00,0 0,5 1,0 1,5 2,0 2,5 3,0 3,5 4,0

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In a 1st conclusion a wide distribution of the projects regarding the development throughput and the development produc-tivity can be seen, some projects perform better than others. Several individual factors for this behaviour will exist in each

participating company. As each participant can retrieve out of this graph his own indi-vidual company data, internal discussions about the project development performance are possible.

As a general conclusion and in line with the assumptions of numetrics the productivity decreases with growing team size. For the “high” and “medium” complexity projects it is necessary to increase team size to end up with reasonable cycle times. But increasing

the team size usually means also increasing management overhead (project structure, team communication, planning overhead, etc.). Individual conclusions must be done then again on individual company level.

Figure 2: Normalised productivity vs. team size

Source: ZVEI

Figure 3: Impact of concept phase to the development productivity

Source: ZVEI

50.000

45.000

40.000

35.000

30.000

25.000

20.000

15.000

10.000

5.000

00 10 20 30 40 50 60 70 80 90 100

Total physical HC in team

Dev

elop

men

t Pr

oduc

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ty(C

ompl

exit

y/Ef

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act

ual)

p High Complexity p Medium Complexity p Low Complexity

50.000

45.000

40.000

35.000

30.000

25.000

20.000

15.000

10.000

5.000

00 % 5 % 10 % 15 % 20 % 25 % 30 % 35 % 40 % 45 % 50 %

Effort Proportion Concept, Specification and Planing (Phase I) (Effort actual Phase I / Total Effort actual)

Dev

elop

men

t Pr

oduc

tivi

ty(C

ompl

exit

y/Ef

fort

act

ual)

p High Complexity p Medium Complexity p Low Complexity

5

A general conclusion for “high” complexity projects is, that the efforts invested in the concept phase, will pay back in improved development productivity. This remark is also valid in general for all the projects,

however a bigger distribution can be ob-served on “medium” and “low” complexity projects, what needs to be discussed again internally in each participating company.

The above chart shows the evaluation of the ranges of the complexity units for the “low” and “medium” complexity projects as function of time. For the “high” complexity projects only the evaluation of the mean value and 75 percent quantile are shown in order to remove statistical artefacts. As already mentioned, the number of analogue transistors and NAND2 equivalents in automotive semiconductors significantly increases over the time.

Beside the increase of the complexity units there are also more factors that have an influence on the development throughput and the development productivity:

• On one hand, we see a trend of the ambient temperature range of automotive ICs moving over time to higher values, so that in 2016 in praxis all ICs are in the range of –40 °C … 125 °C, the majority of ICs is specified till 150 °C, a 1st portion of ICs is already foreseen for >150 °C.

• On the other hand, the semiconductor technologies shrink down to lower feature sizes, the number of used wafer masks increases over time. While in the year 2009 the technology level of all the projects put into this benchmark was on ≥ 0.35 µm feature size, the benchmark of 2016 shows 50 percent of the projects at a technology level ≤ 0.18 µm.

Figure 4: Complexity units evaluation over time

Source: ZVEI

600.000

500.000

400.000

300.000

200.000

100.000

0

2009 2012 2013 2016

n High complexity range (up to 75 % quantile)n High complexity range (up to mean values)n Medium complexity rangen Low complexity range

6 7

Figure 5: Average effort increase during design implementation of “low” complexity products in case ISO 26262 (functional safety) requirements are applied during the development

Source: ZVEI

A significant effect has the appliance of ISO 26262 (functional safety) to a product development. As this standard is relatively new, certainly also efforts related to meth-odology developments during the product development are included, so that the dra-matic increase of development efforts can be explained and should reduce over time.

The benchmark is highlighting these effects in further analysis results more in detail, so that the participants are able to discuss these results on own company level.

It is obvious that an increased complexity of the automotive semiconductor devices over the years need then higher development efforts in man power and development time. The benchmark provides information of these values, so that the participating companies can take this into account in their project planning for the future.

Other elements to be considered are the reasons, what lead to delays during project execution as shown in Figure 6.

9.000

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2.000

1.000

0Tota

l Eff

ort

for

diff

eren

t fie

lds

of a

ctiv

itie

s (h

)

n ASIL Level (QM): othern ASIL Level (QM): Application engineers (app note, demo boards, …)n ASIL Level (QM): Quality engineersn ASIL Level (QM): Product engineers/characterisation (post silicon)n ASIL Level (QM): Test engineers (test program + hardware)n ASIL Level (QM): Layout ( Analog as well as place & route)n ASIL Level (QM): Validation pre-silicon/ Verification by independent people

n ASIL Level (QM): Modelling (behaviour modelling eg. for customer use)n ASIL Level (QM): Digital designersn ASIL Level (QM): Analog designersn ASIL Level (QM): Concept engineersn ASIL Level (QM): Technical project leader(s) / technical leadsn ASIL Level (QM): Functional safety managementn ASIL Level (QM): Project management and documentation

ASIL QM ASIL A–D

Figure 6: Reasons for delays in the project development

Source: ZVEI

40 %

35 %

30 %

25 %

20 %

15 %

10 %

5 %

0 %

16

14

12

10

8

6

4

2

0

Insuf

ficien

t acc

uarcy

of de

vice m

odels

ESD pr

oblem

s

EMC p

roble

ms

Other

tech

nical

diffic

ulties

Lacck

of re

sour

ces

Poor

proje

ct man

agem

ent

Erro

rs or

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s in s

pecifi

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Incom

plete

pre s

ilicon

valid

ation

Incom

plete

silico

n vali

datio

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Lack

of pr

oces

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Sample

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logis

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Poor

perfo

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ce of

inter

nal r

esou

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Poor

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sub

cont

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Requ

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by cu

stomer

Other

s

22 % 29 % 11 % 17 % 32 % 7 % 13 % 35 % 15 % 12 % 12 % 16 % 9 % 0 % 17 % 5 % 33 % 10 %

8

4

8

6

14

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7

4

7

4 45

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11

7

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The analysis shows these reasons for a delay in the project development in percent as well how often a given reason has been mentioned by the participating projects. As technical reason for delay for instance robustness problems towards EMC is men-tioned, what usually leads to a redesign of an IC.

But also management problems e.g. lack of resources or frequent requirement changes by customers are highlighted.

Specifically for high complexity projects incomplete presilicon verification and incomplete silicon validation become seri-ous reasons for delays in the project exe-cution.

From the results above we can conclude:• Productivity decreases with increasing

complexity of the product. This might as well be an effect of more complex techno-logies and IC functionality as well as the increase of the team size.

• Team size of complex project must be increased in order to shorten cycle times but simultaneously a decrease of the pro-ductivity must be considered by a good compromise.

• The number of complexity units given as number of normalised designs is steadily increasing.

• Several other drivers for complexity incre-ase have been discussed in the bench-mark.

• The appliance of ISO 26262 on a product development has a significant influence on development efforts.

With the data of the development bench-mark the participating companies are gen-erally enabled to quantify their individual KPI’s of IC developments for automotive applications and identify mayor gaps in the development productivity and development throughput as base for improving of design processes, methodology or tooling.

Literature1. Numetrics, White Paper, 2008, Examining the Criteria for Best-in-Class IC Development Process2. Numetrics, White Paper, May 2000, Measuring IC and ASIC Design Productivity3. Microchip / Atmel, Elmos, Infineon, Melexis, Robert Bosch, IDT et.all

4 Summmary

Benchmarking IC Development for Automotive ApplicationsPublished by:German Electrical and Electronic Manufacturers’ AssociationElectronic Components and Systems DivisionLyoner Strasse 960528 Frankfurt am Main, GermanyContact: Dr. Sven BaumannPhone: +49 69 6302-468Fax: +49 69 6302-407E-mail: baumann@zvei.org Authors:Dr. Hans-Jürgen Brand, IDT Europe Andreas Brüning, Fraunhofer Institute for Integrated Circuits IIS Thomas Freitag, Melexis Dr. Tim Gutheit, Infineon TechnologiesArmin Kemna, Elmos Semiconductor Hans-Peter Klose, Robert Bosch Benjamin Martini, Infineon TechnologiesKristina Rudi, Atmel AutomotiveDr. Andreas Vörg, EdacentrumKai Wacker, Atmel Automotivewww.zvei.org August 2017

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