Programmable Timer/Counter

Requirements

1. Waveform generation2. Precise delay generation with flexibility3. Interrupt generation

a. Interrupt on terminal countb. Programmable mono or one shot interrupt on terminal countc. Periodic interrupt

4. Rate generator5. Square ware generation6. Baud rate (clock) generation for serial port7. Count internal clock for timing 8. Count external events9. Software triggered counting – strobe generation10. Hardware triggered counting - strobe generation11. Deferred count12. Programmable re-trigger able counting 13. On the fly counter read and write – read back 14. Interleaved read and write operation on counters15. Faster counting operation16. Low power consumption17. Independent working - free MPU 18. Parallel mode of operation

Many apps in process control instrumentation and ES we have to generate clock of dff freq and delays o fdiff durations and strobe signal after certain duration orinterval – this type of signal sare common in this type of appsHow these signals can be generated by using diff technques – softare and hw and combined approachHow a prgogrammable timer counter device can be used efficiently for this purpose

Softare based approachWe use port lines connected to the mpu – PIO – 8255A connected to the system bus8255 has a no of port linesTo generate a clock on PA0 – we can configure port a as output and generate a delay for 1/0 for square wave output in a loopWith time period T = time priod of on + time priod of off = T1 + T2 And we know how the delay routines can be writeen for a particular time period or duration or delayWe can generate a clock like above

Another port line PA1 to generate another waveform of diff delay for 1 and 0And when the PA1 is made back 1 – this signal can be used for genreatijon of interrupt

Similarly we can use PC0 line to generate a strobe signal generation after an interval

So this type of clock generation, delay generation and strobe signal generation can b edone by programming port lines of 8255A

However it has some limitations

LimitationsMpu remains busy whenever delay / clock or strobe generation is done – since mpu is running a program in loop for one job alone

Generate only one signal at a time – cannot generate 3 such signals at a time which may required in some apps

Although flexible – impln by program but since above 3 ltns lmit the usage of this software base approach

So use purely hw based approach

Hw based approach using 555 timer – 8 pin IC chipVery versatile – since hw based – all the functionality has to be implemented by suitable hw interconnectionsEx: clock or a delay generatorOperation of 555 timer chipWe have got two comparatorsIn comparator – inputs may be analog in nature and output is digital in natureWhen the positive input is higher than the negative input then the output is 1 And bw positive input of higher comparator and negative input of lower comparator we have 3 resistors called precision resistors laser trimmed and very accurateAll resistors of 5K ohmsOn Vcc then we get 2/3 rd voltage at positive input of lower comparator and 1/3rs votlaage at second point as per ohms law

These two comparators are driving a SR flip flopS connected to upper copartor and R iput is connected to the lower comparator

We have the SR outputs Q and Q complementQ drives another transistor as shown to discharge the capacitors – purpose

Now how this 555 can be used to generate a clockOperation is known as astable multivibrator operation for clock generation

Discharge pin is connected to the junction of the two resistorsThreshold pin is connected to the junction of the R and C as shown abovePin 3 is output

On power – C was in discharge condition – so 0 and voltage of + is higher in lower comparator and so the output is higher which makes R and it will reset the ff and so Q is 0 and Q complement will be 1So we get 1 on the ouput pin

As the charge happens and reaches the 2/3 vcc then the upper comparator is on and sets the ffSo q is 1 and q complement is 0And so the tx of pin 7 is on and C starts discharging and then the output is 0Now on discharging to the 1/3 level then the lower comparator will b eactive an d R is 1 and so reset the ffSo the C charges and discharges bw vcc/3 and 2/3vcc and output we get 1/0 clock signalFrequency of clock signal is derived as shown above

Now we can use the same chip but we have to change the hw interconnection for delay generation

Delay is mentioned in the waveform – time period for onInput trigger is shownOn high voltage signal Vcc then output is 0 and so tx is off and so C starts charging and as it reaches 2/3vcc then upper compartor sets the ff and tx is on and c discharges

So after the trigger input the circuit generates a delay of t and waits for another trigger as shown above

So using 555 timer we can generate clock and delay but hw interconnection have to be changedBbut the mpu need not be busy since 555 takes care of the job

Dis adv is operation is controlled only by the hw interconnectionsWe need to change the R and C for diff clock and delay as shown and so not flexible

In software case it is very flexible but mpu is busy

To achieve best of the both hw and sw approaches To have the flexibility of the programming to change the operation and configuration and at the same time mpu should not remain busy for mundane job

We use special IC – combined approach of hw and sw – 8253

Accurate time delay generationFree MPU from counting processMin software overhead on MPU

8253 can be interfaced to mpu system busCs signal via decoder circuit or drect fjrom mpu

Data lines / read lines / a0 a1 Map various registers via cs to the address lines

8253 internalData bus bfufers for tristat buffersRw control logic to control various reg inside the chipCW register to configure themode of operation3 16b registers which can be used as counters – whicih can be used to generate clock /delays /strobe input etc.,

3 16b counters

Max count rate of 2.6 MHz

Generate 3 independent delays or counters simultaneously

CW registers to control 3 counters independently

BD 8b data buffers to MPU Data bus

IN and OUT for read and write

Read write control logic

Peripheral devices are programmable interval timer is a chip to be interfaced with 8086 to generate various types of clock outputWe have two programmable interval timer chips

Minor difference bw two chips above

Output of the timer in the above chips is used to generate interrupt to the processor 8086 or via 8259 PIC as 3 separate interrupt pins for 3 independent timers in the chip

So what are the differences?8253 is slower chip whereas 8254 is a faster chip8253 is N-MOS and 8254 is HMOS which are internal to the processor technology

We can poll the 8254 to understand the status of the timers so it has the read back command facility which is not in 8253

There are 6 modes of operations in 8253 and 8254

We use special IC – combined approach of hw and sw – 8253

8253 can be interfaced to mpu system busCs signal via decoder circuit or drect fjrom mpuData lines / read lines / a0 a1 Map various registers via cs to the address lines

3 independent counters – identical in organization16b pre-settable down countersBCD or Hex modeMode CW registers for configuring countersIN and OUT for read/write count valueOn fly reading count value in 8253 w/o disturbing clock input to the counter – invoked using mode CW

8253 internalData bus bfufers for tristat buffersRw control logic to control various reg inside the chipCW register to configure themode of operation3 16b registers which can be used as counters – whicih can be used to generate clock /delays /strobe input etc.,

How these registers can be accessed and format of mode control registerOn cs = 0 and using a8/a0 and a9/a1 we can access the required registers as shown in the table

How a 16b register can be accessed with single address – some trick is used – to access the LSB and MSB of the coutner 16b register

Mode control reg – 8b Bit 0 – BCD – count value given either in binary or BCD

Using the ounter to oprater iin inary or bcd mode or binary counter or decade counterDecade or divide by 10 counter

M0m1m2 (D1D2D3) – set 6 modes of operation

So each of the section (3 counters) each of them can be operated in 3 diff waysEach counter is provide with 3 lines – clock input / gate input and output linesAll 3 are independent

RL0 and RL1 – we know that same addrss is used to access the LSB and MSB of the 16b register counter00 – counter latch – by which we can read the value of the counter on the fly when it is inc or dec01 – msb is accessed10 – lsb is accessed 11 – lsb and then msb

Sc0 and sc1 – used to access –since we have 3 independent counter registers – so there should be 3 independent control regisrer for each – so we have to program all the 3 contro regiseters separately

A0 and A1 – address input pinsAddressing mode CW and counter registersCS

CW 8b register for configuring countersWO and cannot readCLK GATE and OUT for each timer channel

6 modes – or mix of modes of different counters at a timeCW formatWriting to counter – only when data is on data bus and followed by falling edge of clock Garbage value on read before falling edge of the clock

Operation of the device 8253

Mode 0 – interrupt on terminal countWe have clock connected to the timer/counter section 0/1/2Max clock frequency is 2MHzSo apply the clockUse out instruction to write some value to the counter register Then from the next clock counter keeps decrementing Ex: n=3 is initial count value loaded then so the counter act as a count down register starting from 3On reaching the count 0 output line goes high which can be used to interrupt the mpuSince interruptlines of mpu are high active – outputlines of the counter can be directly connected to the nterrupt lines of the mppu to interrupt the mpu

We have gate inputGate input is used to inhibit the count downSo count down will not take place when the gate input is active as shown above after the initial count 3

So the gate is inhibiting the clock to dec the counter

App of mode 0 Use it to generate a interrupt to mpu after a delay periodFind out the initial value to written intot the counter16b can take 64K max value for count

Decrement on falling edge of clock

Gate is to inhibit counting

On terminal count – out is high till reloaded or reprogrammed

Write to count register on previous counting under process

First byte stops previous count

Second byte starts new count

Mode 1 – hw retriggerable one shotJust like monostable multivibrator as in 555 timer – trigger signal to trigger the timer for delay generation – we can realize the same in mode 1 of 8253Apply the clockApply the trigger signalLets assume value written to countr using out instnSo on trigger counter starts count down and on 0 terminal count – output is raised high

Suppose if another trigger input comes in the middle of the count downThen the cunter works as a retrigerrable mode in mode 1 So at the second trigger input – again it starts counting down from the initial value

Same like 555 timer monostable multivibratior mode for delay generationHere gate line is used as trigger input

In the above case the count is loaded with 3 as showns as LSB=3

And when the gate goes high the count down starts down wards – 3 2 1 and on 0 the output goes high as shown as FFFF

This is called one shot – so for one count it goes down and goes up on the output pin And this can be re trigerred by trigeerring the gate again

Hardware retrigerrale one shot mode – how does it workAbove shows the retrigerringGate goes high which causes the output pin go low and count down startsAnd the re trigerring happens somewhere in betweenNow on re triggering counter starts counting the value loaded initially again as shown above

Above shows counter with first value loaded as 3 and count down starts and in middle the counter is loaded with new value of 4 Now on second gate input the counter starts from 4 as shown

Mode 2 – rate generatorIf we write initial value n – then the counter keeps on generating strobe input for every n valuesOutput goes low for the 0th count or pulse and again repeats itSo rate generator - keeps on generating a strobe or pulse of duration 1 clock period when the count reaches 0 and again the regiser is reloaed with the same initial value internally automatically and not required to manually load it So what is the role of gate inputGate can be used to reset the counter to intital value in the due of count down process and the rate generation continues after the counter reset

So here in the rate generator output goes low on every terminal count as shown above

So this happens periodically - output goes low as long as the gate is high for every terminal count

This is the reason to be called as rate generator – since it generates output signal at the rate given the periodicity in terms of count

Countdown stops on gate low and starts only on gate high

So the processor has the control over the way the rate generator mode operates in 8253

We can change the count value – by which we can change the frequency with which the output pulse is generated - we can change the rate by chngin the count value in the middle

So count down begins with the old value As new counter value is loaded which restarts the counter after the current countdown is completeAs shown aboveSo after the current countdwono reaches the terminal count next count down starts with then new value loaded and starts counting down as shown above

We cangnerate the rate and also vary the frequency of rate by changing the count value in the middle

Mode 3 - simple square wave generation as case of astable multivibartior using 555 timerHere apply clockWerite a a value of n – n can be odd or evenSo when n is odd then the output is 1 for n+1/2 duration and 0 for n-1/2 durationWhen n is even then output is 1 for n/2 duration and 0 for n/2 duration

Ex: n=3 then n is odd then output is 1 for 2 clock period and low for 1 clock peiroid as shown belowIt is not a square wave but a rectangular wave for n=3

For n=4 even then output is 1 for 2 clock periods and low for 2 clcock periods and so on so we get a square waveHere the diff bw n=4 and n=3 is only of on eclock period – difference of one clock period is decrementing odd value by one at first clock cycle with output as highWhenever the n is laree then the diff is not noticeable

Ex: n=5000 then 1 will be 2000 and other will be 2001 not noticeable for larger n values

Mode-4 software triggered strobe modeIt generates strobe signal at the outputApply clockWrite the initial value into the counter registerWerite operation acts as a trigger and counter starts count down and on 0 output is generated which is strobe which remains high So a strobe of 1 dueartion (output) is gnerateed when the terminal count is reached on count down

Count down oepratoin can be delayed by gatingGate input can delay the counting period

So only one strobe output is generated which can beused to start some other app or say trigger other hw in above case and gate is used to delay the counting

In sw trigger writing operation itself trigerrs the stobingoperation

Mode-5 – hw trigerred strobeHere gate line is used as trigger inputSo apply clockWrite the counter intial valueBut there is no activity on the ouputAs soon as a trigger from gate input is applied then the counter starts counting down then the strobe ishigh on terminal count for one clock periodSo coutner is trigerred by the gate input

Counter can be retriggered in the due course of count down also

So here also the strobe is generated only once for every trigger form the hw input – gate

How do various modes of 8253 / 8254 workThere is connection bw signal states, mode of operation, gate value and so on

Above table shows how the different mode works

So in mode 2 as shown – on gate low or going low – it disables counting and sets the output highOn gate rise it starts couonting and when the gate is high it enables counting to continueSo called rate generator in mode 2 since contiously counting as long the gate signal is high in mode 2

So above tablw shows the impact of gate signal on the working of 8253/8254 in various modes

Where can 8253/8254 be used or how tto interface with 8086If the gate signal is coming from an external device we can generate an interrupt after so on so period of time

Interfacing 8253 to the processor 8086

16b address bus is decoded to generate the chip select as shown above8b data bus is connected to the processor 8086

Above is configured in an io mapped io and so the M/IO bar should be low for the io mapped io to be active

Above is an example of 8253 which decodes the 16b address bus using io mapped io and this can be done using memory mapped io as well

Practical example of 8253Consider we have a 8253 in an appAnd we have 8251 connected to the systemDecoder circuit for cs of 8253 is based on a7,a6,a5 via inverter, a4 via inverter, and io/mSo address will be c0.c1.c2.c3 for diff registers inside the 8253

Now 8251 has got two inputs txC and rxC where the clock has to be appliedAnd this clock has been gneratred by 8253And 8251 when used for implementing the rs232c then it can have various standard baud rates

Lets assume that clock corresponds to the baud rate of 19,200So that inside the 8251 by programming we generate two more addresses Divide by 16 to get 1200And divide by 64 to get 300

So 19,200 1200 and 300 are the baud rates generated by the 8251 and for this we require a clock of 19200 from 8253How the clock of 19200 can be generated

Now out of one of the counter in 8253 is connected to the txC and rxC clock inputs of the 8251And the clock input of 8253 for one of the counter is connected from clock output of the mpuMpu clock output is 3.072MHzAnd since the max clock freq of 8253 is 2MHZ so 3.072MHz from mpu cannot be directly applied and so divide by 2 to get 1.536MHz

Assume the gate input connected to Vcc

Now by programming 8253 we have to generated clock frequency of 19200 to 8251We can program 8253 inmode-3 for square wave generator

First init the control register with code

Lets assume that counter is bcd counterMode will be mode 3Load lsb followed by msbLets use control reg of counter 0

So the code is 0011 0111 – 37hMov 37h to acc and out to control register addrss of counter 0C0 for counter reg 0 and so on and so c3 is for contro register

Now to intit the counter rgister wehave to wrirte lsb and followed by msbIn this case we have togenerarte 19200 clcocks from 1.536MHz input clock1.536*10 power 6 / 19200 which is 80 in BCDAfter init the counter register with lsb and then msb

Then we get continuous 19200 clock from the ouput of the 8253 which can be applied to the serial port chip 8251So mpu is free after running the above piece of code and can be halt or else do something

So with the help of PIO chips - once init is done then it eeps on doing the corresponding task continuously without the intervention of the mpu

Similarly in case of 8251 once the char is written into the tx buffer – 8251 takes care of framing – generates the start bit – shifts the databits - parity bit generation – stop bits generation So 8251 continue to generate start bit / data bits / parity bit / stop bits without mpu and so mpu is free

Similarly on receiving a byte – all the extra bits are stripped off and parity is checked and only the byte of data is tx to the receive buff which can be read by the mpu

So PIO not only relieves the mpu from mundane job and also extends the flexibillit of the mpu based system