VXL-Ch01-BT tai lop
description
Transcript of VXL-Ch01-BT tai lop
-
01-Mar-11
1
Bi tp VXL Ch01
Little endian and Big endian
Variable X has 4-byte representation
0x01234567 (01234567H)
Big Endian
Little Endian
0x100 0x101 0x102 0x103
01 23 45 6701 23 45 67
0x100 0x101 0x102 0x103
67 45 23 0167 45 23 01
0x000 ....
0x100 ....
-
01-Mar-11
2
Memory
Given a ROM module of size 128 x 8.
a) How many address lines and data lines
does it have?
b) How many of these 128 x 8 ROMs are
needed to build a 16K x 16 ROM?
MemoryFill in the sizes of the ROM modules shown below.
-
01-Mar-11
3
1) What is the organization and capacity of each of the memory devices?
RAM organization: _____ RAM Capacity (in bits): _____
ROM organization: _____ ROM Capacity (in bits): _____
2) Write the address ranges (in hex) to which each memory device responds:
RAM: ___________________________________________
ROM: ___________________________________________
3) What kind of address decoding (full address decoding or partial address decoding) is used for each memory device:
Full address decoding is used for .
Partial address decoding is used for ________.
-
01-Mar-11
4
a) How many address lines do we need for each device (EPROM, RAM,
PIO [Parallel Input Ouput])?
b) What kind of address decoding (full address decoding or partial address
decoding) is used for figure (a) ?
c) Find the address range of each device in figures (a) .
a) How many address lines do we need for each device (EPROM, RAM,
PIO [Parallel Input Ouput])?
b) What kind of address decoding (full address decoding or partial address
decoding) is used for figure (b) ?
c) Find the address range of each device in figures (b) .