Voltage-Series Feedback

Two examples of the voltage-series topology are considered in this section:

(a) The FET common drain amplifier (source follower), and(b) The bipolar transistor common-collector amplifier (emitter

follower).

The FET Source Follower The circuit is given in Fig. 13-12a.

For AC analysis, all capacitors (dc blocking and bypass) are considered short circuited and the biasing voltages should be grounded as shown in Fig. 13-12.1.

In Fig. 13-12.1 the terminals G and S are used for input and D and S are used for output.

The feedback is the voltage Vf across R, and the sampled signal is the output voltage Vo across R.

Hence, this is the case of voltage-series feedback.

We must now draw the basic amplifier without feedback where all grounds are eliminated.

To find the input circuit, set Vo=0 (the output loop is shorted) as shown in Fig. 13-12.2(a).

Hence Vs appears directly between G and S as shown in Fig. 13-12.2(b).

To find the output circuit, set Ii=0 (the input loop is opened) shown in Fig. 13-12.3(a).

Hence R appears only in the output loop.

Finally, we obtained Fig. 13-12(b) by adding Fig. 13-12.2 (b) and Fig. 13-12.3(b).

If the FET is replaced by its low-frequency model, the result is Fig. 13-12(c).

From the figure Vf and Vo are equal, and = Vf / Vo =1.

This topology stabilizes voltage gain. AV is calculated by inspection of fig. 13-12c. Since without feedback Vi=Vs, then

drmgRdr

R

sVRdr

RdrsVmg

iVoV

VA

where,)3913(

)(

)4013()1(

11Thus,

Rdr

Rdr

RdrR

VAD

)4113()1(

and

Rdr

RDVA

VfA

The input impedance of an FET is infinite, Ri=, and hence Rif=RiD=.

We are interested in finding the output resistance seen looking into the FET source S. Then, Ro=rd.

Hence R is considered an external load RL. Thus RL= R. Then

1/limlimhence;

LRdrLRVA

LRvA

LRdrLR

VA

)4213(11

:topologyseries-voltageforknowWe

dr

vAoR

ofR

)4313()1()1(

''Again,

Rdr

Rdr

Rdr

Rdr

drRdRr

DoR

ofR

Since three assumptions are satisfied, the above results are exact for voltage-series feedback topology.

The Emitter Follower The circuit is given in Fig. 13-12a.

In Fig. 13-13.1 the terminals B and E are used for input and C and E are used for output.The feedback is the voltage Vf across Re, and the sampled signal is the output voltage Vo across Re.

Hence, this is the case of voltage-series feedback.We must now draw the basic amplifier without feedback where all grounds are eliminated.

Equivalent circuit for ac analysis is shown in Fig. 13-13.1.

To find the input circuit, set Vo=0 (the output loop is shorted) as shown in Fig. 13-13.2(a).

Hence Vs in series with Rs appears between B and E.

To find the output circuit, set Ii=0 (the input loop is opened) shown in Fig. 13-12.3(a). Hence R appears only in the

output loop.

Finally, we obtained Fig. 13-13(b) by adding Fig. 13-13.2 (b) and Fig. 13-13.3(b).

If the transistor is replaced by its low-frequency approximate model, the results is Fig. 13-13(c).

From this figure Vo=Vf and =Vf/Vo=1.

This topology stabilizes the voltage gain. AV is calculated by inspection of Fig. 13-13c.

Since Rs is considered as part of the amplifier then Vi=Vs, and

)4413(

iehsReRfeh

sVeRbIfeh

iVoV

VA

)4513(11

iehsReRfehiehsR

iehsReRfeh

VAD

)4613(

eRfehiehsR

eRfeh

eRfehiehsRiehsR

iehsReRfeh

DVA

VfA

For hfeRe>>Rs+hie, AVf1, as it should be for an emitter follower.

The input resistance without feedback is Ri=Rs+hie from Fig. 13-13c.

)4713(

)(Hence,

eRfehiehsRifRiehsR

eRfehiehsRiehsRDiRifR

We are interested in the resistance seen looking into the emitter.

Hence Re is considered as an external load i.e. RL=Re.

VALR

vA lim

Thus for this voltage-series topology, we get

)4813(1

vAoR

ofR

From Fig. 13-13c, we are looking into a current source Ro= and

The indeterminacy in Eq. (13-48) may be resolved by first evaluating Rof

’ =and then going to the limit Re.

Thus, since Ro’ =Re.

)4913()('

'

eRfehiehsR

iehsReR

DoR

ofR

)5013('limand

feh

iehsRofR

eRofR

It is seen form the above equations that the feedback desensitizes voltage gain with respect to changes in hfe and that it increases the input resistance and decreases the output resistance.

The forgoing expressions for AVf, Rif and Rof are based on the assumption of zero forward transmission through the feedback network.

Since there is such forward transmission because the input current passes through Re in fig. 13-13a, these expressions are only approximately true.

A Voltage-Series Feedback Pair Fig. 13-14 shows two cascaded stages whose voltage gains are AV1, and AV2.The output of the second stage is returned through the feedback network R1R2 in opposition to the input signal Vs. Clearly, then this is a case of voltage-series negative feedback.The first basic assumption is not strictly satisfied for the circuit of Fig. 13-14a because I’ represents transmission through the feedback network from input to the output.

We shall neglect I’ compared with I on the realistic assumption that the current gain of the second stage is much larger than unity.

The input of the basic circuit without feedback is found by setting Vo=0 and hence R2 appears in parallel with R1 as shown in Fig. 13.14.2 (a) and (b).

The output of the basic amplifier without feedback is found by opening the input loop (set I’=0) and hence R1 is placed in series with R2 as shown in Fig. 13.14.3 (a) and (b).

Finally, we obtained Fig. 13-14(b) by adding Fig. 13-14.2 (b) and Fig. 13-14.3(b).

According to Fig. 13-14b, the series feedback voltage Vf across R1 in the output circuit. Thus,

211RR

R

oVf

V

Second-Collector to First-Emitter Feedback Pair

The circuit of Fig. 13-15 shows a two-stage amplifier which makes use of voltage-series feedback by connecting the second collector to the first emitter through the voltage divider R1R2.

All these capacitances represent negligible reactances (short-circuited) at the frequencies of operation of this circuit.

Capacitors C1, C2 (coupling), C5, and C6 are dc blocking capacitors, and capacitors C3 and C4 are bypass capacitors for the emitter bias resistors.

Example: (i) Identify the topology of the feed back amplifier of Fig. 13-15, and (ii) Calculate AVf, Rof, and Rif for the amplifier of Fig 13-15. Assume Rs=0, hfe=1.1K, hre=hoe=0, and identical transistors.

Solution:

(i) Fig. 13-15 shows two BJT common-emitter cascaded stages.

The output of the second stage is returned through the feedback network R1R2 in opposition to the input signal Vs. The feedback signal is voltage. Thus, this is a case of voltage-series negative feedback.

(ii) first calculate the overall voltage gain without feedback from AV= AV1AV2.

The effective load RL1’ of transistor Q1 is

942K1.133471022211'1 iehbRbRcRLR

K37.2K)7.41.0(7.4)21(2'

2 RRcRLR

The effective load RL2’ of transistor Q2 is

The effective emitter impedance Re1 of transistor Q1 is

980.098KK7.41.0211 RReR

The effective emitter impedance Re2 of transistor Q2 is zero (i.e. Re2=0).

eRfehiehLRfeh

oViV

VA)1(

Generally, the gain of a common-emitter amplifier is as follows:

72.7098.0511.1

942.050

1)1(

'11

1

eRfehiehLRfeh

iVV

VA

Thus, the voltage gain for the first stage amplifier of Q1 can be obtained as follows:

Similarly, the voltage gain for the first stage amplifier of Q2 can be obtained as follows:

1081.1

37.250'

2

2)1(

'2

12

iehL

Rfe

h

eR

fehieh

LR

feh

VoV

VA

Hence, the voltage gain AV of the two stages in cascade without feedback is

83410872.721

V

AV

AiVoV

VA

The feedback factor of Fig. 13-15 is as follows: 481

4800100

21

1 RR

R

Thus: 4.1748

834 VA

The return difference and gain with feedback is obtained as follows:

4.454.18

834;4.181

DVA

VfAVAD

The input resistance without external feedback is:

K1.6098.0511.11)1( eRfehiehiR

K112)4.18)(1.6( DiRifRHence, the input resistance with feedback is obtained as follows:

The output resistance without external feedback is:

K37.2'2

' LRoR

Hence, the output resistance with feedback is obtained as follows:

129K4.18

37.2''

DoR

ofR

Current-Series Feedback

Transistor Configuration

The circuit of transistor configuration as current series feedback is given in Fig. 13-16a.

The feedback signal is the voltage Vf across Re and the sampled signal is the load current Io. Hence, this is a case of current-series feedback.Although Io is proportional to Vo, it is not correct to conclude that this is a voltage-series feedback.

Thus, if the output signal is taken as the voltage Vo, then

LR

eR

LRoI

eRoI

oVf

V

Since is now a function of the load RL, the third basic assumption given in section 13-3 is violated.

The input circuit of the amplifier without feedback is obtained by opening the output loop (Io=0).

The circuit of Fig. 13-16b represents the basic amplifier without feedback, but tasking the loading of the network into account.

Hence Re must appear in the input side.

Similarly, the output circuit is obtained by opening the input loop (Ii=0), and this places Re also in the output side.

The resulting equivalent circuit is given in Fig. 13-16b.

If the transistor of Fig. 13-16(b) is replaced by its low-frequency approximate model, the results is Fig. 13-16(c).Since the feedback voltage Vf appears across Re in the output circuit, then from Fig. 13-16c

)5213(

eRoI

eRoI

oIfV

Since the input signal Vi without feedback is the Vs of the Fig. 13-16c, then

)5313(

eRiehsRfeh

sVbIfeh

iVoI

MG

)5413()1(

11

eRiehsReRfehiehsR

eRiehsReRfeh

MGD

eRfehiehsReRiehsR

eRiehsRfeh

DMG

MfG)1(

)5513()1(

eRfehiehsRfeh

MfG

If (1+hfe)Re>>Rs+hie, and since hfe>>1, then GMf-1/Re, in agreement with GMf1/. If Re is stable resistor, the transconductance gain with feedback is stabilized (desensitized).

The load current is given by

)5613()1(

eRsV

eRfehiehsRsVfeh

sVMfGoI

Under the conditions (1+hfe)Re>>Rs+hie and hfe>>1, the load current is directly proportional to the input voltage, and this current depends only upon Re, and the not upon any other circuit or transistor parameter.

The voltage gain is given by

)5713()1(

eRfehiehsRLRfeh

LRMfGsVLRoI

VfA

Subject to the conditions (1+hfe)Re>>Rs+hie and hfe>>1,eRLR

VfA

and the voltage gain is stable if RL and Re are stable resistors.

)5813()1( eRfehiehsRDiRifR

From Fig. 13-16c, we see that Ri=Rs+hie+Re, hence

Since Ro=, then Rof=Ro(1+Gm)= . Hence

LRofRLRofR '

Example: The circuit of Fig. 13-16a is to have an overall transconductance gain of –1mA/V, a voltage gain of –4, and a desensitivity of 50. If Rs=1 K, hfe=150, and rbb’ is negligible, find (a) Re, (b) RL, (c) Rif, and (d) the quiescent collector current Ic at room temperature.

Solution:

a. GMf= GM/D=-1 mA/V then GM= -50 mA/V.

Since =-Re, then D=1+GM=1+50Re= 50;

Or Re =0.98K 1 K.

b. AVf=GMfRL or RL=AVf/GMf= (-4)/(-1)= 4 K.

c. From Eq. (13-53)

GM=-50=(-hfe)/(Rs+hie+Re)=(-150)/(1+hie+1)

then hie=1 K.

Ri= Rs+hie+Re= 3 K

Rif= RiD= (3)(50)=150K

d. From Eqs. (11-9) and (11-6)

hie=rbb’+rb’e(hfe)/(gm)=(hfeVT/IC)

then IC=(hfeVT/hie)=(150)(0.026)/91)=3.9mA.

FET Configuration

The circuit of FET CS Stage with a source resistor R as current series feedback is given in Fig. 13-17a.

The circuit of Fig. 13-17a is analogous for the transistor (Fig. 13-16a) CE stage with an emitter resistor Re.

Proceeding as we did for the transistor amplifier, we obtain the circuit of Fig. 13-17b. Replacing the FET by its low-frequency model results in Fig. 13-17c.

)5913(

RLRdrRLRdrdrmg

sVoI

iVoI

MG

)6013( RoIfV

)6113()1(

11

RLRdr

RLRdr

RLRdrR

MGD

)6213()1(

RLRdrD

MGMfG

drmgwhere,

)6313(thenSince, DiRifRiR

To calculate Rof

we need Gm RdrRLRdrLRMG

LRmG

0lim

0lim

Rdr

Rdr

RdrRmG

)1(

)(11

RdroR The output resistance without considering load RL is

Rdr

RdrRdrmGoRofR

)1(

)()1(

)65.13()1( RdrofR

RLRdr

RLRdr

Rdr

Rdr

RLRdrLRRdr

DmG

oRofR)1(

)1()()1(''

)66.13()1(

])1(['RLRdr

RdrLRofR

Current-Shunt Feedback

Figure 13-18 shows two transistors in cascade with feedback from the second emitter to the first base through the resistor R’. The voltage Vi2 is much larger than Vi1 because of the voltage of Q1.

Also, Vi2 is 180o out of phase with Vi1. Because of emitter-follower action, Ve2 is only slightly smaller than Vi2, and these voltages are in phase.

Hence Ve2 is larger in magnitude than Vi1 and is 180o out of phase with Vi1.

If the input signal increases so that Is’ increases, If also increases, and Ii=Is’-If is smaller than it would be if there is no feedback.

This action is characteristic of negative feedback.

Thus the circuit of Fig. 13-18 acts as a negative feedback.

Since Ve2>>Vi1, and neglecting the base current of Q2 compared with the collector current,

)67.13('

)(

'2

'21

ReRfIoI

ReV

ReViV

fI

)68.13('

Or, oIeRR

oRoIfI

eRRoR

'where,

Since the feedback current is proportional to the output current, this circuit of Fig. 13-18 acts as a current shunt feedback amplifier.

)69.13('1

oReRR

fIA

The current gain with feedback of this circuit is:

So, AIf is stable (desensitized) provided that R’ and Re are stable resistances.

The voltage gain with feedback of this circuit is:

)70.13(22'2

sRcR

sRcR

eReRR

sRsIcRoI

sVoV

fVA

If Re, R’, Rc2, and Rs are stable elements, then AVf is stable.

Amplifier Without Feedback of Fig. 13-18 The input circuit of the amplifier without feedback is obtained by opening the output loop at the emitter of Q2. This places R’ in series with Re from base to emitter Q1.

The output circuit is found by shorting the input node (the base of Q1). This places R’ in parallel with Re.

The resultant equivalent circuit is given in Fig. 13-19.Since the feedback signal is a current, the source is represented by a Norton’s equivalent circuit with Is=Vs/Rs.

Voltage-Shunt Feedback Figure 13-20a shows a common-emitter stage with a resistor R’ connected from the output to the input.

In the circuit of Fig. 13-20a, the output voltage Vo is much greater than the input voltage Vi and is 180o out of phase with Vi. Hence

)77.13('' oV

RoV

RoViV

fI

'

1where,

R

Since the feedback current is proportional to the output voltage, this circuit acts as a voltage-shunt feedback amplifier.

The transresistance with feedback is obtained as follows:

)78.13('1

RsIoV

MfR

The transresistance equals the negative of the feedback resistance from output to input of the transistor and is stable if R’ is a stable resistance.

RMfR

If we assume that Rif’=0, then the voltage gain

with feedback is

)79.13('1

sRR

sRsRsIoV

sVoV

VfA

If R’ and Rs are stable elements, then AVf is stable.

Amplifier Without Feedback of Fig. 13-20(a)

The input circuit of the amplifier without feedback is obtained by shorting the output node (Vo=0). This places R’ from base to emitter of the transistor.

The output circuit is found by shorting the input node (Vi=0), thus connecting R’ from collector to emitter.

The resultant equivalent circuit is given in Fig. 13-20b.

Since the feedback signal is a current, the source is represented by a Norton’s equivalent with Is=Vs/Rs.

The feedback signal is the current If in the resistor R’ which is in the output circuit. From Fig. 13-20b

If the amplifier is deactivated by reducing hfe to zero, a current If passes through the network (the resistor R’) from input to output.

This current is given bycRRsR

sVfI

'

The output current Io with amplifier activated is cR

sVVfA

cRoV

oI

Hence the condition that the forward transmission through the feedback network can be neglected is Io>>If, or

cRRsRcR

VfA

'

Since the voltage gain is at least unity, this inequality is easily satisfied by selecting Rs+R’>>Rc.