VLSI M-Tech-2013 new list kresttechnology

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 M.Tech Projects VLSI S.NO Projects Titles Year 1 Low-Power and Area-Efficient Carry Select Adder 2012 2 Platform-Independent Customizable UART Soft-Core 2012 3 Accumulator Based 3-Weight Pattern Generation 2012 4 An efficient FPGA implementation of the Advanced Encryption Standard algorithm 2012 5 Implementation of a Flexible and Synthesizable FFT Processor 2012 6 An On-Chip Delay Measurement Technique Using Signature Registers For Small-Delay Defect Detection 2012 7 Period Extension And Randomness Enhancement Using High-Throughput Reseeding-Mixing PRNG 2012 8 Single Cycle Access Structure For Logic Test 2012 9 A Lightweight High-Performance Fault Detection Scheme For T he Ad vanced Encryp tion Standard Using Composite Fields 2012 10 A Low-Power Single-Phase Clock Multiband Flexible Divider 2012 11 ON MODULO 2 n + 1 ADDER DESIGN 2012 12 Measurement And Evaluation Of Power Analysis Attacks On Asynchronous S-Box 2012 13 Mapping Multi-Domain Applications Onto Coarse-Grained Reconfigurable Architectures 2012 14 Design and Implementation of Two Variable Multiplier Using KCM and Vedic Mathematics 2012 15 Design and Implementation of a High Performance Multiplier using HDL 2012 16 An On-Chip AHB Bus Tracer With Real-Time Compression and Dynamic Multiresolution Supports for SoC 2011

Transcript of VLSI M-Tech-2013 new list kresttechnology

Page 1: VLSI  M-Tech-2013 new list kresttechnology

 

 

M.Tech Projects

VLSI 

S.NO Projects Titles  Year

1 Low-Power and Area-Efficient Carry Select Adder  2012

2 Platform-Independent Customizable UART Soft-Core 2012 

3 Accumulator Based 3-Weight Pattern Generation 2012 

4 An efficient FPGA implementation of the Advanced Encryption Standard algorithm 2012 

5 Implementation of a Flexible and Synthesizable FFT Processor  2012 

6An On-Chip Delay Measurement Technique Using Signature Registers For Small-Delay Defect

Detection2012 

7Period Extension And Randomness Enhancement Using High-Throughput Reseeding-Mixing

PRNG2012 

8 Single Cycle Access Structure For Logic Test 2012 

9A Lightweight High-Performance Fault Detection Scheme For The Advanced Encryption

Standard Using Composite Fields2012

10 A Low-Power Single-Phase Clock Multiband Flexible Divider  2012

11 ON MODULO 2n + 1 ADDER DESIGN 2012

12 Measurement And Evaluation Of Power Analysis Attacks On Asynchronous S-Box 2012

13 Mapping Multi-Domain Applications Onto Coarse-Grained Reconfigurable Architectures 2012

14 Design and Implementation of Two Variable Multiplier Using KCM and Vedic Mathematics 2012

15 Design and Implementation of a High Performance Multiplier using HDL 2012

16An On-Chip AHB Bus Tracer With Real-Time Compression and Dynamic Multiresolution

Supports for SoC2011

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17 Reliable and Cost Effective Anti-coll ision Technique for RFID UHF Tag 2011

18Ddr3 Based Lookup Circuit For High Performance Network Processing

2011

19Design And Implementation Of High Performance AHB Reconfigurable Arbiter For On-Chip

Bus Architecture

2011

20 Self-Immunity Technique to Improve Register File Integrity against Soft Errors2011

21 16-Bit RISC Processor Design For Convolution Application2011

22Radix-8 Booth Encoded Modulo 2n-1 Multipliers With Adaptive Delay For High Dynamic

Range Residue Number System

2011

23 A Spurious-Power Suppression Technique for Multimedia/DSP Applications (MAC)2011

24 High Throughput DA-Based DCT With High Accuracy Error-Compensated Adder Tree 2011

25 An Efficient Implementation of Floating Point Multiplier  2011

26 Reducing the Computation Time in (Short Bit-Width) Two’s Complement Multipliers 2011

27 Design and Characterization of Parallel Prefix Adders using FPGAs 2011

28A New VLSI Architecture Of Parallel Multiplier Accumulator Based On Radix-4 Modified

Booth Algorithm.

2010

29 An Efficient Architecture For 3-D Discrete Wavelet Transform.2010

30 Low Power ALU Design By Ancient Mathematics2010

31Design Of On-Chip Bus With OCP Interface

2010

32 An Efficient Architecture For 2-D Lifting-Based Discrete Wavelet Transform 2009

33 Multiplication Acceleration Through Twin Precision2009

34 Efficient FPGA Implementation Of Convolution2009

35 Implementation Of FFT/IFFT Blocks For OFDM2009

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