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  • B.Supmonchai June 10, 2006

    2102545 Digital IC 1

    Tutorial 3

    VLSI Design Methodology

    Boonchuay SupmonchaiJune 10th, 2006

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    Outlines VLSI Design Flow and Structural Design

    Principles

    VLSI Design Styles

    VLSI Design Strategies

    Computer-Aided Design Technology for VLSI

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    Simplified VLSI Design FlowsSystem Specification

    Functional (Architecture) Design

    Functional Verification

    Logic Design

    Logic Verification

    Circuit Design

    Circuit Verification

    Physical Design

    Physical Verification

    Front End Back EndSynthesis Phase Layout Phase

    BehavioralRepresentation

    Logic(Gate-Level)

    Representation

    CircuitRepresentation

    LayoutRepresentation

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    Four Levels of Design Representation

    BehavioralRepresentation

    Logic (Gate-Level)Representation

    Circuit (Transistor-Level) Representation

    Layout Representation

    Functional Blocks, FSM

    Logic Blocks, Gates

    Transistor Schematics

    Physical Devices

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    Structure Design Principles Hierarchy:

    Divide and conquer technique involves dividing a moduleinto sub-modules and then repeating this operation on the sub-modules until the complexity of the smaller parts becomesmanageable.

    Regularity: The hierarchical decomposition of a large system should result

    in not only simple, but also similar blocks, as much aspossible.

    Regularity usually reduces the number of different modulesthat need to be designed and verified, at all levels ofabstraction.

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    Example of Regularity

    These circuits are built using inverters and tri-state buffers only.

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    Structured Design Principles (Cont.) Modularity:

    The various functional blocks which make up the largersystem must have well-defined functions and interfaces.

    Modularity allows each block to be designed independently;All blocks can be combined with ease at the end of theprocess.

    Locality: Internal details remain at the local level.

    The concept of locality also ensures that connections aremostly between neighboring modules, avoiding long-distanceconnections as much as possible.

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    Example: 16-bit Adder Circuit

    Structural Hierarchy of a 16-bit Manchester Adder

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    Example (Cont.): Level 1

    16-bit AdderComplete Layout

    4-bit Adder with Manchester carry

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    Example (Cont.): Level 2

    4-bit Adder with Manchester Carry Layout

    Carry/propagate circuit Output buffer/latch

    Manchester Carry circuit

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    Example (Cont.): Level 3

    Carry/propagatecircuit layout

    Manchester carrycircuit layout

    Output buffer/latchcircuit layout

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    Outlines VLSI Design Flow and Structural Design

    Principles

    VLSI Design Styles

    VLSI Design Strategies

    Computer-Aided Design Technology for VLSI

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    VLSI Design Styles

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    Full-Custom Design Full-custom blocks are carefully crafted in the

    physical level to obtain the highest possibleperformance.

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    Full-Custom Design Key Issues The key to Full-custom design is to exploit the

    fine-grained regularity and modularity in thephysical level.

    Manual full-custom design can be verychallenging and time consuming, especially ifthe low level regularity is not well defined. Development cost are too high! Design reuse is becoming popular to reduce design

    cycle time and development cost. IP blocks Full-custom design is used only in the critical

    blocks.

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    Full-Custom DRAM Example

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    Cell-Based Design Lego Style Design

    All of the commonly used logic cells aredeveloped, characterized, and stored in astandard cell library. Library contains a certain numbers of basic cells

    such as inverters, NAND, NOR, each in severalversions to provide a range of performance. The inverter gate can have standard size, double size, and

    quadruple size.

    Most popular because of CAD tools availabilityand capability.

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    Cell-Based Design Key Issues Inclusion/Exclusion of a gate variation depends

    on the objectives of the library. Standard Library, Low Power Library, etc.

    Most challenging task is to how to place theindividual cells into rows and interconnect themin a way that meet stringent design goals. Most advanced CAD tools have place-and-route tools.

    In a complex, demanding design, standard-cellbased design approach may be used as a firstpass, then full-custom design where necessary.

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    Example of Standard Cells

    Each cell layout is designed with a fixed height so that a numberof cells can be snapped together side-by-side to form rows.

    Power Rail

    Ground Rail

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    Example of Stand Cells (Cont.)

    Standard Cell

    Routing Channel

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    Cell-Based Design Example

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    Masked Gate Array (MGA) Design

    Only transistorsNo contacts and metal layers

    One pattern mask forMass production

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    MGA Design Key Issues Uncommitted (Unused) transistors or gates are

    wasted. Performance measured as Chip Utilization Factor ~

    used chip area/total chip area.

    Uncommitted cells can be sacrifices to improveintercell routing capability

    Modern GAs use multiple metal layers forchannel routing Smaller area, higher density, and routability

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    Example of MGA Design

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    FPGA Design An FPGA chip provides thousands of logic

    gates, organized into logic blocks, withprogrammable interconnects.

    To implement a custom hardware, a user can usehigh-level hardware programming (e.g., HDL). Program logic table for each logic block. Program interconnect switch matrices Program I/O blocks

    Programs last as long as the chip is powered-on

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    Field Programmable Gate Array (FPGA)

    Architecture of Xilinx FPGAs

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    FPGA (Cont.)

    Simplified block diagram of a CLB by Xilinx2102545 Digital IC VLSI Design Methodology 28

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    FPGA (Cont.)

    Switch matrices and interconnection routing between CLB

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    FPGA Design Key Issues Chip utilization of an FPGA depends on

    Granularity of the logic block - Size of logic block Routing capability - Size of switch matrices

    The largest advantage of FPGA-based design isthe very short turn-around time

    The time required from the start of the designprocess until a functional chip is available

    Typical price of FPGA chips is usually higherthan other alternatives of the same design, butfor small-volume production and for fastprototyping

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    HDL-Based Design1980sHardware Description Languages (HDL) wereconceived to facilitate the information exchangebetween design groups.

    1990sThe increasing computation power led to theintroduction of logic synthesizers that can translatethe description in HDL into a synthesized gate-levelnet-list of the design.

    2000sModern synthesis algorithms can optimize a digitaldesign and explore different alternatives to identifythe design that best meets the requirements.

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    HDL-Based Design Methodology

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    Outlines VLSI Design Flow and Structural Design

    Principles

    VLSI Design Styles

    VLSI Design Strategies

    Computer-Aided Design Technology for VLSI

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    VLSI Design Strategies Ph