© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

A Capacitive Hybrid Flip-Chip ASIC and Sensor for Fingerprint, Navigation and Pointer Detection

Ovidiu Vermesan1, Knut H. Riisnæs2, Laurent Le-Pailleur3, Jon B. Nysæther2, Mark Bauge3, Helge Rustad1, Sigmund Clausen2, Lars-Cyril Blystad1, Hanne Grindvoll1, Rune Pedersen2, Robert Pezzani3, David Kaire3

1SINTEF, Norway2IDEX, Norway3ST Microelectronics, France

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Outline

� Introduction� Hybrid Sensor Architecture� Principle of Operation� Experimental Results� Summary

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Fingerprint Sensors

� Conventional fingerprint systems� Optical image sensors

� Direct-contact fingerprint sensors� Pressure, electro-optical, thermal

� Capacitive fingerprint sensors� Matrix/linear CMOS DC and AC-capacitive

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Solid State Fingerprint Sensors

� CMOS DC-capacitive� CMOS AC-capacitive� Thermal� Electro-optical� CMOS optical� Polysilicon thin film transistors� Polyresistive microbeams

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Hybrid Sensor Concept

� Hybrid technology� Silicon sensor substrate

� Flip-chip process

� CMOS ASIC

Plastic Cover

Flip-chip CMOS ASIC

Silicon Substrate

Motherboard

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Hybrid Sensor Concept

� Hybrid measurement method� Linear scanner detection

� AC-capacitive measurement

� Analog and digital processing

� Three in one functionality� Fingerprint capture

� Navigation function (xy movement)

� Pointer function (mouse function)

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Hybrid Sensor OperationPC

B

Con

nect

or

Gol

d W

ire

1. Inject 100kHz carrier

Sens

orA

sic

Metal Dielectric

Poly

Poly

Poly

Bump Bump Bump Bump

Finger

3. Recover envelope

2. Capacitive modulated carrier

4. Send pixels

5. Motherboard Pixels Processing6a. Authentication

6b. Navigation/Pointer

Software

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Hybrid Sensor Architecture

Metal Layer

Finger

C EI

Low Noise Phase Sensitive Amplifier

C FSElectrically Isolating Material Layer

C IN

C

R

Stimulation Generator

Stimulation Electrode Layer

Current/VoltageSelectable

Frequency, Amplitude, Phase

Reference

Calibration

AnalogProcessor

DigitalCore

Interface

Memory

Finger Movement

Frequency, Amplitude, Phase Control

I2CSPI

HostProcessor

Sensor CellImageSpeed

PointerNavigation

Activation CellActivationElectrode

PSACL

ADC

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Principle of Hybrid Sensor

� Hybrid technology� Silicon sensor substrate

� Flip-chip CMOS ASIC

Flip-chipCMOS ASIC

Silicon Substrate

Sensors

Bumps

Sensor pads with µvias

ImageSpeed

PointerNavigation

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Sensor Substrate Process

� Low cost passive silicon substrate� Micro-vias technology� Flip-chip process

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Principle of Operation

Sweep finger over the sensor

÷ ÷

÷

÷ ÷

÷ ÷

÷÷

÷÷

÷ ÷

÷ ÷

Finger ridges

Flip-chip CMOS ASIC

Finger valleys

SmartFinger®

Stimulation Electrode

Silicon Substrate

Bumps

Pads with µviasSensor Cell

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

New Pyramidal PS Multiplexing

AnalogFront

ControlModule

MUXIN MUXIN MUXIN MUXIN MUXIN

PSA

Stimulation Generator

Sensor Cells (M�N): Image Speed Pointer Navigation

Digital Module

Sample

N N N N

N

MUXOUT

ADC

StimulationElectrode

Finger ridgesFinger valleys

N

B bits Digital Output

Analog Module

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Hybrid Module Micrograph

Module Topside Module Backside

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Fingerprint Image Capture

� Software algorithms� Image adapted to each finger

� Image reconstruction to suppress skew error

� Calibration to correct process/gain/offset

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Fingerprint Image Results

� Reconstruction algorithm� Sweeping speed range 0-56.6 (1.8-14.4) cm/s

� Sweeping angle tolerance ±20 °

Before After Before After

Algorithm Algorithm

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Industrial Prototype Module

� Module performance� Sensor size (external area): 105 mm2

� Sensing area: 3.25 mm2

� ASIC size: 18 mm2

� Image resolution: 500dpi

� Supply: analog 2.5V, digital 1.5V

� ESD resistance: >15kV

� Temperature range: -20 to 70 °C

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Experimental Results

� Working sensor and IC on 1st trial� Prototype Design

� Proven functionalityauthentification and pointer

� Proven ergonomy

� Valid industrial concept

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Solid State Fingerprint Sensors

NTT Fujitsu Atmel STMBF300 FingerChipTM SmartFinger

Fingerprint image Yes Yes Yes YesNavigation function No No No YesPointer function No No Yes YesImage resolution (dpi) 508/500 500 500 500Technology 0.25µm CMOS 3M 0.5µm CMOS 0.8µm CMOS 0.25µm CMOS 5MSensing area (mm2) 143.36(11.2x12.8) 21.76 (12.8x1.7) 5.6 (0.4x14) 3.25 (0.25x13)Substrate area (mm2) - 60.2 (4.3x14) 239.4 (9x26.6) 105 (7x15)Silicon area (mm2) 225 (15x15) 29.9 (2.3x13) 29,41 (1.7x17.3) 18 (4x4.5)Measurement method DC capacitive

Array (224x256)DC capacitiveArray Sweep

(32x256)

ThermalArray Sweep

(8x280)

AC capacitiveLinear Sweep

(1x256)Power Supply 2.5V 3.3/5V 3/5.5V 2.5V Analog

1.5V Digital

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Summary

� The first:� Module that integrates three functions:

fingerprint, navigation and pointer detection.

� Hybrid solution (linear AC-capacitive fingerprint silicon sensor substrate, CMOS ASIC and flip-chip)

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Summary

� New:� Evolving biometric system

� Separate sensor and ASIC optimisation paths

� Design methodology and architecture

� Circuit concepts for the pyramidal multiplexing of the channels into a common analog bus

© 2003 IEEE International Solid-State Circuits Conference © 2003 IEEE

Summary

� Performance� The CMOS ASIC silicon area is 60% of the

smallest current designs.

� Hybrid technology optimised for low cost

� Highest level of integration published

� Targeted for secured mobile devices