Virtual Memory Topics Address spaces Motivations for virtual memory Address translation Accelerating...

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Virtual Memory Topics Address spaces Motivations for virtual memory Address translation Accelerating translation with TLBs

description

3 CMSC313-F’09 Simple Addressing Modes Normal(R)Mem[Reg[R]] Normal(R)Mem[Reg[R]] Register R specifies memory address movl (%ecx),%eax DisplacementD(R)Mem[Reg[R]+D] DisplacementD(R)Mem[Reg[R]+D] Register R specifies start of memory region Constant displacement D specifies offset movl 8(%ebp),%edx

Transcript of Virtual Memory Topics Address spaces Motivations for virtual memory Address translation Accelerating...

Page 1: Virtual Memory Topics Address spaces Motivations for virtual memory Address translation Accelerating translation with TLBs.

Virtual Memory

Topics Address spaces Motivations for virtual memory Address translation Accelerating translation with TLBs

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Programs Refer to Virtual Memory AddressesPrograms Refer to Virtual Memory Addresses Conceptually very large array of bytes Actually implemented with hierarchy of different memory types System provides address space private to particular “process”

Program being executed Program can clobber its own data, but not that of others

Compiler + Run-Time System Control AllocationCompiler + Run-Time System Control Allocation Where different program objects should be stored All allocation within single virtual address space

Byte-Oriented Memory Organization

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FF•••F

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Simple Addressing Modes NormalNormal (R)(R) Mem[Reg[R]]Mem[Reg[R]]

Register R specifies memory address

movl (%ecx),%eax

DisplacementDisplacement D(R)D(R) Mem[Reg[R]+D]Mem[Reg[R]+D] Register R specifies start of memory region Constant displacement D specifies offset

movl 8(%ebp),%edx

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How does everything fit?How does everything fit? 32-bit addresses: ~4,000,000,000 (4 billion) bytes 64-bit addresses: ~16,000,000,000,000,000,000 (16 quintillion) bytes

How to decide which memory to use in your program?How to decide which memory to use in your program?

What if another process stores data into your memory?What if another process stores data into your memory? How could you debug your program?

Lets think on this: physical memory?

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FF•••F

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So, we add a level of indirectionOne simple trick solves all three problemsOne simple trick solves all three problems

Each process gets its own private image of memory appears to be a full-sized private memory range

This fixes “how to choose” and “others shouldn’t mess w/yours” surprisingly, it also fixes “making everything fit”

Implementation: translate addresses transparently add a mapping function

to map private addresses to physical addresses do the mapping on every load or store

This mapping trick is the heart of This mapping trick is the heart of virtual memoryvirtual memory

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Address SpacesA A linear address space linear address space is an ordered set of contiguous is an ordered set of contiguous nonnegative integer addresses:nonnegative integer addresses:

{0, 1, 2, 3, … }{0, 1, 2, 3, … }

A A virtual address spacevirtual address space is a set of N = 2 is a set of N = 2nn virtual addressesvirtual addresses::

{0, 1, 2, …, N-1}{0, 1, 2, …, N-1}

A A physical address spacephysical address space is a set of M = 2 is a set of M = 2mm (for convenience) (for convenience) physical addressesphysical addresses::

{0, 1, 2, …, M-1}{0, 1, 2, …, M-1}

In a system based on virtual addressing, each byte of main In a system based on virtual addressing, each byte of main memory has a physical address memory has a physical address andand a virtual address (or more) a virtual address (or more)

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A System Using Physical Addressing

Used by many embedded microcontrollers in devices Used by many embedded microcontrollers in devices like cars, elevators, and digital picture frameslike cars, elevators, and digital picture frames

0:1:

M -1:

Main memory

CPU2:3:4:5:6:7:

Physical address

(PA)

4

Data word

8: ...

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A System Using Virtual Addressing

One of the great ideas in computer scienceOne of the great ideas in computer science used by all modern desktop and laptop microprocessors

...0:1:

M-1:

Main memory

CPU

2:3:4:5:6:7:

Virtualaddress

(VA)

4100

Data word

Physicaladdress

(PA)

4

CPU chip

MMU

Addresstranslation

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Why Virtual Memory?(1) VM allows efficient use of limited main memory (RAM)

Use RAM as a cache for the parts of a virtual address space some non-cached parts stored on disk some (unallocated) non-cached parts stored nowhere

Keep only active areas of virtual address space in memory transfer data back and forth as needed

(2) VM simplifies memory management for programmers Each process gets a full, private linear address space

(3) VM isolates address spaces One process can’t interfere with another’s memory

because they operate in different address spaces User process cannot access privileged information

different sections of address spaces have different permissions

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(1) VM as a Tool for CachingVirtual memory Virtual memory is an array of N contiguous bytesis an array of N contiguous bytes

think of the array as being stored on disk

The contents of the array on disk are cached in The contents of the array on disk are cached in physical memory (DRAM cache)physical memory (DRAM cache)

PP 2m-p-1

Physical memory

Empty

Empty

Uncached

VP 0VP 1

VP 2n-p-1

Virtual memory

Unallocated Cached

UncachedUnallocated

CachedUncached

PP 0PP 1

EmptyCached

0

N-1M-1

0

Virtual pages (VP's) stored on disk

Physical pages (PP's) cached in DRAM

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DRAM Cache OrganizationDRAM cache organization driven by the enormous DRAM cache organization driven by the enormous miss penaltymiss penalty DRAM is about 10x slower than SRAM Disk is about 100,000x slower than DRAM

to get first byte, though fast for next byte

DRAM cache propertiesDRAM cache properties Large page (block) size (typically 4-8 KB) Fully associative

Any virtual page can be placed in any physical page Requires a “large” mapping function – different from CPU caches

Highly sophisticated replacement algorithms Too complicated and open-ended to be implemented in hardware

Write-back rather than write-through

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Reminder: MMU checks the cache

One of the great ideas in computer scienceOne of the great ideas in computer science used by all modern desktop and laptop microprocessors

MMU

Physicaladdress

(PA)

...0:1:

M-1:

Main memory

Virtualaddress

(VA)CPU

2:3:4:5:6:7:

4100

Data word

4

CPU chip

Addresstranslation

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How? Page TablesA A page table page table is an array of page table entries (PTEs) is an array of page table entries (PTEs) that maps virtual pages to physical pagesthat maps virtual pages to physical pages Per-process kernel data structure in DRAM

null

null

Memory residentpage table(DRAM)

Physical memory(DRAM)

VP 7VP 4

Virtual memory(disk)

Valid01

010

10

1

Physical pagenumber or

disk addressPTE 0

PTE 7

PP 0VP 2VP 1

PP 3

VP 1

VP 2

VP 4

VP 6

VP 7

VP 3

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Address Translation with a Page Table

Virtual page number (VPN) Virtual page offset (VPO)

VIRTUAL ADDRESS

Physical page number (PPN)

PHYSICAL ADDRESS

0p–1pm–1

n–1 0p–1pPage table base register

(PTBR)

If valid=0then pagenot in memory(page fault)

Valid Physical page number (PPN)

The VPN acts as index into the page table

Pagetable

Physical page offset (PPO)

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Page HitsA A page hitpage hit is a reference to a VM word that is in is a reference to a VM word that is in physical (main) memoryphysical (main) memory

null

null

Memory residentpage table(DRAM)

Physical memory(DRAM)

VP 7VP 4

Virtual memory(disk)

Valid01

010

10

1

Physical pagenumber or

disk addressPTE 0

PTE 7

PP 0VP 2VP 1

PP 3

VP 1

VP 2

VP 4

VP 6

VP 7

Virtual address

VP 3

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Page FaultsA A page faultpage fault is caused by a reference to a VM word that is not in is caused by a reference to a VM word that is not in physical (main) memoryphysical (main) memory Example: An instruction references a word contained in VP 3, a miss

that triggers a page fault exception

null

null

Memory residentpage table(DRAM)

Physical memory(DRAM)

VP 7VP 4

Virtual memory(disk)

Valid01

010

10

1

Physical pagenumber or

disk addressPTE 0

PTE 7

PP 0VP 2VP 1

PP 3

VP 1

VP 2

VP 4

VP 6

VP 7

Virtual address

VP 3

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Handling a Page Fault

null

null

Memory residentpage table(DRAM)

Physical memory(DRAM)

VP 7VP 3

Virtual memory(disk)

Valid01

100

10

1

Physical pagenumber or

disk addressPTE 0

PTE 7

PP 0VP 2VP 1

PP 3

VP 1

VP 2

VP 4

VP 6

VP 7

Virtual address

VP 3

The kernel’s page fault handler selects VP 4 as the victim and replaces it with a copy of VP 3 from disk (demand paging) When the offending instruction restarts, it executes normally, without

generating an exception

..

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Why does it work? LocalityVirtual memory works because of localityVirtual memory works because of locality

At any point in time, programs tend to access a set of At any point in time, programs tend to access a set of active virtual pages called the active virtual pages called the working setworking set Programs with better temporal locality will have smaller working sets

If (working set size < main memory size) If (working set size < main memory size) Good performance for one process after compulsory misses

If ( SUM(working set sizes) > main memory size ) If ( SUM(working set sizes) > main memory size ) Thrashing: Performance meltdown where pages are swapped (copied) in and out continuously

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(2) VM as a Tool for Memory MgmtKey idea: each process has its own virtual address space

It can view memory as a simple linear array Mapping function scatters addresses through physical memory

Well chosen mappings simplify memory allocation and management

Virtual Address Space for Process 1:

Physical Address Space (DRAM)

VP 1VP 2

PP 2Address Translation0

0

N-1

0

N-1 M-1

VP 1VP 2

PP 7

PP 10

(e.g., read-only library code)

...

...

Virtual Address Space for Process 2:

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Simplifying Sharing and AllocationMemory allocation

Each virtual page can be mapped to any physical page A virtual page can be stored in different physical pages at different

times – the program never knows

Sharing code and data among processes Map virtual pages to the same physical page (PP 7)

Virtual Address Space for Process 1:

Physical Address Space (DRAM)

VP 1VP 2

PP 2Address Translation0

0

N-1

0

N-1 M-1

VP 1VP 2

PP 7

PP 10

(e.g., read-only library code)

...

...

Virtual Address Space for Process 2:

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IA32 Linux Memory LayoutStackStack

Runtime stack (8MB limit)HeapHeap

Dynamically allocated storage When call malloc(), calloc(), new()

DataData Statically allocated data E.g., arrays & strings declared in code

TextText Executable machine instructions Read-only

Upper 2 hex digits of address

FF

00

Stack

TextDataHeap

08From class08.ppt

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Simplifying Linking and LoadingKernel virtual memory

Memory mapped region forshared libraries

Run-time heap(created at runtime by malloc)

User stack(created at runtime)

Unused0

%esp (stack ptr)

Memoryinvisible touser code

brk

0xc0000000

0x08048000

0x40000000

Read/write segment(.data, .bss)

Read-only segment(.init, .text, .rodata)

Loaded fromexecutable file

Linking Each program has similar

virtual address space Code, stack, and shared

libraries always start at the same address

Loading execve() maps PTEs to the

appropriate location in the executable binary file

The .text and .data sections are copied, page by page, on demand by the virtual memory system.

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(3)VM as a Tool for Memory ProtectionExtend PTEs with permission bitsExtend PTEs with permission bitsPage fault handler checks these before remappingPage fault handler checks these before remapping

If violated, send process SIGSEGV (segmentation fault)Page tables with permission bits

Process i:

AddressREAD WRITEPP 6Yes NoPP 4Yes YesPP 2Yes

VP 0:VP 1:VP 2:

•••

Process j:

PP 0

Physical memory

Yes

•••

PP 4

PP 6

PP 9

SUPNoNoYes

AddressREAD WRITEPP 9Yes NoPP 6Yes YesPP 11Yes Yes

SUPNoYesNo

VP 0:VP 1:VP 2:

PP 2

PP 11

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SummaryProgrammer’s View of Virtual Memory

Each process has its own private linear address space Cannot be corrupted by other processes

System View of Virtual Memory Uses memory efficiently by caching virtual memory pages

Efficient only because of locality Simplifies memory management and programming Simplifies protection by providing a convenient interpositioning point to check permissions