CD Summit 2015: Minter Ellison Rudd Watts Lawyers partner Dr Ross Patterson
Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.
-
date post
19-Dec-2015 -
Category
Documents
-
view
213 -
download
0
Transcript of Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.
![Page 1: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/1.jpg)
Virtual Memory
Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley
![Page 2: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/2.jpg)
View of Memory HierarchiesRegs
L2 Cache
Memory
Disk
Tape
Instr. Operands
Blocks
Pages
Files
Upper Level
Lower Level
Faster
Larger
CacheBlocks
Thus far{{Next:
VirtualMemory
![Page 3: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/3.jpg)
Memory Hierarchy: Some Facts
CPU Registers100s Bytes<10s ns
CacheK Bytes10-100 ns$.01-.001/bit
Main MemoryM Bytes100ns-1us$.01-.001
DiskG Bytesms10 - 10 cents-3 -4
CapacityAccess TimeCost
Tapeinfinitesec-min10-6
Registers
Cache
Memory
Disk
Tape
Instr. Operands
Blocks
Pages
Files
StagingXfer Unit
prog./compiler1-8 bytes
cache cntl8-128 bytes
OS512-4K bytes
user/operatorMbytes
Upper Level
Lower Level
faster
Larger
![Page 4: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/4.jpg)
Virtual Memory: Motivation
• If Principle of Locality allows caches to offer (usually) speed of cache memory with size of DRAM memory,then recursively why not use at next level to give speed of DRAM memory, size of Disk memory?
• Treat Memory as “cache” for Disk !!!
![Page 5: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/5.jpg)
• Share memory between multiple processes but still provide protection – don’t let one program read/write memory of another
• Address space – give each program the illusion that it has its own private memory– Suppose code starts at addr 0x40000000. But
different processes have different code, both at the same address! So each program has a different view of memory
![Page 6: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/6.jpg)
Advantages of Virtual Memory• Translation:
– Program can be given consistent view of memory, even though physical memory is scrambled
– Makes multithreading reasonable (now used a lot!)– Only the most important part of program (“Working Set”) must be in
physical memory.– Contiguous structures (like stacks) use only as much physical memory as
necessary yet still grow later.• Protection:
– Different threads (or processes) protected from each other.– Different pages can be given special behavior
• (Read Only, Invisible to user programs, etc).– Kernel data protected from User programs– Very important for protection from malicious programs
=> Far more “viruses” under Microsoft Windows• Sharing:
– Can map same physical page to multiple users(“Shared memory”)
![Page 7: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/7.jpg)
Virtual to Physical Address Translation
• Each program operates in its own virtual address space; ~only program running
• Each is protected from the other
• OS can decide where each goes in memory
• Hardware (HW) provides virtual -> physical mapping
virtualaddress(inst. fetchload, store)
Programoperates inits virtualaddressspace
HWmapping
physicaladdress(inst. fetchload, store)
Physicalmemory(incl. caches)
![Page 8: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/8.jpg)
Mapping Virtual Memory to Physical Memory
0
Physical Memory
Code
Static
Heap
Stack
64 MB
• Divide into equal sizedchunks (about 4KB)
0
• Any chunk of Virtual Memory assigned to any chuck of Physical Memory (“page”)
![Page 9: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/9.jpg)
Paging Organization (eg: 1KB Page)
AddrTransMAP
Page is unit of mapping
Page also unit of transfer from disk to physical memory
page 0 1K1K
1K
01024
31744
Virtual Memory
VirtualAddress
page 1
page 31
1K2048 page 2
...... ...
page 001024
7168
PhysicalAddress
PhysicalMemory
1K1K
1K
page 1
page 7...... ...
![Page 10: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/10.jpg)
Virtual Memory MappingVirtual Address:
page no. offset
Page TableBase Reg
Page Table located in physical memory
(actually, concatenation)
indexintopagetable
+
PhysicalMemoryAddress
Page Table
Val-id
AccessRights
PhysicalPageAddress
.
V A.R. P. P. A.
...
...
![Page 11: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/11.jpg)
Issues in VM Design
What is the size of information blocks that are transferred from secondary to main storage (M)? page size(Contrast with physical block size on disk, I.e. sector size)
Which region of M is to hold the new block placement policy
How do we find a page when we look for it? block identification
Block of information brought into M, and M is full, then some region of M must be released to make room for the new block replacement policy
What do we do on a write? write policy
Missing item fetched from secondary memory only on the occurrence of a fault demand load policy
pages
reg
cachemem disk
frame
![Page 12: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/12.jpg)
Virtual Memory Problem # 1• Map every address 1 extra memory
accesses for every memory access
• Observation: since locality in pages of data, must be locality in virtual addresses of those pages
• Why not use a cache of virtual to physical address translations to make translation fast? (small is fast)
• For historical reasons, cache is called a Translation Lookaside Buffer, or TLB
![Page 13: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/13.jpg)
Memory Organization with TLB
•TLBs usually small, typically 128 - 256 entries
• Like any other cache, the TLB can be fully associative, set associative, or direct mapped
ProcessorTLB
LookupCache
MainMemory
VA PA miss
hit
data
Trans-lation
hit
miss
![Page 14: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/14.jpg)
Typical TLB Format
Virtual Physical Dirty Ref Valid AccessAddress Address Rights
• TLB just a cache on the page table mappings
• TLB access time comparable to cache (much less than main memory access time) • Ref: Used to help calculate LRU on replacement• Dirty: since use write back, need to know whether or not to write page to disk when replaced
![Page 15: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/15.jpg)
What if not in TLB
• Option 1: Hardware checks page table and loads new Page Table Entry into TLB
• Option 2: Hardware traps to OS, up to OS to decide what to do
• MIPS follows Option 2: Hardware knows nothing about page table format
![Page 16: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/16.jpg)
TLB Miss
• If the address is not in the TLB, MIPS traps to the operating system
• The operating system knows which program caused the TLB fault, page fault, and knows what the virtual address desired was requested
2 91
valid virtual physical
![Page 17: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/17.jpg)
TLB Miss: If data is in Memory
• We simply add the entry to the TLB, evicting an old entry from the TLB
7 3212 91
valid virtual physical
![Page 18: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/18.jpg)
What if data is on disk ?
• We load the page off the disk into a free block of memory, using a DMA transfer– Meantime we switch to some other process
waiting to be run
• When the DMA is complete, we get an interrupt and update the process's page table– So when we switch back to the task, the desired
data will be in memory
![Page 19: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/19.jpg)
What if the memory is full ?
• We load the page off the disk into a least recently used block of memory, using a DMA transfer– Meantime we switch to some other process
waiting to be run
• When the DMA is complete, we get an interrupt and update the process's page table– So when we switch back to the task, the desired
data will be in memory
![Page 20: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/20.jpg)
Virtual Memory Problem # 2
• Page Table too big!– 4GB Virtual Memory ÷ 4 KB page
~ 1 million Page Table Entries 4 MB just for Page Table for 1 process, 25 processes 100 MB for Page Tables!
• Variety of solutions to tradeoff memory size of mapping function for slower when miss TLB– Make TLB large enough, highly associative so
rarely miss on address translation
![Page 21: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/21.jpg)
Two Level Page Tables
0
Physical Memory64
MB
Virtual Memory
Code
Static
Heap
Stack
0
...
2nd LevelPage Tables
SuperPageTable
![Page 22: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/22.jpg)
Summary
• Apply Principle of Locality Recursively
• Reduce Miss Penalty? add a (L2) cache
• Manage memory to disk? Treat as cache– Included protection as bonus, now critical– Use Page Table of mappings
vs. tag/data in cache
• Virtual memory to Physical Memory Translation too slow? – Add a cache of Virtual to Physical Address
Translations, called a TLB
![Page 23: Virtual Memory Adapted from lecture notes of Dr. Patterson and Dr. Kubiatowicz of UC Berkeley.](https://reader030.fdocuments.us/reader030/viewer/2022032800/56649d355503460f94a0d283/html5/thumbnails/23.jpg)
Summary• Virtual Memory allows protected sharing of memory between processes with less swapping to disk, less fragmentation than always swap or base/bound
• Spatial Locality means Working Set of Pages is all that must be in memory for process to run fairly well
• TLB to reduce performance cost of VM
• Need more compact representation to reduce memory size cost of simple 1-level page table (especially 32- 64-bit address)