Versatile modular electronics for rapid design and development

V e r s a t i l e M o d u l a r E l e c t r o n i c s F o r R a p i d D e s i g n A n dD e v e l o p m e n t o f

H U M A N O I D R O B O T I C S U B S Y S T E M S

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By Gokul G [email protected]

1. INTRODUCTION2. CURRENT SCENARIO IN HUMANOID DEVELOPMENT

3. REQUIREMENTS FOR COMPACT HUMANOID ELECTRICAL SYSTEM

4. DEVELOPMENT PATH TO MEET THE REQUIREMENTS

5. WHAT IS FPGA……….?6. WHY FPGA……?7. SYSTEM OVERVIEW

1) FPGA MODULE

2) CONTROL BOARDS

3) CENTRAL CONTROLLER

4) COMMUNICATION

8. DISCUSSIONS AND EXPERIMENTAL RESULTS 9. CONCLUSION10. REFERENCES

V E R S A T I L E M O D U L A R E L E C T R O N I C S F O R R A P I D D E S I G N A N D D E V E L O P M E N T O F H U M A N O I D R O B O T I C S U B S Y S T E M S

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Humanoid robot- Robot with its body shape built to resemble that of a human

Generally humanoids have a torso, a head , 2 arms & 2 legs

Though some may model only part of a body E.g.: From the waist up

Development is a complex procedure • Numerous subsystems needs to be

combined for actuation • Subsystems - electric motors, hydraulic

valves , sophisticated sensors etc.

AIMSimplification of development and up gradation of these

humanoids by the use of Modular ElectronicComponents (FPGA)


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I N H U M A N O I D D E V E L O P M E N T

Low level controllers distributed across the humanoid system- Results in reduction of cables & increased compactness

How to handle with minimal latency, the vast quantity of information that needs to be communicated to the central processing unit, while also ensuring a fully operational system at the same time?

H i g h P r i o r i t y C o m p a c t n e s s

Humanoid system developers placed high priority on compactness

Results in reduction of overall system’s size and weight

Main challenge is to “reduce the amount of electrical cables running from the actuators and sensors to a centralised controller”

D i s t r i b u t e d A p p r o a c h


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R E Q U I R E M E N T SCOMPACT HUMANOID ELECTRICAL SYSTEM

Distributed controllers capable of interfacing with all sensors and actuators on a single limb

Compact electrical design for minimizing size and weight

Capability of high frequency, hard real time control loops

High speed, low latency intercommunication between limbs

Clear development pat


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DEVELOPMENT PATHT O M E E T T H E R E Q U I R E M E N T S

selection of the embedded processor and its complimentary specialist components

Essentially allow us to “plan ahead” for future changes

Accommodate the increasing processing load of humanoids.

DSP FPGA PIC ARM

Architectures under consideration


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WHAT IS FPGA……….?

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing hence “field-programmable”

Contain programmable logic components called "logic blocks", and interconnects.

FPGA chips handle dense logic and memory elements offering very high logic capacity

Can be configurable without change their hardware

Vendors: Xilinx, Altera, Actel

FPGA products:- Xilinx Virtex-7 FPGA, Spartan-6 LXT FPGA & Stratix V from Altera


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WHY FPGA……?

Performance

Time to Market

Cost

Reliability

Long-Term Maintenance

Size comparison of the Spartan 6 USB-FPGA Module .Heat sinks are delivered with the LX45


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SYSTEM OVERVIEW Heart of system is a distributed network of FPGA modules.

Every limp has a FPGA module and which are networked

together in a star formation..

Star network has a “Central controller” in the center Which is

a combination of FPGA and duo core ARM processors.

ARM processors are running FreeRTOS which is a real-time OS

on one core, that takes care of the low level control and

Ubuntu on the second core.

An Ethernet connection from the central controller to the

High-Level PCs where all the cognitive processing is computed.


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FPGA MODULE

FPGA module is based around an Xilinx Sparten 6 FPGA currently consists of:

• Xilinx Spartan-6 LX45 FPGA. • 6 axis IMU, MPU-6050. • 8 Channel ADC, ADS8332. • 2 x Full-duplex 200 Mb/s interconnection. • 128Mb SPI Flash. • 70 I/O, User configurable. • 17 programmable LEDs • Size: 35mm x 35mm.• Weight: 8g

Version 2.0 of the FPGA Module


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2) CONTROL BOARDS Each limb has its own electrical

requirements due to different actuators and sensors.

Thus each limb has a custom control board.

1) Low Amp BLDC controller. control a 3 DoF neck, which had a brushless

motor which communicated via hall effect sensors and a digital encoder in each joint

2) Brushed Motor Driver. very simple 2 layer board developed for

controlling a pair of eyes with 2 DoF each.

3) High Current BLDC Controller. developed for the thigh, which has high power

requirements interface with the frameless motors that have

their own magnetic encoders. interface with the foil strange gauges used to

measure the torque at the joint


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3) CENTRAL CONTROLLER

Central hard real-time controller based on a Xilinx Zynq-XC7Z020

An FPGA and dual core ARM “A9 MP Core” processor running at 667MHz on a single chip.

Includes 512MB of DDR3 RAM, Gigabit Ethernet, USB and an SD card reader.

Central hard real-time controller based on a Xilinx Zynq-XC7Z020

The central controller has 6 high speed communication ports as well as interfaces for a range of sensors

The FPGA fabric is used primarily for the communication to the other FPGA modules e.g. acting like an intelligent hub.


CENTRAL CONTROLLER CONTINUES

The ARM processors is configured in an asymmetric multi-processing (AMP) configuration, with two separate OS running on each core

Overview of central controller hardwareFIRST CORE

For hard real time control loop

This loop used for scheduling the network communication as well as the low level control (Requires

a fast update) and hard real time. {E.g. the walking and balancing controller. }

Runs RealRTOS, an open source real time operating system.

SECOND CORE

Runs UBUNTU and Robot Operating System (ROS)

Used for the soft real time code{E.g. the path planning or human robot interaction. }

Has a Gigabit Ethernet connector to communicate to the High-level PCs


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4) COMMUNICATION

Each FPGA module has two ways to communicate.

1. Simple Ethernet controller

Based on 10Mb/s 10BASE-T communication and UDP packets.

Primarily used for debugging and to use the boards in a stand alone

situation.

2. High speed intercommunication

FPGA fabric of central controller – Master & all FPGA modules - Slaves

To chain the boards together and to connect them to the central controller

EtherCAT, Powelink… ( High electronic complexity) @ 100Mb/s

Direct pin–pin connection @1.05Gb/s-28.05Gb/s


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DISCUSSIONS AND EXPERIMENTAL RESULTS

A) HIGH PERFORMANCE MOTOR CONTROL

Figure shows a torque controlled humanoid robot test platform

To verify the performance of the High Current BLDC Controller

Controls two high power PMSM motors(580 Watts) from RoboDrive

controller computed the desired current

Low level motor controller produce the correct waveform by using space vector modulation (SVM)

Space vector modulation (SVM) is an algorithm for the control of pulse width modulation (PWM).


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B) Six DOFs Stereo Vision System

High speed vision tracking system

6 degrees of freedom 2 pan + 2 tilt + 2 torsion.

Each eye is controlled by 3 piezo motors, to

control their position and velocity

FPGA module receives desired angles alpha,

beta and gamma for each eye from the

central controller

Angles are then converted into desired motor

positions and velocity using a Soft Core at

1khz


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C) Network

A setup for testing and debugging the High speed communication

Test for integrity

send frames from the central controller to FPGA modules

Frame travels around the network and returned to the central controller

The central controller then checks the data processed and that it does not have any errors, as well as validates the returned data.

Test for latency

The time it takes to send a frame from the central controller around the 3 modules with 150 bytes to each module and back.


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CONCLUSION

FPGA module to fulfill the requirements to support the construction of humanoid

robots

Only design the FPGA once and then using it on different boards

On upgrading we only had to reconfigure the FPGA to communicate with the new

device

Using FPGA,

1)High demanding control can be accomplished for the main humanoid limbs;

2)Multiple DoF can be controlled in parallel with a single FPGA module;

3)We can achieve high speed, low latency intercommunications for a network

of modules.


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REFERENCES1. K. Hirai, M. Hirose, Y. Haikawa, and T. Takenaka, “The Development of Honda Humanoid Robot,” in Proceedings of

the 1998 IEEE International Conference on Robotics and Automation, Leuven, Belgium, May 1998, pp. 1321–1326.

2. A. Nagakubo, Y. Kuniyoshi, and G. Cheng, “Development of a High- Performance Upper-Body Humanoid System,” Advanced Robotics, vol. 17, no. 2, pp. 149–164, 2003.

3. N. Kanehira, T. Kawasaki, S. Ohta, T. Isozumi, T. Kawada, F. Kanehiro, S. Kajita, and K. Kaneko, “Design and Experiments of Advanced Leg Module ( HRP-2L ) for Humanoid Robot ( HRP-2 ) Development,” Magnesium, vol. 2, no. October, pp. 2455–2460, 2002.

4. T. Asfour, K. Regenstein, P. Azad, J. Schroder, A. Bierbaum,N. Vahrenkamp, and R. Dillmann, ARMAR-III: An Integrated Humanoid Platform for Sensory-Motor Control. IEEE, Dec. 2006

5. G. Cheng, S. Hyon, J. Morimoto, A. Ude, J. G. Hale, G. Colvin, W. Scroggin, and S. C. Jacobsen, “CB: A Humanoid Research Platform for Exploring NeuroScience,” Advanced Robotics, vol. 21, no. 10, pp. 1097–1114, 2007

6. F. Kanehiro, Y. Ishiwata, H. Saito, K. Akachi, G. Miyamori, T. Isozumi, K. Kaneko, and H. Hirukawa, Distributed Control System of Humanoid Robots based on Real-time Ethernet. IEEE, Oct. 2006

7. Z. Wen-Hong, “FPGA-based adaptive friction compensation for precision control of harmonic drivers,” Robotics and Automation (ICRA), 2010 IEEE International Conference on, pp. 4657–4662, 2010.

8. N. Ito, J. Urata, Y. Nakanishi, K. Okada, and M. Inaba, Development of very small high output motor driver forealizing forceful musculoskeletal humanoids. IEEE, Dec. 2010.

9. R. Hartenstein, M. Serv´ıt, A. Dollas, B. Ward, and J. Babcock, “FPGA based low cost Generic Reusable Module for the rapid prototyping of subsystems - Field-Programmable Logic Architectures, Synthesis and Applications - Lecture Notes in Computer Science,” pp. 259–270–270,1994.

10. S. Falsig and A. Soerensen, “An fpga based approach to increased flexibility, modularity and integration of low level control in robotics research,” in Intelligent Robots and Systems (IROS), 2010 IEEE/RSJ International Conference on, oct. 2010, pp. 6119 –6124.


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Versatile modular electronics for rapid design and development

Engineering

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