Verification work 20.03.14 Arild Velure. Goals As only part of the final functionality has been...
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Transcript of Verification work 20.03.14 Arild Velure. Goals As only part of the final functionality has been...
Verification work
20.03.14 Arild Velure
Goals
• As only part of the final functionality has been implemented for this MPW1, the focus for the testing has been to verify the basic functionality of the digital part to see that it is not malfunctioning or hampering the testing of the analog part.
• A top-down approach has thus been utilized
SAMPA
Testbench overview
AMS
RND
sysC
Physics
DDL*
Buffer ++ filter models
Select & compare
Config
*2010 TPC ALTRO data
Test seq.
CH*10 4*serial out
Instruction serial I/O
Finished
Partly finished
Not started
SAMPA verilog code
Default MPW1 configuration
• Pre trigger / Trigger delay = 0• BC1 = data in – fixed pedestal
– Fixed pedestal = 0 -> BC1 disabled• Tail cancelation filter = disabled
– Coeffecients = 0• BC2 moving average = enabled
– pre/post samples = 7 (max)• Time window = 1021 samples• Trigger mode = Continous• Number of serial out = all• Zero supression threshold = 10
Verification work completedpre+post layout + timing
• Data+header verification of serial output data vs realistic/random input data– All channels inn and out simultaneously– Default configuration with BC2 disabled– Continous and triggered mode– Ran for 20 timewindows ~2sec
• Instruction serial interface– Write random data, receive acknowledge of same data– Read back of same data
• Mux output verification
Work remaining
• Verifying filters• Verify buffer sizes– Not needed for MPW1 as long as we run serial out
at more than 10 times ADC speed– We have 2 master students currently working on
making the simulation• Adding analogue and ADC model
Test overview
Test Toggle/set pin Specific setup Result Verified by Completed CommentSync Bxcounter sync Reset Bxcounter Check header serial out NO
trigger in trigger mode trg Trigger mode Device is triggered data in vs data out YEStrigger in continous mode trg Continous mode No change in data, early trigger bit set data in vs data out YESSet chip address hadd Chip address used Check header serial out YESChoose between ADCdin0 and MPW1_dinOUTSIDE MPW1_selectIn 0 selects ADCdin0, 1 selects MPW1_dinOUTSIDE data in vs data out YESData in, 1 serial out MPW1_numSerialOut MPW1_numSerialOut = 01 Correct data and at correct serial out data in vs data out + header YESData in, 2 serial out MPW1_numSerialOut MPW1_numSerialOut = 02 Correct data and at correct serial out data in vs data out + header YESData in, 4 serial out MPW1_numSerialOut MPW1_numSerialOut = 03 Correct data and at correct serial out data in vs data out + header YESMux out, BC1 MPW1_selectOut MPW1_selectOut = 000 ADCdin0/MPW1_dinOUTSIDE data from output of BC1 data in vs data out YESMux out, TCFU MPW1_selectOut MPW1_selectOut = 001 ADCdin0/MPW1_dinOUTSIDE data from output of TCFU data in vs data out YESMux out, BC2 MPW1_selectOut MPW1_selectOut = 010 ADCdin0/MPW1_dinOUTSIDE data from output of BC2 data in vs data out YESMux out, ZSU MPW1_selectOut MPW1_selectOut = 011 ADCdin0/MPW1_dinOUTSIDE data from output of ZSU data in vs data out YESMux out, ADCdin0 MPW1_selectOut MPW1_selectOut = 100 ADCdin0 data data in vs data out YESMux out, din8 MPW1_selectOut MPW1_selectOut = 101 Din8 data data in vs data out YESMux out, din16 MPW1_selectOut MPW1_selectOut = 110 Din16 data data in vs data out YES
enable/disable BC1 filter MPW1_enBC1 Set FPD to specific value data out = data in - FPD when 1 else dataout=datain data in vs data out NO
Filter not implemented in TB
enable/disable TCFU filter MPW1_enTCFU enable TCFU Correct data data in vs data out NO
Filter not implemented in TB
enable/disable BC2 filter MPW1_enBC2 data out = data in - average when 1 else dataout=datain data in vs data out NO
Filter not implemented in TB
enable/disable ZSU filter MPW1_enZSU Set ZSU threshold Correct data recovered data in vs data out NO
Filter not implemented in TB
Notes
• As the data formating was not updated, there are 3 samples that are not recorded at end of each timewindow
• SAMPA code has been lint’ed to discover and remove many bugs
TB code
• https://svnweb.cern.ch/cern/wsvn/SAMPA• https://svn.cern.ch/reps/SAMPA