Using Silicon Photonics to Address Tradeoffs of Cost, Power, Speed & Complexity
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Transcript of Using Silicon Photonics to Address Tradeoffs of Cost, Power, Speed & Complexity
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Using silicon photonics to address the tradeoffs of cost, power, speed, and
complexity
Arlon [email protected]
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Constraint: How do we fit 100G in QSFP?
• QSFP is the most popular 4-channel form factor• Enables 36 ports in a 1ru switch• Physical size requires intensive optical integration• Max power consumption of 3.5W• Must support reaches of >2 km
Mellanox SX6036 – Example of 36 QSFP Ports Switch
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Examples of silicon photonics Tx and Rx chips
Integration: 100 Gb/s Tx and Rx chipsSimple FTTH style laserSingle laser for 4 channelsIntegrated modulators and detectors Ge PDs
Lasers
Modulators
Splitter
Santa Clara, CA USAOctober 2013
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Silicon photonics cost tradeoffs
√ Use CMOS where ever possible√ No WDM specific lasers, no laser sub-assembly (no
isolators, beam collimators, lens cap, etc.)√ Flip-chip laser array bonding√ No hermetic packages√ No active laser alignment√ No detector sub assembly√ No TEC√ No WDM assembly√ Die attach driver array√ Die attach TIA array
4Santa Clara, CA USAOctober 2013
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Silicon photonics enables 100G in QSFP
• Implements the best tradeoffs for data center applications
• Fits in standard QSFP • Supports reaches of > 2km• Consumes < 3.5W of power• Incorporates a host of low-cost techniques