User's Manual - OLIMEX
26
LPC2478-STK and LPC2478-STK-MICTOR development boards User's Manual Document revision C, October 2012 Copyright(c) 2009, OLIMEX Ltd, All rights reserved Page 1
Transcript of User's Manual - OLIMEX
LPC2478-STK and LPC2478-STK-MICTOR development boards
User's Manual
Document revision C, October 2012Copyright(c) 2009, OLIMEX Ltd, All rights reserved
Page 1
INTRODUCTION:
LPC-2478STK is a starter kit which uses MCU LPC2478 from NXP. This powerful MCU supports various serial interfaces such as USB host, USB device, UART, CAN, etc. Additionally, you will find also audio input and output as well as MP3 decoder, digital accelerometer, JTAG, Ethernet, touchscreen TFT display and SD/MMC card connector on this board. All this along with the ARM7TDMI-S™ architecture and uC Linux allow you to build a diversity of powerful applications to be used in a wide range of situations.
BOARD FEATURES:
− MCU: LPC2478− LCD 3.5'' 320x 240 24bit color TFT with backlight and touchscreen − MP3 decoder DSP + codec VS1002D− 3-axis digital accelerometer with 11-bit accuracy − 64 MB SDRAM− USB host connector − USB device connector − IrDA transceiver (optional)− MICTOR Trace connector (optional)− PS2 keyboard connector − 100Mbit Ethernet− CAN driver and connector − RS232 with ICSP control − SD/MMC card connector − JTAG connector− Reset button and circuit− 2 buttons− 1 trim pot− UEXT connector− Audio IN− Audio OUT− RTC battery− FR-4, 1.5 mm, red soldermask, component print− Dimensions: 134.6x101.5mm (5.3x4.0'')
ELECTROSTATIC WARNING:
The LPC-2478STK board is shipped in protective anti-static packaging. The board must not be subject to high electrostatic potentials. General practice for working with static sensitive devices should be applied when working with this board.
BOARD USE REQUIREMENTS:
Cables: You will need different cables depending on the used programming/debugging tool. If you use Olimex's ARM-JTAG, you will need a LPT cable. If you use ARM-USB-OCD or ARM-USB-TINY, you will need USB A-B cable. If you use a software
Page 2
programmer such as FlashMagic, you may need RS232 or other cables.
Hardware: Programmer/Debugger – ARM-JTAG, ARM-USB-TINY or ARM-USB-OCD or other compatible programming/debugging tool.
Software: The board comes pre-loaded with Uboot and the CD contains ucLinux image you can copy to USB flash disk and boot. You can use GCC or other commercial ARM compiler if you want to develop without ucLinux RTOS.
PROCESSOR FEATURES:
LPC-2478STK board use MCU LPC2478 from NXP with these features:
ARM7TDMI-S processor, running at up to 72 MHz.
512 kB on-chip flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capabilities. Flash program memory is on the ARM local bus for high performance CPU access.
98 kB on-chip SRAM includes:
- 64 kB of SRAM on the ARM local bus for high performance CPU access.
- 16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.
- 16 kB SRAM for general purpose DMA use also accessible by the USB.
- 2 kB SRAM data storage powered from the RTC power domain.
LCD controller, supporting both Super-Twisted Nematic (STN) and Thin-Film Transistors (TFT) displays.
- Dedicated DMA controller.
- Selectable display resolution (up to 1024 × 768 pixels).
- Supports up to 24-bit true-color mode.
Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention.
EMC provides support for asynchronous static memory devices such as RAM, ROM and flash, as well as dynamic memories such as Single Data Rate SDRAM.
Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.
General Purpose AHB DMA controller (GPDMA) that can be used with and SD/MMC interface as well as for memory-to-memory transfers.
Serial Interfaces:
- Ethernet MAC with MII/RMII interface and associated DMA controller. These functions reside on an independent AHB.
Page 3
- USB 2.0 full-speed dual-port device/host/OTG controller with on-chip PHY and associated DMA controller.
- Four UARTs with fractional baud rate generation, one with modem control I/O, one with IrDA support, all with FIFO.
- CAN controller with two channels.
- SPI controller.
- Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate for the SPI port, sharing its interrupt. SSPs can be used with the GPDMA controller.
- Three I2C-bus interfaces (one with open-drain and two with standard port pins).
- I2S (Inter-IC Sound) interface for digital audio input or output. It can be used with the GPDMA.
Other peripherals:
- SD/MMC memory card interface.
- 160 General purpose I/O pins with configurable pull-up/down resistors.
- 10-bit ADC with input multiplexing among 8 pins.
- 10-bit DAC.
- Four general purpose timers/counters with 8 capture inputs and 10 compare outputs. Each timer block has an external count input.
- Two PWM/timer blocks with support for three-phase motor control. Each PWM has an external count inputs.
- Real-Time Clock (RTC) with separate power domain. Clock source can be the RTC oscillator or the APB clock.
- 2 kB SRAM powered from the RTC power pin, allowing data to be stored when the rest of the chip is powered off.
- WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator, the RTC oscillator, or the APB clock.
Single 3.3 V power supply (3.0 V to 3.6 V).
4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as the system clock.
Three reduced power modes: idle, sleep, and power-down.
Four external interrupt inputs configurable as edge/level sensitive. All pins on port 0 and port 2 can be used as edge sensitive interrupt sources.
Processor wake-up from Power-down mode via any interrupt able to operate during Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet wake-up interrupt, CAN bus activity, port 0/2 pin interrupt).
Two independent power needed features.
Each peripheral has its own clock divider for further power saving. These dividers help reduce active power by 20 % to 30 %.
Brownout detect with separate thresholds for interrupt and forced reset.
Page 4
On-chip power-on reset.
On-chip crystal oscillator with an operating range of 1 MHz to 24 MHz.
On-chip PLL allows CPU operation up to the maximum CPU rate without the need for a high frequency crystal. May be run from the main oscillator, the internal RC oscillator, or the RTC oscillator.
Boundary scan for simplified board testing.
Versatile pin function selections allow more possibilities for using on-chip peripheral functions.
Standard ARM test/debug interface for compatibility with existing tools.
Emulation trace module supports real-time trace.
Page 5
BLOCK DIAGRAM:
Page 6
MEMORY MAP:
Page 7
SCHEMATIC:
Page 8
2.5V
2.5V
2.5V
2.5V
BAT_
HO
LDER
10K
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n22
p
22p
10p
10p
100n
100n
100n
100n
100n
100n
100uF/25V/SMD
470p
100n
220uF/10V/tnant
1000
uF/6
.3V
/8x1
2mm
100n
1n
100n
100n
18p(
NA
)18
p(N
A)
100n
100n
47uF
/6.3
V
470u
F/16
VD
C
100n
100n
10u/6.3V 1.5n
10u/
6.3V
10u/
6.3V
100n
100n
2.2u
F
10u/6.3V
10u/6.3V
1u
100n
100n
100n
10n
10n
100n
100n
F
100n
100n
(NA
)4.
7uF/
6.3V
(NA)
47uF
/6.3
V
10u/6.3V
100n
100n
10u/
6.3V
100n
100n
10uF
/16V
DC
100n
10u/
6.3V
100n
100n
10u/
6.3V
100n
NA
1000
uF/6
.3V
/low
_ES
R
47uF
/6.3
V
1u
47p(
NA
)47
p(N
A)
4.7n
2.2u
F10
0nF
10n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100p
100n
33p
33p
10u/
6.3V
100n
100n
10n
10n
10n
10u/
6.3V
10u/
6.3V
100n
10u/6.3V
CO
N33
.5M
M
6NC
2-50
MH
z
1N5819S
BA
T54C
1N41
48
1N58
19S
1N58
22(S
MC
)
DB
104(
SM
D)
JAC
K-3
PIN
PH
ON
E_J
AC
K-T
H
TFD
U41
00(N
A)
470n
H
470n
H
ferr
ite b
ead
220u
H
33uH
/CW
8A
ferr
ite b
ead
470n
H 470n
H
100u
H
FER
RIT
E_BE
AD
RJL
BC
-060
TC1
JAC
K-3
PIN
PH
ON
E_J
AC
K-T
H
+5V
+20V
+5V
+5V
+5V
+5V
+5V
+15V
+15V
+20V
VIN
+5V
+5V
+5V
+20V
+15V
+5V
+5V
-10V
-10V
-10V
MD
6R M
INI-
DIN
12.0
00M
Hz
3276
8/6p
F
12.2
88M
Hz
100K
100K
100K
220
R_0
R(N
A)
10K
220
33K
33K
20K
/1%
20K
/1%
1K
220
1.2k
/1%
4.7K
3.3K
3333
15K
20K
/1%
100K
2.2
18K
/1%
4.7K
33331.
5K/1
%10K
2.2K
20K
/1%
560
1K
1K
20K
/1%
150
4.7K
NA
120
NA
10K
NA
2.2K
33K
33K
2.2K
10K
10K
10K
10K
10K
4.7K
1K
100K
1K
1K
33K
4.7K
10K
4.7K
4.7K
330/
1%
100/
1%
330/
1%
1
8.2k/1%1.1K/1%
1K
1K
1K
1M
100k
100k
2222
22
330/
1%
20K
/1%
1K
R_0
R(N
A)
NA
100k
100k
100K
10K
100/
1%
10K
(NA
) 14(N
A)
47(N
A)
10K
(NA
)
560
R_0
R(N
A)
R_0
R(N
A)
220(
NA
)
15K
100K
4.99K/1%
150K
68K
33
2.2K
10K
10K
33K
33K
33K
33K
4.7K
2.2K
33K
NA
NA
10K
4.99
K/1
%
1.5K
/1%
2.2K
49.9
/1%
49.9
/1%
49.9
/1%
49.9
/1%
330/
1%33
0/1%
10K
NA
NA
3.3K
3.3K
3.3K
3.3K
1K 1K 4.7K
1K
33K
3.3K
22K
24K
NA
R_0
R(N
A)
NA
10K
10K
0
SW
-TA
KT1
0
db9_
mal
e
0
red
SD-C
ARD
BC
817
BC
807
IRLM
6402
BC
817
0
GFT
035A
3202
40Y
00
LPC
2478
ST3
232C
D(R
),(S
O16
)
MC
3406
3AD
(R2)
G,(
SO
8)
K4S
5616
32C
-TC
/L75
SM
B38
0,(Q
FN10
)
MC
3406
3AD
(R2)
G,(
SO
8)
MC
P25
51(T
)-I/S
N,(
SO
8)
TL06
2CD
,(S
O8)
TL06
2CD
,(S
O8)
KS
8721
BL
VS1
002
K4S
5616
32C
-TC
/L75
LM35
26M
-L,(
SO
8)
US
B_B
yello
w
US
B_A
yello
w
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
AM
E10
85A
CD
T-3Z
BD
9778
HFP
78L1
5AC
Z,(T
O92
)
#RS
TOU
T
#RST
OU
T
#RS
TOU
T
#RS
TOU
T
#RS
TOU
T
#US
B_O
VR
CR
2
#US
B_O
VR
CR
2
#US
B_P
PW
R2
#US
B_P
PW
R2
+3.3
V_A
+3.3
V_A
+5V_
JLIN
K
+5V
_JLI
NK
3.3V
_A
3.3V
_A
A0A0
A0A1
A1
A1A2
A2
A2A3
A3A3
A4A4
A4A5
A5A5
A6A6
A6A7
A7A7
A8A8
A8A
9A9
A9
A10
A10
A10
A11
A11
A11
A12
A12
A12
A13
A13
A13
A14
A14
A14
AC
C_I
NT
AC
C_I
NT
AD
C0[
7]
AD
C0[
7]
BU
T1
BUT1
BU
T2
BUT2
CA
SN
CAS
N
CA
SN
CP CP
CRS
CR
S
CR
S_D
V
CR
S_D
V
CR
S_D
V
CS
_AU
CS
_AU
D+
D-
D0
D0
D1
D1
D2
D2
D3
D3
D4
D4
D5
D5
D6
D6
D7
D7
D8
D8
D9
D9
D10
D10
D11
D11
D12
D12
D13
D13
D14
D14
D15
D15
D16
D16
D17
D17
D18
D18
D19
D19
D20
D20
D21
D21
D22
D22
D23
D23
D24
D24
D25
D25
D26
D26
D27
D27
D28
D28
D29
D29
D30
D30
D31
D31
DB
GE
N
DBG
EN
DQ
MN
0
DQ
MN
0
DQ
MN
1
DQ
MN
1
DQ
MN
2
DQ
MN
2
DQ
MN
3
DQ
MN
3
DR
EQ
DR
EQ
GB
UF
GB
UF
HO
ST_
PW
RH
OS
T_P
WR
IR_R
X
ISP
_E
ISP_
E
KBD
_CK
KBD
_CK
KBD
_IO
KBD
_IO
LCD
CP
LCD
CP
LCD
CP
LCD
FP
LCD
FP
LCD
FPLC
DLP
LCD
LP
LCD
LP
LCD
[0]
LCD
[0]
LCD
[1]
LCD
[1]
LCD
[2]
LCD
[2]
LCD
[3]
LCD
[3]
LCD
[4]
LCD
[4]
LCD
[4]
LCD
[5]
LCD
[5]
LCD
[5]
LCD
[6]
LCD
[6]
LCD
[6]
LCD
[7]
LCD
[7]
LCD
[7]
LCD
[8]
LCD
[8]
LCD
[9]
LCD
[9]
LCD
[10]
LCD
[10]
LCD
[11]
LCD
[11]
LCD
[12]
LCD
[12]
LCD
[13]
LCD
[13]
LCD
[14]
LCD
[14]
LCD
[15]
LCD
[15]
LCD
[16]
LCD
[16]
LCD
[17]
LCD
[17]
LCD
[18]
LCD
[18]
LCD
[19]
LCD
[19]
LCD
[20]
LCD
[20]
LCD
[21]
LCD
[21]
LCD
[22]
LCD
[22]
LCD
[23]
LCD
[23]
LED
100/
DU
P
LED
AC
T
LEFT
LEFT
MC
ICLK
MC
ICLK
MC
ICM
D
MC
ICM
D
MC
IDA
T0
MC
IDA
T0
MC
IDA
T1
MC
IDA
T1
MC
IDA
T2
MC
IDA
T2
MC
IDA
T3
MC
IDA
T3
MC
IPW
R
MC
IPW
RM
DC
MD
C
MD
IO
MD
IO
MIS
O
MIS
O
MIS
O0
MIS
O0
MO
SI
MO
SI
MO
SI0
MO
SI0
PH
Y_I
RQ
PH
Y_I
RQ
PHY_
IRQ
PH
Y_P
D
PHY_
PD
PIPE
STA
T0
PIP
ES
TAT0
PO
L
POL
RAS
N
RAS
N
RAS
N
RD
1
RD
1
REFCK
RE
FCK
RE
FCK
RIG
HT
RIG
HT
RMII
RM
II
RST
RS
T
RS
T
RS
T
RTC
K
RTC
K
RTC
K
RX
0R
X0
RX
0
RX
1
RX
1
RX
1R
X2
RX
2
RX
3
RX
3
RX
D0
RX
D0
RXD
2
RXD
2
RX
D3
RX
D3
RX
ER
RX
ER
RX
ER
SC
K
SCK
SCK0
SC
K0
SC
L0
SC
L0
SCL2
SCL2
SD
A0
SD
A0
SDA2
SD
A2
SDC
LK
SDC
LK
SDC
LKS
DC
LKEN
SDC
LKEN
SD
CLK
EN
SDC
S
SDC
S
SDC
SSD
WEN
SDW
EN
SDW
EN
SS
EL
SSEL
SSEL
0
SS
EL0
TCK
TCK
TCK
TD1
TD1
TDI
TDI
TDI
TDO
TDO
TDO
TMS
TMS
TM
S
TRA
CE
CLK
TRAC
ECLK
TRAC
ESYN
C
TRA
CE
SY
NC
TRA
CE
SY
NC
TRS
TNTR
STN
TR
STN
TX0
TX0
TX1
TX1
TXD
0
TXD
0
TXD
2
TXD
2
TXD
3
TXD
3
TXEN
TXE
N
U1D
+
U1D
+
U1D
-
U1D
-
U2D
+
U2D
+
U2D
-
U2D
-
US
B1_
CO
NN
EC
T
US
B1_
CO
NN
EC
T
US
B_P
WR
D2
US
B_P
WR
D2
US
B_U
P_L
ED
1
US
B_U
P_L
ED
1
US
B_U
P_L
ED
2
US
B_U
P_L
ED
2
VB
US
VB
US
VC
OM
VCO
M
WP
WP
X1
X1
X2
X2
Y1
Y1
Y2
Y2
12-10V_E
12
3.3V
A_E
12
3.3V
_E
+ -3V_B
AT
12
15V
_E
AN
_TR
IM
12A
OU
T
12B
DS
_E
BU
T1B
UT2
123
C/SC
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
C33
C34
C35
C36
C37
C38
C39C40
C41
C42
C43
C44
C45
C46
C47
C48
C49
C50
C51
C52
C53
C54
C55
C56
C57
C58
C59
C60
C61
C62
C63
C64
C65
C66
C67 C68
C69
C70
C71
C72
C73
C74
C75
C76
C77
C78
C79
C80
C81
C82
C85
C86
C87
C88
C89
C90
C91
C92
C93
C94
C95
C96
C97
C98
C99
C10
0
C10
1
C10
2
C10
3
C10
4
C10
5C
106
C10
7C
108
C10
9 C11
0C
111
C11
2C
114
123C
AN
1
12
CA
N1_
D
12CAN1_T
1 3
4 2
CD
1
D1
D2
D4
D5
D6
12
ETM
-E
EX
T-1
EX
T-2
EX
T-3
EX
T-4
EX
T-5
EX
T-6
EX
T-7
EX
T-8
EX
T-9
EX
T-10
EX
T-11
EX
T-12
EX
T-13
EX
T-14
EX
T-15
EX
T-16
EX
T-17
EX
T-18
EX
T-19
EX
T-20
123
EX
T/B
AT
123
EX
T/JL
NK
G1
GN
D
HE
AD
PH
ON
ES
12
I2S
RX
_SD
A
GN
D8
IRE
D_A
NO
DE
1
IRE
D_C
ATH
OD
E2
NC
5
RX
D4
SC
7
TXD
3
VC
C1
6
IRD
A1
2IR
DA
_LS
_E
12
ISP
_E
12
34
56
78
910
1112
1314
1516
1718
1920
JTA
G
L1
L2
L3L4
L5
L6
L7
L8
L9
L10
AG
AG
AY
AY
CO
M3
GND1GND2
KG
KG
KY
KY
NC
6R
D+
7
RD
-8
TD+
1
TD-
275
75
7575
1nF/
2kV
1 4 5 2 3 7 8 6
GR
EEN
YELL
OW
LAN
MIC
123
PD/CTRL
11
22
33
44
55
66
NC
1N
C2
SHIE
LD
PS
2
PW
R
PW
R_J
AC
K
Q1
Q2
GN
DG
ND
_
Q3
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R27
R28
R29
R30
R31
R32
R33
R34
R35
R36
R37
R38
R39
R40
R41
R42
R43
R44
R45
R46
R47
R48
R49
R50
R51
R52
R53
R54
R55
R56
R57
R58
R59
R60
R61
R62
R63
R64
R65R66
R67
R68
R69
R70
R71
R72
R73
R74
R75
R76
R77 R78
R79
R80
R81
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R94R
95R
96
R97
R98
R99
R10
0
R10
8
R10
9R
110
R11
1R
112
R11
3
R11
4
R11
5
R11
6
R11
7
R11
8
R11
9
R12
3
R12
4
R12
5R
126
R12
7R
128
R12
9R
130
R13
1R
132
R13
3R
134
R13
5
R13
6R
137
R13
8R
139
R14
0R
141
R14
2R
143
R14
4
R14
6R
147
R14
8
R14
9
R15
0
R15
1
R15
2
R15
4
12
RC
RE
SE
T
12
RS
1 2 3 4 5
6 7 8 9G1
G2
RS
232_
0/IC
SP
12
RS
T_E
12
RW
SD
CD
/DA
T3/C
S1
CLK
/SC
LK5
CM
D/D
I2
CP
113
CP
215
DA
T0/D
O7
DA
T1/R
ES
8
DA
T2/R
ES
9
VD
D4
VS
S1
3
VS
S2
6
WP
110
WP
214
SD/M
MC
T2
T3
T4
T5
12
TC
#RE
SE
T6
B0
12
B1
13
B2
14
B3
15
B4
16
B5
17
B6
18
B7
19
DC
LK38
EN
B52
G0
20
G1
21
G2
22
G3
23
G4
24
G5
25
G6
26
G7
27
GN
D53
HS
YN
C36
M1 P1
M2 P2
NC
15
NC
244
NC
346
NC
448
PO
L7
R0
28
R1
29
R2
30
R3
31
R4
32
R5
33
R6
34
R7
35
SP
CLK
49
SP
DA
T50
SP
EN
A43
VB
L+1
3
VB
L+2
4
VB
L-1
1
VB
L-2
2
VC
C1
41
VC
C2
42
VC
OM
51
VD
D1
39
VD
D2
40
VS
S54
VS
YN
C37
V_G
H47
V_G
L45
X1
9
X2
11
Y1
8
Y2
10
TFT
12
34
56
78
910
1112
1314
1516
1718
1920
2122
2324
2526
2728
2930
3132
3334
3536
3738
GND1GND2GND3GND4GND5
TRA
CE
MIG
TOR
(NA
)
12
TS1
2TW
#RE
SE
T35
#RS
TOU
T29
#TR
ST
8
ALA
RM
37
DB
GE
N9
NC
130
NC
211
7N
C3
141
P0[
0]/R
D1/
TXD
3/S
DA
194
P0[
1]/T
D1/
RX
D3/
SC
L196
P0[
2]/T
XD
020
2
P0[
3]/R
XD
020
4
P0[
4]/I2
SR
X_C
LK/L
CD
[0]/R
D2/
CA
P2[
0]16
8
P0[
5]/I2
SR
X_W
S/L
CD
[1]/T
D2/
CA
P2[
1]16
6
P0[
6]/I2
SR
X_S
DA
/LC
D[8
]/SS
EL1
/MA
T2[0
]16
4
P0[
7]/I2
STX
_CLK
/LC
D[9
]/SC
K1/
MA
T2[1
]16
2
P0[
8]/I2
STX
_WS
/LC
D[1
6]/M
ISO
1/M
AT2
[2]
160
P0[
9]/I2
STX
_SD
A/L
CD
[17]
/MO
SI1
/MA
T2[3
]15
8
P0[
10]/T
XD
2/S
DA
2/M
AT3
[0]
98
P0[
11]/R
XD
2/S
CL2
/MA
T3[1
]10
0
P0[
12]/#
US
B_P
PW
R2/
MIS
O1/
AD
0[6]
41
P0[
13]/U
SB
_UP
_LE
D2/
MO
SI1
/AD
0[7]
45
P0[
14]/#
US
B_H
STE
N2/
US
B_C
ON
NE
CT
2/S
SE
L169
P0[
15]/T
XD
1/S
CK
0/S
CK
128
P0[
16]/R
XD
1/S
SE
L0/S
SE
L13
0
P0[
17]/C
TS1/
MIS
O0/
MIS
O12
6
P0[
18]/D
CD
1/M
OS
I0/M
OS
I12
4
P0[
19]/D
SR
1/M
CIC
LK/S
DA
112
2
P0[
20]/D
TR1/
MC
ICM
D/S
CL1
120
P0[
21]/R
I1/M
CIP
WR
/RD
111
8
P0[
22]/R
TS1/
MC
IDA
T0/T
D1
116
P0[
23]/A
D0[
0]/I2
SR
X_C
LK/C
AP
3[0]
18
P0[
24]/A
D0[
1]/I2
SR
X_W
S/C
AP
3[1]
16
P0[
25]/A
D0[
2]/I2
SR
X_S
DA
/TX
D3
14
P0[
26]/A
D0[
3]/A
OU
T/R
XD
312
P0[
27]/S
DA
050
P0[
28]/S
CL0
48
P0[
29]/U
SB
_D+1
61
P0[
30]/U
SB
_D-1
62
P0[
31]/U
SB
_D+2
51
P1[
0]/E
NE
T_TX
D0
196
P1[
1]/E
NE
T_TX
D1
194
P1[
2]/E
NE
T_TX
D2/
MC
ICLK
/PW
M0[
1]18
5
P1[
3]/E
NE
T_TX
D3/
MC
ICM
D/P
WM
0[2]
177
P1[
4]/E
NE
T_TX
_EN
192
P1[
5]/E
NE
T_TX
_ER
/MC
IPW
R/P
WM
0[3]
156
P1[
6]/E
NE
T_T
X_C
LK/M
CID
AT0
/PW
M0[
4]17
1
P1[
7]/E
NE
T_C
OL/
MC
IDA
T1/
PW
M0[
5]15
3
P1[
8]/E
NE
T_C
RS
_DV
/EN
ET
_CR
S19
0
P1[
9]/E
NE
T_R
XD
018
8
P1[
10]/E
NE
T_R
XD
118
6
P1[
11]/E
NE
T_R
XD
2/M
CID
AT2
/PW
M0[
6]16
3
P1[
12]/E
NE
T_R
XD
3/M
CID
AT3
/PC
AP
0[0]
157
P1[
13]/E
NE
T_R
X_D
V14
7
P1[
14]/E
NE
T_R
X_E
R18
4
P1[
15]/E
NE
T_R
EF_
CLK
/EN
ET_
RX
_CLK
182
P1[
16]/E
NE
T_M
DC
180
P1[
17]/E
NE
T_M
DIO
178
P1[
18]/U
SB
_UP
_LE
D1/
PW
M1[
1]/C
AP
1[0]
66
P1[
19]/#
US
B_T
X_E
1/#U
SB
_PP
WR
1/C
AP
1[1]
68
P1[
20]/U
SB
_TX
_DP
1/LC
D[6
]/LC
D[1
0]/P
WM
1[2]
/SC
K0
70
P1[
21]/U
SB
_TX
_DM
1/LC
D[7
]/LC
D[1
1]/P
WM
1[3]
/SS
EL0
72
P1[
22]/U
SB
_RC
V1/
LCD
[8]/L
CD
[12]
/US
B_P
WR
D1/
MA
T1[0
]74
P1[
23]/U
SB
_RX
_DP
1/LC
D[9
]/LC
D[1
3]/P
WM
1[4]
/MIS
O0
76
P1[
24]/U
SB
_RX
_DM
1/LC
D[1
0]/L
CD
[14]
/PW
M1[
5]/M
OS
I078
P1[
25]/#
US
B_L
S1/
LCD
[11]
/LC
D[1
5]/#
US
B_H
STE
N1/
MA
T1[1
]80
P1[
26]/#
US
B_S
SP
ND
1/LC
D[1
2]/L
CD
[20]
/PW
M1[
6]/C
AP
0[0]
82
P1[
27]/#
US
B_I
NT
1/LC
D[1
3]/L
CD
[21]
/#U
SB
_OV
RC
R1/
CA
P0[
1]88
P1[
28]/U
SB
_SC
L1/L
CD
[14]
/LC
D[2
2]/P
CA
P1[
0]/M
AT0
[0]
90
P1[
29]/U
SB
_SD
A1/
LCD
[15]
/LC
D[2
3]/P
CA
P1[
1]/M
AT
0[1]
92
P1[
30]/U
SB
_PW
RD
2/V
BU
S/A
D0[
4]42
P1[
31]/#
US
B_O
VR
CR
2/S
CK
1/A
D0[
5]40
P2[
0]/P
WM
1[1]
/TX
D1/
TR
AC
EC
LK/L
CD
PW
R15
4
P2[
1]/P
WM
1[2]
/RX
D1/
PIP
ES
TAT0
/LC
DLE
152
P2[
2]/P
WM
1[3]
/CT
S1/
PIP
ES
TAT
1/LC
DC
P15
0
P2[
3]/P
WM
1[4]
/DC
D1/
PIP
ES
TAT2
/LC
DFP
144
P2[
4]/P
WM
1[5]
/DS
R1/
TRA
CE
SY
NC
/LC
DA
C14
2
P2[
5]/P
WM
1[6]
/DT
R1/
TRA
CE
PK
T0/L
CD
LP14
0
P2[
6]/P
CA
P1[
0]/R
I1/T
RA
CE
PK
T1/L
CD
[0]/L
CD
[4]
138
P2[
7]/R
D2/
RTS
1/T
RA
CE
PK
T2/
LCD
[1]/L
CD
[5]
136
P2[
8]/T
D2/
TXD
2/T
RA
CE
PK
T3/L
CD
[2]/L
CD
[6]
134
P2[
9]/U
SB
_CO
NN
EC
T1/R
XD
2/E
XT
IN0/
LCD
[3]/L
CD
[7]
132
P2[
10]/#
EIN
T011
0
P2[
11]/#
EIN
T1/L
CD
CLK
IN/M
CID
AT1
/I2S
TX_C
LK10
8
P2[
12]/#
EIN
T2/L
CD
[4]/L
CD
[3]/L
CD
[8]/L
CD
[18]
/MC
IDA
T2/I2
STX
_WS
106
P2[
13]/#
EIN
T3/L
CD
[5]/L
CD
[9]/L
CD
[19]
/MC
IDA
T3/I2
ST
X_S
DA
102
P2[
14]/#
CS
2/C
AP
2[0]
/SD
A1
91
P2[
15]/#
CS
3/C
AP
2[1]
/SC
L199
P2[
16]/#
CA
S87
P2[
17]/#
RA
S95
P2[
18]/C
LKO
UT0
59
P2[
19]/C
LKO
UT1
67
P2[
20]/#
DY
CS
073
P2[
21]/#
DY
CS
181
P2[
22]/#
DY
CS
2/C
AP
3[0]
/SC
K0
85
P2[
23]/#
DY
CS
3/C
AP
3[1]
/SS
EL0
64
P2[
24]/C
KE
OU
T053
P2[
25]/C
KE
OU
T154
P2[
26]/C
KE
OU
T2/M
AT3
[0]/M
ISO
057
P2[
27]/C
KE
OU
T3/M
AT3
[1]/M
OS
I047
P2[
28]/D
QM
OU
T0
49
P2[
29]/D
QM
OU
T1
43
P2[
30]/D
QM
OU
T2/
MA
T3[
2]/S
DA
231
P2[
31]/D
QM
OU
T3/
MA
T3[
3]/S
CL2
39
P3[
0]/D
019
7
P3[
1]/D
120
1
P3[
2]/D
220
7
P3[
3]/D
33
P3[
4]/D
413
P3[
5]/D
517
P3[
6]/D
623
P3[
7]/D
727
P3[
8]/D
819
1
P3[
9]/D
919
9
P3[
10]/D
1020
5
P3[
11]/D
1120
8
P3[
12]/D
121
P3[
13]/D
137
P3[
14]/D
1421
P3[
15]/D
1528
P3[
16]/D
16/P
WM
0[1]
/TX
D1
137
P3[
17]/D
17/P
WM
0[2]
/RX
D1
143
P3[
18]/D
18/P
WM
0[3]
/CTS
115
1
P3[
19]/D
19/P
WM
0[4]
/DC
D1
161
P3[
20]/D
20/P
WM
0[5]
/DS
R1
167
P3[
21]/D
21/P
WM
0[6]
/DT
R1
175
P3[
22]/D
22/P
CA
P0[
0]/R
I119
5
P3[
23]/D
23/C
AP
0[0]
/PC
AP
1[0]
65
P3[
24]/D
24/C
AP
0[1]
/PW
M1[
1]58
P3[
25]/D
25/M
AT
0[0]
/PW
M1[
2]56
P3[
26]/D
26/M
AT0
[1]/P
WM
1[3]
55
P3[
27]/D
27/C
AP
1[0]
/PW
M1[
4]20
3
P3[
28]/D
28/C
AP
1[1]
/PW
M1[
5]5
P3[
29]/D
29/M
AT1
[0]/P
WM
1[6]
11
P3[
30]/D
30/M
AT1
[1]/R
TS1
19
P3[
31]/D
31/M
AT1
[2]
25
P4[
0]/A
075
P4[
1]/A
179
P4[
2]/A
283
P4[
3]/A
397
P4[
4]/A
410
3
P4[
5]/A
510
7
P4[
6]/A
611
3
P4[
7]/A
712
1
P4[
8]/A
812
7
P4[
9]/A
913
1
P4[
10]/A
1013
5
P4[
11]/A
1114
5
P4[
12]/A
1214
9
P4[
13]/A
1315
5
P4[
14]/A
1415
9
P4[
15]/A
1517
3
P4[
16]/A
1610
1
P4[
17]/A
1710
4
P4[
18]/A
1810
5
P4[
19]/A
1911
1
P4[
20]/A
20/S
DA
2/S
CK
110
9
P4[
21]/A
21/S
CL2
/SS
EL1
115
P4[
22]/A
22/T
XD
2/M
ISO
112
3
P4[
23]/A
23/R
XD
2/M
OS
I112
9
P4[
24]/#
OE
183
P4[
25]/#
WE
179
P4[
26]/B
LS0
119
P4[
27]/B
LS1
139
P4[
28]/B
LS2/
MA
T2[0
]/LC
D[6
]/LC
D[1
0]/L
CD
[2]/T
XD
317
0
P4[
29]/B
LS3/
MA
T2[1
]/LC
D[7
]/LC
D[1
1]/L
CD
[3]/R
XD
317
6
P4[
30]/#
CS
018
7
P4[
31]/#
CS
119
3
RTC
K20
6
RTC
X1
34
RTC
X2
36
TCK
10
TD
I4
TD
O2
TM
S6
US
B_D
-252
VB
AT
38
VD
D(3
V3)
_115
VD
D(3
V3)
_260
VD
D(3
V3)
_371
VD
D(3
V3)
_489
VD
D(3
V3)
_511
2
VD
D(3
V3)
_612
5
VD
D(3
V3)
_714
6
VD
D(3
V3)
_816
5
VD
D(3
V3)
_918
1
VD
D(3
V3)
_10
198
VD
D(D
CD
C)(
3V3)
_126
VD
D(D
CD
C)(
3V3)
_286
VD
D(D
CD
C)(
3V3)
_317
4
VD
DA
20
VR
EF
24
VS
SA
22
VS
SC
OR
E1
32
VS
SC
OR
E2
84
VS
SC
OR
E3
172
VS
SIO
133
VS
SIO
263
VS
SIO
377
VS
SIO
493
VS
SIO
511
4
VS
SIO
613
3
VS
SIO
714
8
VS
SIO
816
9
VS
SIO
918
9
VS
SIO
1020
0
XT
AL1
44
XT
AL2
46
U1
C1+
1
C1-
3
C2+
4
C2-
5
R1I
N13
R1O
UT
12
R2I
N8
R2O
UT
9
T1I
N11
T1O
UT
14
T2IN
10T2
OU
T7
V+
2
V-
6
U2
1516
GN
DV
CC
U2P
WR
DC8
FB5
IS7 SC
1
SE
2T
C3
VCC6VSS
4U3
A0
23
A1
24
A2
25
A3
26
A4
29
A5
30
A6
31
A7
32
A8
33
A9
34
A10
/AP
22
A11
35
A12
36
BA
020
BA
121
CA
S17
CK
E37
CLK
38
CS
19
DQ
02
DQ
14
DQ
25
DQ
37
DQ
48
DQ
510
DQ
611
DQ
713
DQ
842
DQ
944
DQ
1045
DQ
1147
DQ
1248
DQ
1350
DQ
1451
DQ
1553
DQ
MH
39D
QM
L15
NC
140
RA
S18
VD
D1
1
VD
D2
14
VD
D3
27
VD
DQ
13
VD
DQ
29
VD
DQ
343
VD
DQ
449
VS
S1
28
VS
S2
41
VS
S3
54
VS
SQ
16
VS
SQ
212
VS
SQ
346
VS
SQ
452
WE
16
U4
CS
B5
GN
D3
INT
4
NC
11
NC
210
SC
K6
SD
I/SD
A8
SD
O7
VD
D2
VD
DIO
9
U5
DC8 FB
5
IS7
SC
1
SE
2T
C3
VCC6 VSS 4
U6
CA
NH
7
CA
NL
6
RS
8
RX
D4
TX
D1
VD
D3
VR
EF
5
VS
S2
U7
3 21
U9A
5 67
U9B
8 4
COL/RMII 21CRS/RMII_BTB 22
FXS
D/F
XE
N34
GN
D1
8
GN
D2
12
GND3 23
GN
D4
35G
ND
536
GND639
GND743 GND844
INT
/PH
YA
D0
25LE
D0/
TES
T26
LED
1/S
PD
100/
NF
EF
27LE
D2/
DU
PLE
X28
LED
3/N
WA
YE
N29
MD
C2
MD
IO1
PD
#30
REXT37
RST#48
RX
+33
RX
-32
RX
C10
RX
D0/
PH
YA
D4
6R
XD
1/P
HY
AD
35
RX
D2/
PH
YA
D2
4R
XD
3/P
HY
AD
13
RX
DV
/CR
SD
V/P
CS
_LP
BK
9
RX
ER
/ISO
11
TX+41
TX-40
TXC/REFCLK 15
TXD0 17
TXD1 18
TXD2 19
TXD3 20
TXEN 16
TXER 14VDDC 13VD
DIO
17
VDDIO2 24
VDDPLL47
VDDRCV38
VD
DR
X31
VDDTX42
XI46
XO45
U10
AGND137AGND240
AGND341
AGND447
AVDD138AVDD243AVDD345
DGND14 DGND216 DGND320 DGND421 DGND522
DR
EQ
8
DVDD16DVDD214DVDD319
GB
UF
42
GP
IO0/
SP
IBO
OT
33
GP
IO1
34
GP
IO2/
DC
LK9
GP
IO3/
SD
ATA
10
LEF
T46
MC
N2
MC
P1
RC
AP
44
RIG
HT
39
RX
26S
CLK
28S
I29
SO
30
TES
T32
TX
27
XTA
LI18
XTA
LO17
X\C
\S\
23
X\O
\S\C
\/BS
YN
C13
X\R
\E\S
\E\T
\3
U11
A0
23
A1
24
A2
25
A3
26
A4
29
A5
30
A6
31
A7
32
A8
33
A9
34
A10
/AP
22
A11
35
A12
36
BA
020
BA
121
CA
S17
CK
E37
CLK
38
CS
19
DQ
02
DQ
14
DQ
25
DQ
37
DQ
48
DQ
510
DQ
611
DQ
713
DQ
842
DQ
944
DQ
1045
DQ
1147
DQ
1248
DQ
1350
DQ
1451
DQ
1553
DQ
MH
39D
QM
L15
NC
140
RA
S18
VD
D1
1
VD
D2
14
VD
D3
27
VD
DQ
13
VD
DQ
29
VD
DQ
343
VD
DQ
449
VS
S1
28
VS
S2
41
VS
S3
54
VS
SQ
16
VS
SQ
212
VS
SQ
346
VS
SQ
452
WE
16
U12
#EN
A1
#EN
B4
FLA
G_A
2
FLA
G_B
3G
ND
6IN
7O
UT_
A8
OU
T_B
5
U13
UE
XT-
1U
EX
T-2
UE
XT-
3U
EX
T-4
UE
XT-
5U
EX
T-6
UE
XT-
7U
EX
T-8
UE
XT-
9U
EX
T-10
1 2 3 4
US
B_D
EV
US
B_D
_LIN
K
1 2 3 4
US
B_H
OS
T
US
B_H
_LIN
K
1
VI
3V
O2
GN
D/A
DJ
VR
1
EN
/SY
NC
7
FB3
GN
D4
INV
5
RT
6S
W2
VIN
1VR
2(5V
)
GN
D
INO
UT
VR
3
1 2VREF_E
6VA
C9V
DC
LPC
-247
8STK
Rev
. B
CO
PY
RIG
HT(
C),
200
9
http
://w
ww
.olim
ex.c
om/d
ev
+
+
+
+
+
+
+
+
++
+
+
+
+
+
+
+
+
+
+
+
+
+
VD
D
VS
SO
UT
E/D
1-L
23-R
RJ45 SIDE
1:1
1:1
GN
D
1-L
23-R
IO NA
GN 5V CK
NA
GN
D
0R
0R
0R
0R
0R
USB
SH
IELDUSB
SH
IEL
D
BOARD LAYOUT:
POWER SUPPLY CIRCUIT:
LPC-2478STK is powered by +(9-12)VDC/6VAC applied at the power jack. LPC-2478STK could also be powered by a battery (CR2032, Li, 3V) but this battery only powers the 2KB internal SRAM and the RTC (Real Time Clock).
The consumption of LPC-2478STK varies depending on the supplied power but at +10VDC it is about 250mA.
RESET CIRCUIT:
LPC-2478STK reset circuit is made with R68(47k) pull-up, capacitor C20(100nF) and the RST button.
CLOCK CIRCUIT:
Quartz crystal 12 MHz is connected to LPC2478 pin 44 (XTAL1) and pin 46 (XTAL2).
Quartz crystal 32.768 kHz is connected to LPC2478 pin 34 (RTX1) and pin 36 (RTX2) and supplies the internal Real Time Clock.
Page 9
JUMPER DESCRIPTION:
CAN_DCAN Disable. If this jumper is closed, the CAN is disabled. Default state is open.
CAN_TThis jumper assures correct work of the CAN. At each end of the bus it should be closed. This means that if you have only two devices with CAN, the jumpers of both devices should be closed. If you have more than two devices, only the two end-devices should be closed. Default state is closed.
-10V_EThis jumper, when closed, supplies -10 V voltage to the on board LCD panel.Default state is closed.
15V_EThis jumper, when closed, supplies 15 V voltage to to the on board LCD panel.Default state is closed.
3.3V_EThis jumper, when closed, supplies 3.3 V voltage to the VDD1-10 pins of the MCU.Default state is closed.
3.3VA_EThis jumper, when closed, supplies 3.3 V voltage to the VDDA pin of the MCU.Default state is closed.
VREF_EThis jumper, when closed, supplies 3.3 V reference voltage to the VREF pin of the MCU.Default state is closed.
IRDA_LS_EIRDA_LowSpeed_Enable jumper – opened if there is no IrDA module or it is disabled.Default state is opened if your board doesn't have an IrDA connector.
I2SRX_SDAIrDA TX input pin jumper – opened if there is no IrDA module or it is disabled.Default state is opened if your board doesn't have an IrDA connector.
Page 10
AOUTIrDA RX output pin jumper – opened if there is no IrDA module or it is disabled.Default state is opened if your board doesn't have an IrDA connector.
RCThis jumper, when closed, outputs the LCD[0] signal from the LPC2478 to the TFT display. If it is open, pin 168 of the LCP2478 is connected to EXT-4. Default state is closed.
RWThis jumper, when closed, outputs the LCD[1] signal from the LPC2478 to the TFT display. If it is open, pin 166 of the LCP2478 is connected to EXT-5.Default state is closed.
RSThis jumper, when closed, outputs the LCD[8] signal from the LPC2478 to the TFT display. If it is open, pin 164 of the LCP2478 is connected to EXT-6.Default state is closed.
TCThis jumper, when closed, outputs the LCD[9] signal from the LPC2478 to the TFT display. If it is open, pin 162 of the LCP2478 is connected to EXT-7.Default state is closed.
TWThis jumper, when closed, outputs the LCD[16] signal from the LPC2478 to the TFT display. If it is open, pin 160 of the LCP2478 is connected to EXT-8.Default state is closed.
TSThis jumper, when closed, outputs the LCD[17] signal from the LPC2478 to the TFT display. If it is open, pin 158 of the LCP2478 is connected to EXT-9.Default state is closed.
ISP_EIf you put this jumper, you enable the ISP (In-System Programming). This is used when you want external software to program the LCP2478. This jumper is used in combination with the RST_E jumper.Default state is open.
RST_EIf you put this jumper, you enable external software to control the Reset signal to the processor. This is used when you want external software to program the LCP2478. This jumper is used in combination with the ISP_E jumper.Default state is open.
Page 11
ETM_EIf you put this jumper, you enable the MICTOR Trace connector.Default state is open.
BDS_EBoundary scan enable.Default state is open.
C/SCThis jumper controls the USB device interface.If 1-2 are shorted, the USB is always enabled.
If 2-3 are shorted, the USB Enable is controlled by the MCU LPC2478 signal USB1_CONNECT. Default state is 2-3 shorted.
PD/CTRLThis jumper controls the PHY signal of the Ethernet controller.If there is no jumper, the PHY is always enabled.
If 1-2 are shorted, the PHY is disabled
If 2-3 are shorted, the PHY is controlled by the LPC2478 signal PHY_PD. Default state is no jumper (opened).
EXT/JLINKThis jumper controls the JLINK +5V power line (pin19) of the JTAG and the +5VDC power supply of the board.If 1-2 are shorted, the JLINK +5V power line (pin19) from the JTAG interface supplies the board with +5VDC.
If 2-3 are shorted, the board is supplied with +5VDC from the +5VDC voltage regulator. Default state is 2-3 shorted.
EXT/BAT
This jumper controls the VBAT signal of the LPC2478.If 1-2 are shorted, the VBAT pin is supplied by an external battery.
If 2-3 are shorted, the VBAT pin is supplied by the common +3.3VDC power supply for the board.Default state is 2-3 shorted.
Page 12
INPUT/OUTPUT:
SD/MMC LED (red) with name SD connected to SD/MMC pin 4.
Power-on LED (red) with name PWR – this LED shows that +3.3V is applied to the board.
USB host LED (yellow) with name USB_H_LINK – connected to LPC2478 pin 147 (P1[13]/ENET_RX_DV).
USB device LED (yellow) with name USB_D_LINK – connected to LPC2478 pin 66 (P1[18]/USB_UP_LED1/PWM1[1]/CAP1[0]).
User button with name BUT1 connected to LPC2478 pin 67 (P2[19]/CLKOUT1).
User button with name BUT2 connected to LPC2478 pin 81 (P2[21]/#DYCS1).
Reset button with name RESET connected to LPC2478 pin 35 (#RESET).
Trimpot with name AN_TRIM connected to LPC2478 pin 45 (P0[13]/USB_UP_LED2/MOSI1/AD0[7]).
TFT touchscreen display – 3.5'', 320x200, 24-bit color.
Page 13
EXTERNAL CONNECTORS DESCRIPTION:
JTAG:
Pin # Signal Name Pin # Signal Name
1 +3.3V 2 +3.3V
3 TRSTN 4 GND
5 TDI 6 GND
7 TMS 8 GND
9 TCK 10 GND
11 RTCK 12 GND
13 TDO 14 GND
15 RST 16 GND
17 GND 18 GND
19 +5V_JLINK 20 GND
TDI Input Test Data In. This is the serial data input for the shift register.
TDO OutputTest Data Out. This is the serial data output for the shift register. Data is shifted out of the device on the negative edge of the TCK signal.
TMS Input Test Mode Select. The TMS pin selects the next state in the TAP state machine.
TCK Input Test Clock. This allows shifting of the data in, on the TMS and TDI pins. It is a positive edge triggered clock with the TMS and TCK signals that define the internal state of the device.
TRSTNInput Test Reset N. This signal resets the JTAG controller.
RTCK OutputReturn Clock. This is a synchronization signal which the JTAG connector uses to acknowledge it is ready to receive/transmit.
JTAG is used to to program and debug the MCU.
Page 14
RS232:
Pin # Signal Name
1 NC
2 RXD0
3 TXD0
4 NC
5 GND
6 RST
7 NC
8 ISP_E
9 NC
The RS232 in LPC2478-STK and LPC2478-STK is configured as DTE. Note that in order to establish connection to another DTE device (e.g. personal computer) you will need a null modem cable
TXD0 OutputTransmit Data. This is the asynchronous serial data output (RS232) for the shift register on the UART controller. (This pin is input for the RS232 and input for the LPC2478)
RXD0 Input Receive Data. This is the asynchronous serial data input (RS232) for the shift register on the UART controller. (This pin is output for the RS232 and input for the LPC2478)
RST Input Reset. When you use external software to program the LPC2478, this software uses the RS232 to connect to the device and if the jumper RST_E is put, than through this RST pin the software controls the #RESET pin of the MCU. (This pin is output for the RS232 and input for the LPC2478)
ISP_E Input In-System Programming. If you use external software to program the device, this pin enables the programming. A pre-condition to enable ISP is the ISP_E jumper to be put. (This pin is output for the RS232 and input for the LCP2478)
Page 15
CAN:
Pin # Signal Name
1 GND
2 CANL
3 CANH
CANL and CANH are either deferential input, or differential output depending on the function of the MCP2551 CAN controller (receiving or transmitting data).
Page 16
PWR:
Pin # Signal Name
1 Power Input
2 GND
The power input should be +(9-12VDC)/6VAC.
Audio In:
Pin # Signal Name
1 NC
2 GND
3 MCP
MCP Input Microphone Input. This pin is input to the DSP codec VS1002D.
Audio Out:
Pin # Signal Name
1 LEFT
2 GBUF
3 RIGHT
LEFT OutputLeft channel output. This pin is output for the DSP codec VS1002D.
GBUF OutputVirtual ground for audio output, 1.23 V nominal. This pin is output for the DSP codec VS1002D.
RIGHTOutputRight channel output. This pin is output for the DSP codec VS1002D.
Page 17
EXT:
Pin # Signal Name Pin # Signal Name
1 GND 2 +3.3V
3 +5V 4 P0[4]/I2SRX_CLK/LCD[0]/RD2/CAP2[0]
5 P0[5]/I2SRX_WS/LCD[1]/TD2/CAP2[1]
6 P0[6]/I2SRX_SDA/LCD[8]/SSEL1/MAT2[0]
7 P0[7]/I2STX_CLK/LCD[9]/SCK1/MAT2[1]
8 P0[8]/I2STX_WS/LCD[16]/MISO1/MAT2[2]
9 P0[9]/I2STX_SDA/LCD[17]/MOSI1/MAT2[3]
10 TXD3
11 RXD3 12 P4[31]/#CS1
13 P4[30]/#CS0 14 P4[27]/BLS1
15 P4[26]/BLS0 16 P4[24]/#OE
17 P4[17]/A17 18 P0[10]/TXD2/SDA2/MAT3[0]
19 P0[11]/RXD2/SCL2/MAT3[1]
20
Page 18
UEXT:
Pin # Signal Name
1 +3.3V
2 GND
3 TXD2
4 RXD2
5 SCL2
6 SDA2
7 MISO
8 MOSI
9 SCK
10 SSEL
USB host:
Pin # Signal Name
1 USB_PWRD2
2 U2D-
3 U2D+
4 GND
USB_PWRD2 Output USB Power. This signal is output from the processor and input for the USB host.
U2D-, U2D+ I/O This signals form the differential input/output depending on the direction of the data transfer.
USB device:
Pin # Signal Name
1 VBUS
2 U1D-
3 U1D+
4 GND
Page 19
VBUS OutputUSB device power.
U1D-, U1D+ I/O This signals form the differential input/output depending on the direction of the data transfer.
LAN:
Pin # Signal Name Chip Side Pin # Signal Name Chip Side
1 TD+ 5 LED100/DUP
2 TD- 6 NC
3 2.5V 7 RD+
4 LEDACT 8 RD-
LED Color Usage
Right Yellow Activity
Left Green 100MBits/s (Half/Full duplex)
TD- OutputDifferential signal output. This signal is output from the MCU.
TD+ OutputDifferential signal output. This signal is output from the MCU.
RD- Input Differential signal input. This signal is input for the MCU.
RD+ InputDifferential signal input. This signal is input for the MCU.
Page 20
SD/MMC card slot:
Pin # Signal Name Pin # Signal Name
1 MCIDAT3 2 MCICMD
3 GND (VSS1) 4 VDD
5 MCICLK 6 GND (VSS2)
7 MCIDAT0 8 MCIDAT1
9 MCIDAT2 10 WP
11 - 12 -
13 CP 14 GND
15 GND
MCIDAT0-3 I/O Memory Card Interface Data 0-4. These are the data lines for the SD/MMC connector. They could be both input and output for the MCU depending on the data flow direction.
MCICMD Output Memory Card Interface Command. This is a command sent form the processor to the memory card and as such it is output from the processor.
MCICLK OutputMemory Card Interface Clock. This signal is output from the MCU and synchronizes the data transfer between the memory card and the MCU.
WP Input Write Protect. This signal is input for the MCU.
CP Input Card Present. This signal is input for the MCU.
Page 21
PS2:
Pin # Signal Name
1 KBO_IO
2 NC
3 GND
4 +5V
5 KBO_CLK
6 NC
KBO_IO I/O Keyboard Input/Output. This is the data line between the keyboard and the MCU.
KBO_CLK OutputKeyboard Clock. This is the synchronization clock between the keyboard and the MCU.
IrDA (optional chip):
Pin # Signal Name
1 +3.3V
2 NC
3 GND/TXD3 – look at jumper I2SRX_SDA
4 NC/RXD3 – look at jumper AOUT
5 NC
6 +3.3V
7 NC 3.3V/GND – look at jumper IRDA_LS_E
8 GND
Page 22
MICTOR TRACE (optional):
The MICTOR TRACE connector allows you to trace the execution of the programs.
Page 23
MECHANICAL DIMENSIONS:
All measures are in inches.
AVAILABLE DEMO SOFTWARE :
LPC-2478STK is delivered pre-loaded with C Linux and the sources and binaries are on the accompanying CD.
Page 24
ORDER CODE:
LPC-2478STK – assembled and tested (no kit, no soldering required)
How to purchase? You can order directly from our e-shop or from any of our distributors. Check our web https://www.olimex.com/ for more info.
All boards produced by Olimex are RoHS compliant
Revision history:
REV.B - created November 2009REV.C - released October 2012
Page 25
Disclaimer:
© 2012 Olimex Ltd. Olimex®, logo and combinations thereof, are registered trademarks of Olimex Ltd. Other product names may be trademarks of others and the rights belong to their respective owners.
The information in this document is provided in connection with Olimex products. No license, express or implied or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Olimex products.
It is possible that the pictures in this manual differ from the latest revision of the board.
The product described in this document is subject to continuous development and improvements. All particulars of the product and its use contained in this document are given by OLIMEX in good faith. However all warranties implied or expressed including but not limited to implied warranties of merchantability or fitness for purpose are excluded. This document is intended only to assist the reader in the use of the product. OLIMEX Ltd. shall not be liable for any loss or damage arising from the use of any information in this document or any error or omission in such information or any incorrect use of the product.
This evaluation board/kit is intended for use for engineering development, demonstration, or evaluation purposes only and is not considered by OLIMEX to be a finished end-product fit for general consumer use. Persons handling the product must have electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards.
Olimex currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive. Olimex assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein.
THERE IS NO WARRANTY FOR THE DESIGN MATERIALS AND THE COMPONENTS USED TO CREATE THE PRODUCT THIS MANUAL IS WRITTEN FOR. THEY ARE CONSIDERED SUITABLE ONLY FOR THIS PRODUCT.
Page 26
