UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE...

UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD

In Re: U.S. Patent 7,116,710 : Attorney Docket No. 082944.0102

Inventor: Hui Jin, et. al. :

Filed: May 18, 2001 :

Claimed Priority: May 18, 2000 :

Issued: October 3, 2006 : IPR No. Unassigned

Assignee: California Institute of Technology

Title: Serial Concatenation of Interleaved Convolutional Codes Forming Turbo-Like Codes

Mail Stop PATENT BOARD Patent Trial and Appeal Board U.S. Patent and Trademark Office P.O. Box 1450 Alexandria, Virginia 22313-1450

Submitted Electronically via the Patent Review Processing System

PETITION FOR INTER PARTES REVIEW OF CLAIMS 1, 3, 4, 5, 6, 15, 16, 20, 21, and 22 OF U.S. PATENT NO. 7,116,710 UNDER §§ 42.100 ET SEQ.

BASED ON FREY AS A LEAD REFERENCE

Petition for Inter Partes Review of U.S. Patent No. 7,116,710

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TABLE OF CONTENTS

I. MANDATORY NOTICES, STANDING, AND FEES .................................. 1

II. OVERVIEW OF CHALLENGE AND RELIEF REQUESTED .................... 2

A. Publications Relied Upon ........................................................................ 2

B. Grounds For Challenge ............................................................................ 3

III. OVERVIEW OF THE ’710 PATENT ............................................................ 4

A. Summary of the Claimed Subject Matter ................................................ 4

B. Prosecution History of the ’710 Patent .................................................... 4

IV. SUMMARY OF PRIOR ART ......................................................................... 6

A. State of the Art ......................................................................................... 6

B. Summary of References Relied Upon ..................................................... 9

V. CLAIM CONSTRUCTION .......................................................................... 11

A. Level of Ordinary Skill in the Art .......................................................... 12

B. “Repeating” Terms ................................................................................. 12

C. “Irregularly” ........................................................................................... 13

D. “Interleaving” / “Interleaver” / “Scramble” ........................................... 13

E. “Rate close to one” ................................................................................. 14

F. “Stream” ................................................................................................. 14

VI. A REASONABLE LIKELIHOOD EXISTS THAT THE CHALLENGED CLAIMS ARE UNPATENTABLE .............................................................. 15

A. Ground 1: The ‘710 Patent Claim 1 is Anticipated Under 35 U.S.C. § 102 by Frey ......................................................................................... 15

B. Ground 2: The ‘710 Patent Claims 1, 3, 4, 5, 6, 15, 16, 21 and 22 are Obvious Under 35 U.S.C. § 103 over Frey in view of Divsalar ........... 21


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C. Ground 3: The ‘710 Patent Claims 15, 16, 21, and 22 are Obvious Under 35 U.S.C. § 103 Over Frey in View of Divsalar and in Further View of Hall .............................................................................. 41

D. Ground 4: The ‘710 Patent Claim 20 is Obvious Under 35 U.S.C. § 103 over Frey in View of Divsalar and in further view of Ping ........... 44

E. Ground 5: The ‘710 Patent Claim 20 is Obvious Under 35 U.S.C. § 103 over Frey in View of Divsalar and Ping and in further view of Hall ......................................................................................................... 48

VII. CONCLUSION .............................................................................................. 50


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LIST OF EXHIBITS

1001 U.S. Patent No. 7,116,710 by Hui Jin, et. al. entitled “Serial Concatenation of Interleaved Convolutional Codes Forming Turbo-Like Codes.” (the “’710 Patent”)

1002 Prosecution History of the ’710 Patent







1009 U.S. Provisional Application Ser. No. 60/205,095 by Hui Jin, et. al. (the “’095 Provisional Application”)

1010 Declaration of Henry D. Pfister, Ph.D.

1011 D. Divsalar, H. Jin, and R. J. McEliece, “Coding Theorems for "Turbo-like" Codes.” Proc. 36th Allerton Conf. on Comm., Control and Computing, Allerton, Illinois, pp. 201-210, Sept. 1998 (“Divsalar”) (published no later than April 30, 1999 at the University of Texas library)

1012 B.J. Frey and D.J.C. MacKay, “Irregular Turbocodes.” from the 37th Allerton Conference (“Frey”) (published no later than October 8, 1999 at the website of D.J.C. MacKay)


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1013 E.K. Hall and S.G. Wilson, “Stream-Oriented Turbo Codes.” 48th IEEE Vehicular Technology Conference, pp. 71-76, 1998 (“Hall”) (published no later than June 23, 1998 at the Library of Congress)

1014 L. Ping, W. K. Leung, N. Phamdo, “Low Density Parity Check Codes with Semi-random Parity Check Matrix.” Electron. Letters, Vol. 35, No. 1, pp. 38-39, Jan. 7th, 1999 (“Ping”) (published no later than April 22, 1999 at the Library of Congress)

1015 M. Luby, M. Mitzenmacher, A. Shokrollah, D. Spielman, “Analysis of Low Density Codes and Improved Designs Using Irregular Graphs.” STOC ’98 Proceedings of the Thirtieth Annual ACM symposium on Theory of Computing, pp. 249-258, 1998 (“Luby”) (published no later than July 30, 1998 at the University of Washington)

1016 U.S. Patent No. 6,081,909 by Michael Luby, et. al. entitled “Irregularly Graphed Encoding Technique.” (“the Luby ’909 Patent”) (filed November 6, 1997 and issued June 27, 2000)

1017 F. R. Kschischang and B. J. Frey, “Iterative decoding of compound codes by probability propagation in graphical models.” IEEE Journal on Selected Areas in Communications, 16, 219-230. 1998. (“Kschischang”) (published no later than Febuary 23, 1998 at the Library of Congress)

1018 U.S. Patent No. 7,089,477 by Michael Divsalar, et. al. entitled “Interleaved Serial Concatenation Forming Turbo-Like Codes .” (“the ’477 Patent”)

1019 RA.c code (including RA.c, and supporting files)

1020 J.L. Hennessy and D.A. Patterson, Computer organization and design: the hardware/software interface. 1994. (“Hennessy”) (published no later than November 8, 1994 at the Library of Congress)

1021 Complaint, California Institute of Technology v. Hughes Communications, Inc. et. al., No. 13-CV-07245 (CACD)

1022 Amended Complaint, California Institute of Technology v. Hughes Communications, Inc. et. al., No. 13-CV-07245 (CACD)


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1023 D. J. C. MacKay, S. T. Wilson, and M. C. Davey, “Comparison of Constructions of Irregular Gallager codes.” IEEE Trans. Commun., Vol. 47, No. 10, pp. 1449-1454, Oct. 1999 (“MacKay”) (published no later than December 3, 1999 at the Library of Congress)

1024 Corrected Claim Construction Order (D.I. 105)

1025 Joint Claim Construction and Prehearing Statement (D.I. 60)

1026 Reporter’s Transcript of Claims Construction and Motion Hearing of July 9, 2014

1027 U.S. Patent No. 4,623,999 by Patricia Patterson, entitled “Look-up Table Encoder for Linear Block Codes .” (“the ’999 Patent”) (issued November 18, 1986)

1028 Luby, Mitzenmacher, Shokrollahi, Spielman, and Stemann, “Practical loss-resilient codes” in STOC '97 Proceedings of the twenty-ninth annual ACM symposium on Theory of Computing, 1997

1029 Richardson, Shokrollahi, and Urbanke, “Design of Provably Good Low-Density Parity Check Codes”

1030 Bond, Hui, and Schmidt, “Constructing Low-Density Parity-Check Codes with Circulant Matrices” ITW 1999, Metsovo, Greece (June 27-July 1 1999).

1031 Viterbi and Viterbi, “New results on serial concatenated and accumulated-convolutional turbo code performance” in Annales Des Télécommunications 1999

1032 Benedetto, Divsalar, Montorsi, and Pollara, “Serial concatenation of interleaved codes: Performance analysis, design, and iterative decoding” in IEEE Transactions on Information Theory, Vol. 44 (3), 1998

1033 McEliece, MacKay, and Cheng “Turbo Decoding as an Instance of Pearl’s “Belief Propagation” Algorithm”, as published to http://wol.ra.phy.cam.ac.uk/mackay/, under the filename “BPTD.ps.gz” by August 14, 1997


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1034 B.J. Frey and D.J.C. MacKay, slide presentation entitled “Irregular Turbocodes” presented at the 1999 Allerton Conference held September 22-24, 1999 (Published Sept 22-24, 1999)

1035 B.J. Frey, slide presentation entitled “Irregular Turbocodes” presented at the 2000 ISIT conference, on June 25, 2000 (Published June 25, 2000)

1036 B.J. Frey, slide presentation entitled “Irregular Turbocodes” presented at the Second International Symposium on Turbocodes and Related Topics in Brest, France in September 2000 (Published June 25, 2000)

1037 D.J.C. MacKay, slide presentation entitled “Gallagher Codes-Recent” presented at the 1999 IMA Summer Program at the University of Minnesota in Minneapolis, Minnesota (Published Aug. 3-5, 1999)

1038 Wayback Machine capture of the May 7, 1999 contents of http://wol.ra.phy.cam.ac.uk/mackay/README.html

1039 D. J. C. MacKay, S. T. Wilson, and M. C. Davey, “Comparison of Constructions of Irregular Gallager Codes” as published to http://wol.ra.phy.cam.ac.uk/mackay/, under the filename “ldpc-irreg.ps.gz” on July 30, 1998 (Published July 30, 1998)

1040 Screen capture of last-modified time information of MacKay website content

1041 D. J. C. MacKay, “Gallager codes — Recent Results” as published to http://wol.ra.phy.cam.ac.uk/mackay/, under the filename “sparsecodes.ps.gz” by July 16, 1999 (Published July 16, 1999)

1042 D.J.C. Mackay, Abstract “Gallager Codes — Recent Results” as published to http://vol.ra.phy.com.ac.wh/mackay/ under file name “sparsecodes0.ps.gz by June 2, 1999

1043 D. J. C. MacKay, “Gallager codes — Recent Results.” Proceedings of the International Symposium on Communication Theory and Applications, Ambleside, 1999, ed. by M. D. B. Honary and P. Farrell. Research Studies Press, 1999 (the “Ambleside Presentation”). (published no later than July 16, 1999 at the website of D.J.C. MacKay)


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1044 Portion of electronic log of D.J.C. MacKay dated July 16, 1999

1045 McEliese, et. al., slide presentation entitled “RA” presented at the Institute for Mathematics and its Applications conference on August 3, 1999.

1046 Screen capture of last modified dates of slides from https://www.ima.umn.edu/talks/workshops/aug2-13.99/mackay/mackay.html

1047 B.J. Frey and D.J.C. MacKay, “Irregular Turbocodes.” Proc. 37th Allerton Conf. on Comm., Control and Computing, Monticello, Illinois, Sep. 1999 (published no later than May 11, 2000 at the British Library Boston Spa)

1048 B.J.Frey and D.J.C. MacKay, “Irregular Turbocodes” ISIT 2000 Conference, Sorrento, Italy June 25-30, 2000

1049 D.J.C. MacKay, R.J. McEliece, J-F.Cheng, “Turbo Decoding as an Instance of Pearl’s ‘Belief Propagation’ Algorithm” as appearing on the MacKay websites as of May 7, 1999

1050 D.J.C. MacKay, “Encyclopedia of Sparse Graph Codes” as it appeared on the MacKay websites as of May 7, 1999

1051 D.J.C. MacKay, “Low Density Parity Check Codes over GF(q)” as it appeared on the MacKay websites as of May 7, 1999

1052 D.J.C. MacKay, “Decoding Times of Irregular Gallager Codes” as it appeared on the MacKay websites as of May 7, 1999

1053 D.J.C. MacKay, “Good Error-Correcting Codes Based on Very Sparse Matrices” as it appeared on the MacKay websites as of May 7, 1999

1054 D.J.C. MacKay, “Decoding Times of Repeat-Accumulate Codes” as it appeared on the MacKay websites as of May 7, 1999

1055 B.J. Frey, D.J.C. MacKay, “Trellis-Constrained Codes” as it appeared on the MacKay websites as of May 7, 1999


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1056 D.J.C. MacKay, “Turbo Codes are Low Density Parity Check Codes” as it appeared on the MacKay websites as of May 7, 1999

1057 H. D. Pfister and P. H. Siegel, “The serial concatenation of rate-1 codes through uniform random interleavers.” Proc. 37th Allerton Conf. on Comm., Control and Computing, Monticello, Illinois, pp. 260-269, Sep. 1999 (“Pfister”) (published no later than May 11, 2000 at the British Library Boston Spa)

1058 R. J. McEliece, “Repeat-Accumulate Codes [A Class of Turbo-like Codes that we can analyse].” 1999 Summer Program: Codes, Systems, and Graphical Models, University of Minnesota, Institute for Mathematics and its Applications, Aug. 2-13, 1999 (the “IMA Presentation”).

1059 Declaration of Brendan J. Frey

1060 Declaration of David J.C. Mackay

1061 C. Berrou, A. Glavieux, and P. Thitimajshima, “Near Shannon Limit Error Correcting Coding and Decoding.” IEEE International Conference on Communications, ICC '93 Geneva. Technical Program, Conference Record, (1993)

1062 MacKay and Neal, “Near Shannon Limit Performance of Low Density Parity Check Codes.” Electronic Letters(August 29, 1996)

1063 S. Benedetto , G. Montorsi, “Unveiling Turbo Codes: Some Results on Parallel Concatenated Coding Schemes.” IEEE Transactions on Information Theory, vol. 42, no. 2 (March 1996)

1064 Declaration of Robin Fradenburgh Concerning the “Proceedings, 36th Allerton Conference on Communications, Control, and Computing” Reference

1065 Wayback Machine capture of the December 9, 2006 contents of http://wol.ra.phy.cam.ac.uk/mackay/SourceC.html

1066 E-mail from Paul Siegel to Henry F. Pfister


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I. MANDATORY NOTICES, STANDING, AND FEES

Real Party in Interest: Hughes Network Systems, LLC and Hughes

Communications, Inc. (“Petitioner” or “Hughes”) are the real parties in interest.

Hughes is a provider of broadband satellite services. EchoStar Corporation is the

parent of Hughes Satellite Systems Corporation, which is the parent of Hughes

Communications, Inc.

Related Matters: The ’710 Patent is currently involved in a pending lawsuit

entitled California Institute of Technology v. Hughes Communications, Inc. et. al.,

No. 13-CV-07245 (CACD) (the “Lawsuit”). See Ex. 1015. The Lawsuit

includes the following patents: (i) U.S. Patent No. 7,116,710; (ii) U.S. Patent No.

7,421,032; (iii) U.S. Patent No. 7,916,781; and (iv) U.S. Patent No. 8,284,833.

The complaint was filed on October 1, 2013 and waiver of service was filed on

November 12, 2013. Petitioner is contemporaneously filing petitions for Inter

Partes review for the other patents identified above.

Lead Counsel and Request for Authorization: Pursuant to 37 C.F.R.

§§ 42.8(b)(3) and 42.10(a), Petitioner designates the following: Lead Counsel is

Eliot D. Williams (Reg. No. 50,822) of Baker Botts L.L.P.; Back-up Counsel is G.

Hopkins Guy (Reg. No. 35,886) of Baker Botts L.L.P.

Service Information: Service information is as follows: Baker Botts L.L.P.,

1001 Page Mill Rd., Palo Alto, CA 94304-1007 Tel. 650 739 7500; Fax 650-736-


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7699. Petitioner consents to service by electronic mail at

[email protected] and [email protected]. A Power of

Attorney is filed concurrently herewith under 37 C.F.R. § 42.10(b).

Certification of Grounds for Standing: Petitioner certifies under 37 C.F.R.

§ 42.104(a) that the ’710 Patent is available for inter partes review and that

Petitioner is not barred or estopped from requesting inter partes review on the

grounds set forth herein.

Fees: The Office is authorized to charge the fee set forth in 37 C.F.R.

§ 42.15(a) to Deposit Account No. 02-0384 as well as any additional fees that

might be due in connection with this Petition.

II. OVERVIEW OF CHALLENGE AND RELIEF REQUESTED

Petitioner challenges claims 1, 3, 4, 5, 6, 15, 16, 20, 21, and 22 of U.S.

Patent No. 7,116,710 by Hui Jin, et. al. (“the ’710 Patent”), titled “Serial

Concatenation of Interleaved Convolutional Codes Forming Turbo-Like Codes.”

See Ex. 1001.

A. Publications Relied Upon

Petitioner relies upon the following patents and publications:

Exhibit 1012 - “Irregular Turbocodes” by B.J. Frey and D.J.C. MacKay

(“Frey”), published at least by May 11, 2000 and available as prior art under 35

U.S.C. § 102(a); see also Ex. 1060 at ¶¶ 40-49.


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Exhibit 1011 - “Coding Theorems for "Turbo-like" Codes” by D. Divsalar,

H. Jin, and R. J. McEliece (“Divsalar”), published at least by April 30, 1999 and

available as prior art under 35 U.S.C. § 102(b); see also Ex. 1064.

Exhibit 1013 - “Stream-Oriented Turbo Codes” by E.K. Hall and S.G.

Wilson (“Hall”), published at least by June 23, 1998 and available as prior art

under 35 U.S.C. § 102(a).

Exhibit 1014 - “Low Density Parity Check Codes with Semi-random Parity

Check Matrix” by L. Ping, W. K. Leung, N. Phamdo (“Ping”), published at least

by April 22, 1999 and available as prior art under 35 U.S.C. § 102(b).

Exhibit 1016 - U.S. Patent No. 6,081,909 entitled “Irregularly Graphed

Encoding Technique” by M. Luby, et. al. (“the Luby ’909 Patent”), filed on

November 6, 1997 and issued on June 27, 2000. The Luby ‘909 Patent is

available as prior art under 35 U.S.C. § 102(e).

B. Grounds For Challenge

Petitioner requests cancellation of the claims on the following grounds:

1. Claim 1 is anticipated by Frey.

2. Claims 1, 3, 4, 5, 6, 15, 16, 21, and 22 are obvious over Frey in

view of Divsalar.

3. Claims 15, 16, 21, and 22 are obvious over Frey in view of

Divsalar and Hall.


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4. Claim 20 is obvious over Frey in view of Divsalar and in further

view of Ping.

5. Claim 20 is obvious over Frey in view of Divsalar and Ping and in

further view of Hall.

III. OVERVIEW OF THE ’710 PATENT

A. Summary of the Claimed Subject Matter

The ’710 Patent relates to irregular repeat accumulate (“RA”) coding for

transmission of communication signals. Claims 1, 15 and 16 describe taking data

or information bits (known in claim 1 as “data elements”) and repeating them

irregularly to determine parity bits (which the claims vaguely refer to as a “second

encoding” or a “further encode”). Claims 5 and 22 describes that these parity bits

are generated using accumulation. Claim 6 describes that the irregular encoding

is performed according to a determined profile. Claim 20 describes that the

information bits are repeated using a low-density generator matrix coder.

B. Prosecution History of the ’710 Patent

The application resulting in the ’710 Patent was filed on May 18, 2001, and

claims priority to U.S. Provisional Application Serial No. 60/205,095, filed on

May 18, 2000. Ex. 1001.

The patent examiner initially rejected various claims over U.S. Patent


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6,014,411 to Wang (“Wang”). Ex. 1002 at 58, 61, 63. Applicants thereafter

amended the priority of the pending application to further claim priority from U.S.

Patent Application Ser. No. 09/922,852, filed August 18, 2000, and corrected

informalities. Ex. 1002 at 71. Applicants further argued that Wang did not

disclose or teach one to “‘repeat’ ‘bits irregularly and scramble the repeated bits.’”

Id. at 79. Applicants further argued that “[t]here is no indication in Wang that the

rate r is irregular” and noted that various claims “recite[] that in a first encoding,

bits are repeated ‘irregularly’” or “a different number of times.” Id. at 79.

On March 4, 2005, the patent examiner issued a non-final office action

allowing various claims and objecting to others. Ex. 1002 at 87. The examiner

also rejected various claims over United States Patent 6,396,423 to Laumen

(“Laumen”). Id. at 87, 89. In response, Applicants amended pending claims 15

and 24 to recite “a second coder operative to further encode bits output from the

first coder at a rate close to within 50% of one.” Ex. 1002 at 99. Furthermore,

Applicants argued that because Laumen’s coders 12 are disclosed with

transmission rates of 1/2, 1/3, 1/4, that they are not “close to one.” Id. at 104.

The patent examiner issued a final rejection on July 21, 2005 maintaining

the rejections. Ex. 1002 at 107. Specifically, the patent examiner noted that

“1/2” was within 50% of one. Id. at 110. In response, Applicants amended

claims 15 and 24 to require that “a second coder operative to further encode bits


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output from the first coder at a rate within [[50%]] 10% of one.” Ex. 1002 at 119.

The examiner thereafter issued a notice of allowance. Ex. 1002 at 129. On

February 24, 2006, Applicants submitted a Request for Continued Examination so

that the patent examiner could consider the article "Efficient encoding of low-

density parity check codes," in IEEE Trans. Inform. Theory, 47: 638-656 (February

2001) by T. Richardson and R. Urbanke, which purportedly post-dated the

Applicant’s provisional filing date, and disclosed the use of irregular LDPC codes.

Ex. 1002 at 141. On March 24, 2006, the patent examiner issued a notice of

allowance. Ex. 1002 at 142. Applicants later requested a change in priority to

application 09/922,852 as a continuation-in-part through a certificate of correction.

Ex. 1002 at 165.

IV. SUMMARY OF PRIOR ART

A. State of the Art

The ’710 Patent relates to error detection and correction codes used in

encoding information before transmission as a communication signal over a

communication channel. In particular, the ‘710 patent is directed to irregular

repeat-accumulate (“Irregular RA”) coding techniques. Ex. 1010 at ¶ 34.

During transmission, information contained in communication signals may

be affected by channel noise, leading to potential errors in the information when

received at the receiver. Ex. 1010 at ¶ 15. Accordingly, various coding


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techniques were used in the art to generate parity bits, which are then combined

with the information bits into a codeword that is sent in the communication signal.

Id. The recipient of the codeword uses the parity bits to check the integrity of the

information bits and perform subsequent remedial action, such as error correction,

in order to recover the transmitted information. Id. at ¶¶ 15-20, 130.

One prior art technique for generating parity information based on bipartite

graphs was known as low density parity check (“LDPC”) codes, which were first

introduced by Robert G. Gallager in 1963 and later refined by David J.C. MacKay.

Ex. 1010 at ¶ 25. Another technique, known as repeat/accumulate (“RA”)

encoding, was published by two of the three inventors of the ‘710 Patent in

September 1998, more than one year before the earliest priority claim of the ‘710

Patent. Ex. 1010 at ¶ 31; Ex. 1011. Turbo codes were also known in the prior art.

Ex. 1010 at ¶ 23. One paper, which Patent Owner has attached to and quoted

from in its parallel district court complaint, published by authors that the Patent

Owner has admitted are “experts” in the field, classified LDPC codes, RA codes,

and turbo codes as members of the field of “random-like codes.” Ex. 1022 at ¶ 24

& at p. 88 (hereinafter, the “Roumy paper”).

It was also known that making a coding technique “irregular,” wherein

different message bits contribute to different numbers of parity bits, would

improve performance of coding techniques. Ex. 1010 at ¶¶ 27-28, 32. For


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instance, by 1998 Michael Luby and others investigated whether codes based on

regular graphs would “give rise to codes that are close to optimal” and concluded

that “They do not.” Ex. 1028 at 9. Instead, Luby et al. showed that making

codes irregular yields “much better performance than regular” codes. Ex. 1010.

at ¶ 27; Ex. 1015 at 249; Ex. 1028 at 9. By mid-1999, a paper by Richardson,

Shokrollahi & Urbanke was circulating within the academic community touting

new “results indicating the remarkable performance that can be achieved by

properly chosen irregular codes” Ex. 1010 at ¶¶ 28; Ex. 1029 at 621.1 In August

1999, Dr. David MacKay presented a talk at the IMA academic conference on

sparse graph codes, in the speaking slot directly before one of the named inventors

of the ‘710 patent (McEliece). Ex. 1037 at p. 3. In his slides presented at that

talk, Dr. MacKay showed on one page a graph of a Gallager code, a Repeat-

accumulate code, a turbo code, and a recursive convolutional code. Id. at 42. On

1 A 2001 version of this paper dated after the applicants’ provisional filing date

was disclosed during prosecution. Applicants did not disclose that earlier 1999

versions of this paper were published and well known within the relevant academic

community more than 1 year before the applicant’s priority date. Ex. 1010 at ¶ 28.

By April 5, 1999, the author (Richardson) circulated the paper via Internet link to

colleagues within the academic community by e-mail. Id.


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the very next slide, the suggestion “make irregular” appears as the second bullet

under the heading “Where to go from Regular Gallagher Codes.” Id. at 43. The

immediate juxtaposition of these sparse graph codes, which includes a repeat-

accumulate code, with a suggestion to “make irregular,” demonstrates that a person

of ordinary skill in the art would recognize that irregularity would improve a

repeat-accumulate code. Ex. 1010 at ¶ 125. The McEliece presentation, entitled,

“Repeat Accumulate Codes [A Class of Turbo-Like Codes that we can analyse]”,

at the same IMA conference discussed only repeat-accumulate and did not mention

making them irregular. See Ex. 1045; Ex. 1060 at ¶ 39.

Thus, the prior art provided clear motivation to modify encoding schemes

using irregularity to improve performance. Ex. 1010 at ¶ 32. Indeed, the Roumy

paper, which Patent Owner has featured prominently in its district court complaint,

makes clear that this is exactly what happened -- explaining that this prior work

actually motivated the inventors of the ‘710 Patent to modify the prior art regular

RA codes by introducing irregularity: “The introduction of irregular LDPCs

motivated other schemes such as irregular RA . . . and irregular turbo codes.”

(emphasis supplied) Ex. 1022 at page 88 (Exhibit F therein).

B. Summary of References Relied Upon

Frey (Exhibit 1012)

The Frey reference built upon the work of Luby by applying irregular


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coding techniques to prior art turbocodes. Ex. 1010 at ¶¶ 27, 39. The Frey

reference describes this as “tweaking the regular turbocode originally introduced

by Berrou et al.” Ex. 1012 at 7. This reference graphically depicts a generalized

two-step irregular code involving (1) a permutation and (2) a convolution. Id. at

3-4 (Figs. 1 & 2).

The Luby ‘909 Patent (Ex. 1016)

The Luby ‘909 Patent (Ex. 1016) is a patent corresponding to work by Luby,

Mitzenmacher, Shokrollahi, Spielman, and Stemann that was academically

published in a paper entitled “Practical loss-resilient codes.” This paper discusses

irregularizing low-density parity check codes. See Ex. 1028 at 4 n.2 (“A good

candidate for the code C is the low-density parity check…”). In the Luby paper,

the authors reported on techniques they had developed to analyze regular codes,

and concluded “that they cannot yield codes that are close to optimal. Hence

irregular graphs are a necessary component of our design.” Id. at 2 (emphasis

added). In view of this, the Luby ‘909 Patent describes irregular codes (i.e. codes

based on irregular graphs) and touts their benefits:

[I]rregular graphing of the edges is particularly beneficial for large numbers

of data items. … For example, encoding based upon irregular graphing of

the edges can be used very effectively in high bandwidth video

transmissions.


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Ex. 1016 at 11:42-47.

Divsalar (Exhibit 1011)

The Divsalar reference described a rate-1 “accumulate” convolutional

encoder that was shown to produce useful codes that could be easily decoded.

This type of code is known in the field as a “repeat-accumulate” or “RA” code.

Ex. 1010 at ¶ 34.

Hall (Exhibit 1013)

The Hall reference describes a streaming-oriented turbocode, showing how

to use prior art coding and decoding principles which were traditionally “block

coding” approaches in a streaming paradigm “without explicit block boundaries.”

Ex. 1010 at ¶ 96; Ex. 1013 at 71.

Ping (Exhibit 1014)

The Ping reference discloses using a low-density generator matrix (LDGM)

coder to perform low-density parity check coding. Ex. 1010 at ¶ 105.

V. CLAIM CONSTRUCTION

Claims 1, 3, 4, 5, 6, 15, 16, 20, 21, and 22 of the ’710 Patent are

unpatentable when given their “broadest reasonable construction in light of the

specification.” See 37 C.F.R. § 42.100(b). 2 Consistent with the broadest

2 Petitioner reserves the right to seek different claim constructions than those


12

reasonable standard, claim terms “are generally given their ordinary and customary

meaning,” as understood by “a person of ordinary skill in the art in question at the

time of the invention.” Phillips v. AWH Corp., 415 F.3d 1303, 1312-13 (Fed. Cir.

2005). The claim terms of the ’710 Patent should be given their plain and

ordinary meaning under the “broadest reasonable construction” with the

considerations discussed infra.

A. Level of Ordinary Skill in the Art

A person of ordinary skill in the art would have a very high skill level, and

would have a Ph.D. in electrical or computer engineering with emphasis in signal

processing, communications, or coding, or a master’s degree in the above area with

at least three years of work experience in this field at the time of the alleged

invention. Ex. 1010 at ¶ 43. The patent owner admitted to this level of ordinary

skill in the art in the Lawsuit. Ex. 1026 at 98.

B. “Repeating” Terms

Claim 1 of the ‘710 patent requires, in part, “repeating the data elements.”

Claim 15 requires, in part, that the claimed coder “repeat said stream of bits.” In

the District Court Action, the court held that “the plain meaning of ‘repeat’

determined by the Board or sought herein in a different forum (e.g., District Court)

that applies different standards of proof and analysis.


13

requires the creation of new bits corresponding to or reflecting the value of the

original bits.” Ex 1024 (Corrected Claim Construction Order, D.I. 105) at 10.

Furthermore, the plaintiff in the District Court Action proposed that the ordinary

meaning of the repeat terms was “re-use in forming a code.” Ex. 1025 at 2.

C. “Irregularly”

Claim 15 requires that the coder “repeat said stream of bits irregularly.”

The parties in the District Court Action agreed that the term “irregularly” meant “a

different number of times.” Ex. 1025 at 1. The broadest reasonable interpretation

of these “irregularly” terms would include this definition. Ex. 1010 at ¶ 46.

D. “Interleaving” / “Interleaver” / “Scramble”

Claim 1 requires that the claimed method “interleaving the repeated data

elements in the first encoded data block.” Claim 15 requires that the claimed

coder “said first coder operative to repeat said stream of bits irregularly and

scramble the repeated bits.” Claim 19 depends from claim 15 and further requires

that “wherein the first coder comprises a repeater having a variable rate and an

interleaver.”

The parties in the District Court Action agreed that the terms “interleaving”

and “scramble” meant “changing the order of data element” and the term

“interleaver” meant “module that changes the order of data elements.” Ex. 1025

at 1. The broadest reasonable interpretation of these terms would at least include


14

the agreed definitions. Ex. 1010 at ¶¶ 47-48.

E. “Rate close to one”

Claim 1 requires an encoder rate that is “close to one.” That the “rate” is

“close to one” means that the number of parity bits and information bits for a given

codeword are approximately equal. Ex. 1010 at ¶ 49. The specification states:

“[t]he inner coder 210 can have a rate that is close to 1, e.g., within 50%, more

preferably 10% and perhaps even more preferably within 1% of 1.” Ex. 1001 at

2:61-64. The broadest reasonable interpretation of “close to one,” therefore

includes a coder with a rate of 0.50 or more. Ex. 1010 at ¶ 49.

F. “Stream”

Claim 15 recites that the first coder receives a “stream of bits”. The

broadest reasonable reading of the term to a person of ordinary skill in the art

includes “a sequence of bits.” Ex. 1010 at ¶ 50-51. A narrower definition

occasionally used in the art is discussed in the Hall reference, where a “stream” is

distinguished from “blocks” of data, the boundaries of a data block are not explicit

and the data are “essentially indefinitely long strings.” Ex. 1013 at 71. The

specification is consistent with the broader (i.e. block-based) definition. Ex. 1001

at 2:35-38 (discussing the formatting of “blocks of data” in the context of the

“stream of data”); Ex. 1010 at ¶ 50-51. The broadest reasonable construction of

“stream” is therefore a sequence of bits.


15

VI. A REASONABLE LIKELIHOOD EXISTS THAT THE CHALLENGED CLAIMS ARE UNPATENTABLE

Pursuant to 37 C.F.R. § 42.104(b)(4)-(5), all of the challenged claims are

unpatentable for the reasons set forth in detail below.

A. Ground 1: The ‘710 Patent Claim 1 is Anticipated Under 35 U.S.C. § 102 by Frey

As demonstrated below, each and every element of claim 1 is disclosed by

Frey—thus anticipating the claim.

1. The cited reference combination discloses all limitations

The following chart shows how all elements of claim 1 are disclosed by Frey.

‘710 Claim 1 Frey

1[p]. A method of encoding a signal, comprising:

See, e.g., “We construct irregular turbocodes…bringing the irregular turbocode within 0.3 dB of capacity” Ex. 1012 at 1 (Abstract).

The subject of Frey is the encoding and decoding of error-correcting codes

and it would be clear to a person having ordinary skill in the art that all encoding

methods necessarily perform this step. Ex. 1010 at ¶ 54.

‘710 Claim 1 Frey

1[a] obtaining a block of data in the signal to be encoded;

See, e.g., Ex. 1012 at 4. (the bits f2, f3, ...fD of Figure 2)


16

‘710 Claim 1 Frey

See, e.g., Ex. 1012 at 3. (the circles at the bottom of Figure 1)

The input data bit are the bits f2, f3, . . fD, as shown in in Frey’s Figure 2.

Ex. 1012 at 4. When the system of Frey receives input data bit f2, f3, . . fD, the

system “obtains a block of data in the signal to be encoded.” Ex. 1010 at ¶ 55.

The input bits are also shown as the bottom circles in Figure 1 of Frey. Ex. 1012

at 3; Ex. 1010 at ¶ 55. A person of ordinary skill in the art would interpret the

circles at the bottom of this figure as meeting the broadest reasonable interpretation

of “obtaining a block of data in the signal to be encoded.” Id. at ¶ 56.

Furthermore, it is not possible to perform the encoding and decoding methods of

Frey without first obtaining the block of data in the signal to be encoded. Id. at ¶


17

57. Thus, this limitation is taught in Frey. Id.

‘710 Claim 1 Frey

1[b] partitioning said data block into a plurality of sub-blocks, each sub-block including a plurality of data elements;

See, e.g., Ex. 1012 at 4. (the bits f2, f3, ...fD of Figure 2)

Section 2 in Frey discloses that “[e]ach codeword bit with degree is

repeated times before being fed into the permuter.” Ex. 1012 at 2-3. This

operation is also described graphically by the bottom of Figure 2 in Frey as shown

above. Ex. 1010 at ¶ 58. The figure shows that codeword bits are first

partitioned into multiple sub-blocks (labeled by ) before repeating. Ex.

1012 at 5; Ex. 1010. at ¶ 59. Frey’s partitioning of the codeword bits into

multiple sub-blocks meets the broadest reasonable interpretation of “partitioning

said data block into a plurality of sub-blocks, each sub-block including a plurality

of elements.” Ex. 1010. at ¶ 59.

‘710 Claim 1 Frey

1[d] said first encoding including repeating the data elements in different

See, e.g., Ex. 1012 at 2-3 “Each codeword bit with degree d is repeated d times before being fed into the permuter.”

See, e.g., Ex. 1012 at 4:


18

‘710 Claim 1 Frey

sub-blocks a different number of times;

Section 2 of Frey discloses that “[e]ach codeword bit with degree is

repeated times before being fed into the permuter.” Ex. 1012 at 2-3. The

numbers denote the fraction of bits that are repeated times and the

example described in Section 4 of Frey suggests the choice

. Ex. 1012 at 5-6; Ex.

1010 at ¶60. Frey’s repetition of input data blocks a different number of times,

which is shown graphically in Figure 2 as “Rep 2,” “Rep 3,” . . . “Rep D” blocks

therefore meets the broadest reasonable interpretation of this element. Id.

‘710 Claim 1 Frey

1[e] interleaving the repeated data elements in the first encoded data block;

See, e.g., Ex. 1012 at 2-3, “Each codeword bit with degree d is repeated d times before being fed into the permuter.”

See, e.g., Ex. 1012 at 4, “For d=1,…, D, [a] fraction fd of the codeword bits are repeated d times, permuted and connected to a convolutional code.”; (repeat blocks pass repeated data blocks to the “permuter” block, which interleaves them before passing them to the “convention code” block):


19

‘710 Claim 1 Frey

Frey’s “Permuter” in Figure 2 performs the broadest reasonable

interpretation of this element. Ex. 1010 at ¶ 61. The repeat blocks (“Rep 2,” “Rep

3,” . . . “Rep D) are attached to, and pass repeated data block to the block labeled

“Permuter,” which, in turn, interleaves the bits before passing them to the

“Convolutional code” block. Ex. 1012 at 4; Ex. 1010 at ¶ 62. This is within the

broadest reasonable interpretation of “interleaving the repeated data elements in

the first encoded data block.” Ex. 1010 at ¶ 62.

‘710 Claim 1 Frey

1[f] and second encoding said first encoded data block using an encoder that has a rate close to one

See, e.g., Ex. 1012 at 4, “For d=1,…, D, [a] fraction fd of the codeword bits are repeated d times, permuted and connected to a convolutional code.”

See, e.g., Ex. 1012 at 2, “In particular, if the bits in the convolutional code are partitioned into ‘systematic bits’ and ‘parity bits’, then by connecting each parity bit to a degree 1 codeword bit, we can encode in linear time.”

See, e.g., Ex. 1012 at 5, “[The profile is] giving the required convolutional code rate of R’ - 2/3.”

See, e.g., Ex. 1012 at 5,


20

‘710 Claim 1 Frey

“ ”. (when applied to Equation 9, R’ becomes approximately 0.743.”

Figure 2 of Frey describes a second encoder (i.e. the “convolutional code”)

having a rate close to one. In this context, the “rate” is the ratio of the number of

input bits to output/code bits. Ex. 1010 at ¶ 18. The fifth paragraph of Section 2

in Frey, discusses using the output of the permuter as inputs to a convolutional

encoder. Ex. 1012 at 2; Ex. 1010 at ¶ 63. Thus, a person having ordinary skill in

the art would recognize that the last step in this method of Frey consists of feeding

the repeated bits into a convolutional encoder whose output (or parity) bits are

attached only to degree-1 input bits. Ex. 1010 at ¶ 63. In the second paragraph of

Section 4, Frey states that the convolutional encoder (i.e., second encoding) has

rate . Ex. 1012 at 5. While this is already close to 1, the fourth

paragraph of Section 4 also suggests a second embodiment, where the puncturing

rate is increased with the average repetition rate to keep the overall code (including

both encoding steps) rate at 1/2. Ex. 1010 at ¶ 63. Substituting the numbers

into Equation 9 of Frey,

one finds the rate of the second encoding (convolutional encoder) increases to

. Ex. 1012 at 5-6; Ex. 1010 at ¶ 63. The rate 0.743 is within the

broadest reasonable interpretation of the claimed “second encoding said first


21

encoded data block using an encoder that has a rate close to one.” Ex. 1010 at ¶ 63.

B. Ground 2: The ‘710 Patent Claims 1, 3, 4, 5, 6, 15, 16, 21 and 22 are Obvious Under 35 U.S.C. § 103 over Frey in view of Divsalar

As demonstrated below, each and every element of claims 1, 3, 4, 5, 6, 15,

16, 21 and 22 is disclosed by Frey in view of Divsalar. Petitioner respectfully

submits that claims 1, 3, 4, 5, 6, 15, 16, 21 and 22 are obvious.


The following shows how all elements of claims 1, 3, 4, 5, 6, 15, 16, 21 and

22 are disclosed by the proposed combination. Further explanation with respect

to claim 1 and Frey is discussed above in section VI.A.

‘710 Claim 1 Frey in view of Divsalar

Claim elements 1[p]-1[e]. See discussion of Frey’s applicability to element 1[p] -1[e] in ground 1 supra.

1[f] and second encoding said first encoded data block using an encoder that has a rate close to one

Frey: See, e.g., Ex. 1012 at 4, “For d=1,…, D, [a] fraction fd of the codeword bits are repeated d times, permuted and connected to a convolutional code.”



See, e.g., Ex. 1012 at 5, “

”. (when applied to Equation 9, R’ becomes


22


approximately 0.743.”

Divsalar: See, e.g., Ex. 1011 at 5, “An information block of length N is repeated q times, scrambled by an interleaver of size qN, and then encoded by a rate 1 accumulator.”

As discussed above in section VI.A, Frey alone meets all the limitations of

Claim 1 under the broadest reasonable interpretation of the term “a rate close to

one” which should include Frey’s rate 0.743 encoder. Alternatively, if the Board

disagrees that Frey’s rate 0.743 encoder is not within the broadest reasonable

interpretation of the “a rate close to one” then this limitation is disclosed by

Divsalar. In Divsalar, there is a second encoding with a rate-one second

encoding. Ex. 1010 at ¶ 64. In particular, Divsalar describes “repeat and

accumulate” codes and discloses their encoding process with the statement, “[a]n

information block of length is repeated times, scrambled by an interleaver

of size , and then encoded by a rate 1 accumulator.” Ex 1011 at 5. The

described encoder has two stages of encoding with a second encoding that is rate

one. Divsalar’s RA encoder is shown graphically in Figure 3:


23

Ex 1011 at 5 (Figure 3) (annotated).

Divsalar’s Figure 3 and the associated text explicitly state that the second

encoder is “rate 1.” Because Divsalar’s rate-one encoding accumulator is within

the broadest reasonable interpretation of an encoding with a “rate close to one”, the

combination of Frey with the rate-one seconding encoding of Divsalar discloses all

elements of claim 1. Ex. 1010 at ¶ 65.


3. The method of claim 1, wherein said first encoding is carried out by a first coder with a variable rate less than one, and said second encoding is carried out by a second coder with a rate substantially close to one.




See, e.g., Ex. 1012 at 5 suggests the choice .

(when applied to Equation 9, R’ becomes approximately 0.743.). Ex. 1010 at ¶ 63.

See, e.g., Ex. 1011 at 5, “An information block of length N is repeated q times, scrambled by an interleaver of size qN, and then encoded by a rate 1 accumulator.”; Figure 3:


24



4. The method of claim 3, wherein the second coder comprises an accumulator.

See, e.g., Ex. 1012 at 4 (convolutional code)

See, e.g., Ex. 1012 at 3, (open circles performing convolutional code on data output from the permuter)



25


Section 2 of Frey discloses that “[e]ach codeword bit with degree is

repeated times before being fed into the permuter.” Ex. 1012 at 2-3. The

numbers denote the fraction of bits that are repeated times and the

example described in Section 4 of Frey suggests the choice

. Id.; Ex. 1010 at ¶ 69.

Because the number of output bits from the repeaters is greater than the number of

input bits in all instances, the rate of the “first coder,” which includes the repeaters,

is less than one by definition. Ex. 1010 at ¶ 69. This limitation is further

disclosed by Frey’s figure 1, which repeats input bits a different number of times

before passing those repeated input bits to a permuter, as shown in the annotated

figure below:


26

Ex. 1012 at 3. The rate of the coder defined by the repetition of the input bits a

variable number of times is less than one because some input bits are repeated at

least two times. Ex. 1010 at ¶ 70. Frey therefore discloses “wherein said first

encoding is carried out by a first coder with a variable rate less than one.”

As discussed above in section VI.A within the context of claim 1 (limitation

1[f]), Frey discloses a second encoding having rate . Ex. 1012 at 5-

6; Ex. 1010 at ¶ 63. The rate 0.743 is within the broadest reasonable

interpretation of the claimed “second encoding is carried out by a second coder

with a rate substantially close to one.” Ex. 1010 at ¶ 63.

If the Board finds that Frey’s rate 0.743 is not within the broadest reasonable

interpretation of the claimed “rate substantially close to one,” then this limitation is

met by Divsalar’s rate-1 accumulator. See, e.g., Ex. 1010 at 63-65; discussion

supra in section VI.B.1 (within the context of Claim 1 and limitation 1[f]).

Claim 4 depends from claim 3 and adds the limitation “wherein the second

encoder comprises an accumulator.” Frey’s disclosure of a “convolutional code,”

(for example, in Figure 2) is within the broadest reasonable interpretation of the


27

claimed accumulator. Ex. 1012 at 3; Ex. 1010 at ¶ 74. Because an accumulator is

a very simple “convolutional code,” a person of ordinary skill in the art would

consider Frey's “convolutional code” to be within the broadest reasonable

interpretation of claims 4’s “accumulator.” Ex. 1010 at ¶¶ 30, 74.

The claimed “accumulator” is also disclosed in Figure 1 of Frey. Ex. 1012 at

3; Ex. 1010 at ¶ 75. The open circles above the permuter in Figure 1 perform a

convolutional code on data output from the permuter. Ex. 1010 at ¶ 76. The

caption to Figure 1 states that the “code copies the systematic bits, permutes both

sets of these bits and then feeds them into a convolutional code.” Ex. 1012 at 2.

The open circles above the permuter in Figure 1 depict the performance of a

convolutional code. Ex. 1010 at ¶ 76. The simplest recursive convolutional code

is an accumulator, such as the one shown in Divsalar. Ex. 1010 at ¶ 76. In other

words, because an accumulator is a very simple convolutional code, a person of

ordinary skill in the art would consider Frey’s convolutional code to be within the

broadest reasonable interpretation of an “accumulator.” ; Ex. 1010 at ¶¶ 74, 76.

The claimed “accumulator” is also disclosed in Divsalar by the rate-1

accumulator. Ex. 1011 at 5; Ex. 1010 at ¶¶ 76-77.


5. The method of claim 4, wherein the data elements comprises

See, e.g., Ex. 1012 at 2-3 “Each codeword bit with degree d is repeated d times before being fed into the


28


bits. permuter.”


6. The method of claim 5, wherein the first coder comprises a repeater operable to repeat different sub-blocks a different number of times in response to a selected degree profile.


See, e.g., Ex. 1012 at 5, “Finding a good profile...”

Claim 5 depends from claim 4 and adds the limitation that “wherein the data

elements comprises bits” which are taught by Frey and Divsalar. Ex. 1010 at ¶

78. Claim 6 depends from claim 5 and adds the limitation that “wherein the first

coder comprises a repeater operable to repeat different sub-blocks a different

number of times in response to a selected degree profile.” Section 2 in Frey

discloses that “[e]ach codeword bit with degree is repeated times before

being fed into the permuter.” Ex. 1012 at 2-3. This operation is also described

graphically by the bottom of Figure 2 in Frey (shown above). The figure shows

that codeword bits are first partitioned into multiple sub-blocks (labeled

by ) before repeating. Ex. 1012 at 2-3; Ex. 1010 at ¶ 81. Section 2 of


29

Frey discloses that “[e]ach codeword bit with degree is repeated times

before being fed into the permuter.” Ex. 1012 at 2-3. The numbers

denote the fraction of bits that are repeated times and the example described in

Section 4 of Frey suggests the choice

Ex. 1012 at 5-6; Ex. 1010 at ¶ 81. Frey therefore discloses that “the data

elements comprises bits.” Ex. 1010 at ¶ 81. The encoder of Divsalar is also for

encoding data in the form of bits. Ex. 1011 at 5.

Frey’s repetition of a selected fraction of input bits a different number of

times, which is shown graphically in Figure 2 as “Rep 2,” “Rep 3,” . . . “Rep D”

blocks, meets the broadest reasonable interpretation of “wherein the first coder

comprises a repeater operable to repeat different sub-blocks a different number of

times in response to a selected degree profile.” Ex. 1010 at ¶¶ 81-82.

‘710 Claim 15 Frey in View of Divsalar

15[p]. A coder comprising:

See, e.g., Ex. 1012 at 2 “This can be done by puncturing the convolutional code or by designing a new, higher rate convolutional code.”

See, e.g., Ex. 1011 at 1 “we discuss …coding systems which are built from fixed convolutional codes…”

To the extent that the preamble of this claim is limiting, Frey’s turbocode is

an encoder and therefore meets this limitation. Ex. 1012 at 2-3; Ex. 1010 at ¶ 84.

Divsalar’s RA code also meets this limitation. Ex. 1011 at 5; Ex. 1010 at ¶ 84.


30


15[a] a first coder having an input configured to receive a stream of bits,

See, e.g., Ex. 1012 at 4 (“input configured to receive a stream of bits” step as part of encoding or decoding. The input data bit are the bits f2, f3, . . fD, as show in in Figure 2); Figure 2.

See, e.g., Ex. 1012 at 3 (input bits as circles at the bottom of Figure 1)



31

The specification of the ‘710 patent provides no instruction on what

constitutes a “stream of bits.” Instead, the specification uses the term “stream”

twice without offering any special meaning for the term “stream.” At 2:3-5, the

specification states “[t]he inner coder may include one or more accumulators that

perform recursive modulo two addition operations on the input bit stream.” At

2:35-38, the specification states “[t]he coder may be used to format blocks of data

for transmission, introducing redundancy into the stream of data to protect the data

from loss due to transmission errors.” The prior art references show that “stream”

of data generally refers to sequence of bits. For example, the Luby ‘909 Patent

uses the term to refer to data that is transmitted over the Internet. Ex. 1016 at 1:12-

15. Under this interpretation of “stream,” Frey discloses “a first coder having an

input configured to receive a stream of bits, said first coder operative to repeat said

stream of bits irregularly and scramble the repeated bits.” Ex. 1010 at ¶ 85. The

subject of Frey is the encoding and decoding of error-correcting codes and it would

be clear to a person having ordinary skill in the art that encoders and decoders,

such as Frey’s, have “input configured to receive a stream of bits” step as part of

encoding or decoding. Id.

The input data bit are the bits f2, f3, . . fD, as shown in in Figure 2 of Frey

above. Ex. 1010 at ¶ 85. Because the system of Frey receives input data bit f2,

f3, . . fD, the system of Frey has “an input configured to receive a stream of bits,”


32

within the broadest reasonable interpretation of that term. Id. at ¶ 86. The input bits

are also shown as the bottom circles in Figure 1 of Frey as shown above. A

person of ordinary skill in the art would interpret the circles at the bottom of this

figure as meeting the broadest reasonable interpretation of “an input configured to

receive a stream of bits.” Id. at ¶ 87.

Divsalar receives an information block of length N. Ex. 1011 at 5.

Because the system of Divsalar receives information block of length N, Divsalar

has “an input configured to receive a stream of bits,” within the broadest

reasonable interpretation of that term. Ex. 1010 at ¶ 142.

Furthermore, it is not possible to perform the encoding and decoding

methods of Frey or Divsalar without having an input configured to receive a

stream of bits. Ex. 1010 at ¶ 88. Thus, this limitation is present in any method

of block encoding, including the methods of encoding disclosed in Frey or

Divsalar. Id.


15[b] said first coder operative to repeat said stream of bits irregularly and scramble the repeated bits; and


See, e.g., Ex. 1012 at 4 (Figure 2):


33


The first limitation further requires that the “first coder [is] operative to

repeat said stream of bits irregularly and scramble the repeated bits.” This

limitation is met by Frey’s irregular repetition of input bits and subsequent

permutation of those repeated bits. Ex. 1010 at ¶ 89. Section 2 in Frey discloses

that “[e]ach codeword bit with degree is repeated times before being fed into

the permuter.” Ex. 1012 at 2-3.

This operation is also described graphically by the bottom of Figure 2 in

Frey as shown above. Ex. 1010 at ¶ 89. The figure shows that codeword bits are

first partitioned into multiple sub-blocks (labeled by ) before repeating.

Ex. 1012 at 4; Ex. 1010 at ¶ 89. Section 2 of Frey discloses that “[e]ach

codeword bit with degree is repeated times before being fed into the

permuter.” Ex. 1012 at 2-3. The numbers denote the fraction of bits

that are repeated times and the example described in Section 4 of Frey suggests

the choice


34

Ex. 1012 at 5-6; Ex. 1010 at ¶ 90. Frey’s repetition of input data blocks a

different number of times, which is shown graphically in Figure 2 as “Rep 2,”

“Rep 3,” . . . “Rep D” blocks, therefore meets the broadest reasonable

interpretation of “repeat said stream of bits irregularly.” Ex. 1010 at ¶ 90. Frey’s

“Permuter” in Figure 2 performs the broadest reasonable interpretation of

“scramble the repeated bits.” Id. at ¶ 91. The repetition of input bits and

permutation of the repeated input bits is also shown in Figure 1 of Frey as the

bottom circles. Id.

A person of ordinary skill in the art would interpret Figure 1 as disclosing

the broadest reasonable interpretation of a “a first coder having an input configured

to receive a stream of bits, said first encoder operative to repeat said stream of bits

irregularly and scramble the repeated bits,” as required by claim 15. Ex. 1010 at ¶

92.


15[c] a second coder operative to further encode bits output from the first coder at a rate within 10% of one.




35



See, e.g., Ex. 1012 at 5, “ ”. (when applied to Equation 9, R’ becomes approximately 0.743.”


Claim 15 further requires “a second coder operative to further encode bits

output from the first coder at a rate within 10% of one.” As discussed above, the

“convolution code” of Frey may be adjusted to have a rate around 0.74, which is

not literally within 10% of one. Divsalar, however, discloses a second coder

which is an accumulator with a rate of 1. Ex. 1010 at ¶ 93. In particular,

Divsalar describes “repeat and accumulate” codes and discloses their encoding

process with the statement, “[a]n information block of length is repeated

times, scrambled by an interleaver of size , and then encoded by a rate 1

accumulator.” Ex. 1011 at 5; Ex. 1010 at ¶ 94. The described encoder has two


36

stages of encoding with a second encoding that is rate one. Ex. 1010 at ¶ 94.

Divsalar’s RA encoder is shown graphically in Figure 3 as reproduced above. The

combination of Frey with the rate-one second encoding of Divsalar discloses all

elements of claim 15. Ex. 1010 at ¶ 94.


16. The coder of claim 15, wherein the stream of bits includes a data block, and wherein the first coder is operative to apportion said data block into a plurality of sub-blocks and to repeat bits in each sub-block a number of times, wherein bits in different sub-blocks are repeated a different number of times.

See, e.g., Ex. 1012 at 2 “Each codeword bit with degree d is repeated d times before being fed into the permuter.”



This limitation is disclosed by Frey. Section 2 in Frey describes how

“[e]ach codeword bit with degree is repeated times before being fed into the

permuter.” Ex. 1012 at 2. This is describing a process where the codeword bits


37

are apportioned into multiple sub-blocks (by degree) and then the bits in each

subgroup are repeated a different number of times. Ex. 1010 at ¶ 100. That is,

the codeword bits that are to be repeated twice are a first sub-block of two or more

bits, the codeword bits that are to be repeated twice are a second sub-block of two

or more bits, and the codeword bits that are to be repeated D times are yet another

sub-block of two or more bits. Id. This is further shown graphically by Figure 2

of Frey above.

This limitation is further disclosed by Frey’s Figure 1, which repeats input

bits a different number of times before passing those repeated input bits to a

permuter, as detailed above. Ex. 1010 at ¶ 101.


21. The coder of claim 15, wherein the second coder comprises a rate 1 linear encoder.

See, e.g., Ex. 1011 at 5, “An information block of length N is repeated q times, scrambled by an interleaver of size qN, and then encoded by a rate 1 accumulator.”; (Figure 3):


22. The coder of claim 21, wherein the second coder comprises an accumulator

See, e.g., Ex. 1012 at 4 (convolutional code)


38


See, e.g., Ex. 1012 at 3, (open circles performing convolutional code on data output from the permuter)

Divsalar’s RA encoder is shown graphically in Figure 3 and reproduced

above. Divsalar’s figure 3 and the associated text explicitly state that the second

encoder is “rate 1.” Because Divsalar’s rate-one encoding accumulator is within

the broadest reasonable interpretation of a coder with a “second coder [that]

comprises a rate 1 linear encoder.”, the combination of Frey with the rate-one

seconding encoding of Divsalar discloses all elements of claim 21. Ex. 1010 at

¶¶ 110-111.

The further limitation of claim 22 is disclosed by Divsalar’s accumulator.

Ex. 1011 at 5; Ex. 1010 at ¶ 112.

2. One of skill in the art would be motivated to combine the references

A person of ordinary skill in the art would have been motivated to combine


39

the teachings of Frey and Divsalar because such a combination would produce a

predictable result, would produce an improved performing code requiring lower

complexity, and the combination would be obvious to try. Ex. 1010 at ¶¶ 66-67.

Frey (as well as the knowledge of one skilled in the art discussed above)

shows that adding irregularity to codes, such as the turbo-like codes of Divsalar,

improves their performance. Supra section IV.A; Ex. 1010 at ¶ 66. In general,

one of ordinary skill in the art would be motivated to modify the known regular

repeat-accumulate codes of Divsalar with the known improvement in Frey of

“tweaking” codes to make them “irregular.” Ex. 1010 at ¶ 67; Ex.1012 at 6.

The two topics were presented consecutively at the IMA conference. Ex. 1037 at

p. 3. While Frey discloses a coding rate of approximately 0.76, Divsalar shows

that using a rate-1 second encoding for a turbo-like code provides lower

complexity. Ex. 1010 at ¶ 66; See, e.g., Ex 1012 at 6 (describing how an

“irregular turbocode clearly performs better than the regular turbo code for BER >

10-4.”); Ex. 1011 at 5 (describing the RA code as a “simple” turbo-like code).

Similarly, because a rate 1 accumulator is the simplest non-trivial recursive

convolutional code, using the Divsalar rate 1 accumulator as an implementation of

the “convolutional code” of Frey is an obvious choice to one skilled in the art. Ex.

1010 at ¶¶ 30, 76; see also Ex. 1059 (Frey Decl.) at ¶ ¶ 20, 23-25. Combining

these aspects of Frey and Divsalar yields an irregular turbo-like code with a rate-1


40

second encoding. Ex. 1010 at ¶ 66; see also Ex. 1059 (Frey Decl.) at ¶ ¶ 20, 23-

25. Furthermore, it was predictable from the cited prior art that such a

combination would provide improved performance and lower complexity. Ex.

1010 at ¶ 66. Any performance improvement (or complexity reduction) to the

“general irregular turbocode” code in Frey due to increasing the rate of the second

encoder was therefore predictable based on the general knowledge in the art. Id.

Furthermore, Frey and Divsalar are in the same field of inquiry and are

directed towards solving the same problem. Ex. 1010 at ¶ 67. For example,

Divsalar states that “[i]n this section we will introduce a class of turbo-like codes

which are simple enough …. We call these codes repeat and accumulate (RA)

codes.” Ex. 1011 at 5. Frey states that “[i]n this paper, we show that by tweaking

a turbo code so that it is irregular, we obtain a coding gain of 0.15 dB for

N=131,072.” Ex. 1012 at 6. From this, it is clear that both papers study

generalizations of turbo codes. Ex. 1010 at 67. Both Frey and Divsalar

demonstrate their results using bit-error rate curves (e.g., Ex. 1011, Figure 5 in

Divsalar and Ex. 1012, Figure 4 in Frey). Ex. 1010 at 67. These curves show the

error rate of the communication system as a function of the signal-to-noise ratio are

used to compare systems and choose the better system. Id. Thus, both references

are directed towards improved coding systems. Id. The references themselves

suggest the use of rate-1 encodings and a practitioner having ordinary skill in the


41

art would have been aware that this change could improve performance and/or

lower complexity. Id. Thus, it would have been obvious to a person having

ordinary skill in the art to use an encoding rate of one for the second encoder. Id.

C. Ground 3: The ‘710 Patent Claims 15, 16, 21, and 22 are Obvious Under 35 U.S.C. § 103 Over Frey in View of Divsalar and in Further View of Hall

As demonstrated below and in the claim charts of section VI.B.1, supra,

each and every element of claims 15, 16, 21, and 22 is disclosed by Frey in view of

Divsalar and in further view of Hall. This ground is presented in the unlikely

event the Board construes “stream” in the narrower manner that the term is used in

the Hall reference, rather under what petitioner contends is the broadest reasonable

construction.


The first limitation of claim 15 is “a first coder having an input configured to

receive a stream of bits, said first encoder operative to repeat said stream of bits

irregularly and scramble the repeated bits.” Frey in view of Divsalar discloses

this limitation as described above in section VI.B.1.

If, however, the Board adopts a narrower construction of “stream,” then Hall

discloses “streaming-oriented turbo codes” by replacing the block permuter of

Divsalar by a convolutional interleaver. Ex. 1007 at 71. Section I of Hall states

that turbo codes “have been traditionally viewed as a block coding technique.


42

With this viewpoint, research has focused on the block interleaver design and

block decoding architectures. In this paper, we explore a stream encoding

paradigm, without explicit block boundaries.” Id. The benefits of stream-oriented

turbo codes are described in Hall. Ex. 1010 at ¶ 96. Section 6 of Hall states that

“[c]onvolutional interleavers were shown to be attractive for low decoding latency

applications, and with higher delay, provide a structured interleaving option with

near-capacity performance.” Ex. 1007 at 76.

The limitation further requires that the “first coder [is] operative to repeat

said stream of bits irregularly and scramble the repeated bits.” Frey in view of

Divsalar discloses this limitation as described above in section VI.B.1.

Claim 15 further requires “a second coder operative to further encode bits

output from the first coder at a rate within 10% of one.” Frey in view of Divsalar

discloses this limitation as described above in section VI.B.1.

Claim 16 is depends from claim 15 and adds the limitation that “wherein the

stream of bits includes a data block, and wherein the first coder is operative to

apportion said data block into a plurality of sub-blocks and to repeat bits in each

sub-block a number of times, wherein bits in different sub-blocks are repeated a

different number of times.” Frey in view of Divsalar discloses this limitation as

described above in section VI.B.1.

Claim 21 depends from claim 15 and further requires, “wherein the second


43

coder comprises a rate 1 linear encoder.” Divsalar’s accumulator is a rate 1 linear

encoder. Frey in view of Divsalar discloses this limitation as described above in

section VI.B.1.

Claim 22 depends from claim 21 and further requires, “wherein the second

coder comprises an accumulator.” Frey in view of Divsalar discloses this

limitation as described above in section VI.B.1.



Frey, Divsalar, and Hall. First, one of skill in the art would have been motivated

to combine Frey with Divsalar for at least the reasons discussed above in section

VI.B.2. Furthermore, one of skill in the art would have been motivated to

combine these with Hall because it would be obvious to a person having ordinary

skill in art that the encoder in Frey or the “repeat and accumulate” codes in

Divsalar could implemented in a streaming fashion by replacing the permutation

block in Figure 1 or 2 of Frey with a convolutional interleaver. Ex. 1010 at ¶ 97.

Any improvement to the latency or performance of codes due to stream encoding is

therefore predictable based on the general knowledge in the art. Id. These

references are in the same field of inquiry and are directed towards solving the

same problem. Id. The references themselves suggest the use of streaming to

improve performance and a practitioner having ordinary skill in the art would have


44

been aware of the benefits and drawbacks of streaming operation as discussed in

Hall. Id.

In addition, based on Hall, it would be obvious to a person having ordinary

skill in art that the “repeat and accumulate” codes in Divsalar could be

implemented in a streaming fashion by replacing the permutation block in Figure 3

of Divsalar by a convolutional interleaver. Ex. 1010 at ¶ 98. Any improvement to

the latency or performance of the “repeat and accumulate” codes due to stream

encoding is therefore predictable based on the general knowledge in the art. Id.

These references are in the same field of inquiry and are directed towards solving

the same problem. Id. The references themselves suggest the use of streaming to



Hall. Id.

D. Ground 4: The ‘710 Patent Claim 20 is Obvious Under 35 U.S.C. § 103 over Frey in View of Divsalar and in further view of Ping

Claim 15, from which claim 20 depends, is disclosed by the combination of

Frey in view of Divsalar as shown above in section VI.B.1. The following chart

shows how all elements of claim 20 are disclosed by the proposed combination by

further reference to Ping.



45

‘710 Claim 20 Frey in View Divsalar and in Further View of Ping

20. The coder of claim 15, wherein the first coder comprises a low-density generator matrix coder.

See. e.g., Ping Ex. 1014 at 38 “An LDPC code is defined from a randomly generated parity check matrix H...In this Letter, we report a modified approach to LDPC code design. We adopt a semi-random technique, i.e. only part of H is generated randomly, and the remaining part is deterministic. The new method can achieve essentially the same performance as the standard LDPC encoding method with significantly reduced complexity.”

“Based on eqns. 1 and 2, p = {pi}can easily be calculated from a given d = {di} as

and . (mod 2)(4)”

The ’710 Patent includes an embodiment where the repeater and interleaver

are replaced with a low-density generator matrix coder, in Figure. 4.

In Figure 4 of the ’710 Patent (shown above), no interleaver is shown for the

embodiment with an LDGM code. The ‘710 patent at 3:57-59 states that “[t]he

interleaver 204 in FIGURE 2 may be excluded due to the randomness already

present in the structure of the LDGM code.”

Ping discloses a low-density generator matrix coder. Ex. 1010 at ¶ 105.

The low-density generator matrix of Ping is not irregular. That is, the low-

density generator matrix of Ping does not include “first coder operative to repeat


46

said stream of bits irregularly,” as required by claim 15. Frey teaches that

regular codes can be improved by the use different input bits different number of

times. See section VI.B.2; Ex. 1010 at ¶ 105. A person of ordinary skill in the art

would modify the low-density generator matrix of Ping by making the matrix

irregular. Ex. 1010 at ¶ 105.

To show this, a mathematical definition of LDGM codes may be considered.

Ex. 1010 at ¶ 106. This is given by basic coding theory under the assumption that

the generator matrix is sparse (or low density). Id. Thus, the modulo-2

sum defines a mapping from an information vector

to a codeword . Id. This is called a regular LDGM

code if all rows of have the same number of ones and all columns of have

the same number of ones. Id. Likewise, the output of an

accumulator with input is defined by for

where . Id.

The encoder of claim 20 is shown in Figure 4 of the ‘710 patent (shown

above). Using the above notation and this Figure, we observe that the input

would be mapped to the pair of outputs and

. Ex. 1010 at ¶ 107. If a systematic code is desired, then both

sequences are used; otherwise, only the sequence is used. Id.

To see that Ping discloses all elements except for irregularity, it should be


47

shown that the equations in Ping are mathematically identical to the encoding

equations above. Ex. 1010 at ¶ 108. Ping states that “the codeword as

where and contain parity and information bits, respectively.”

Ex. 1014 at 38. Using for the information bits and

for the parity bits, Equation 4 in Ping defines the encoder

with the two modulo-2 sums: and . Id.; Ex.

1010 at ¶108. In Ping, the matrix is random matrix with ones per column

and ones per row. Ex. 1014 at 38; Ex. 1010 at ¶108. Based on the equation

, we see that is the generator matrix of a regular LDGM code. Ex.

1010 at ¶108. If , then is output of the LDGM

encoder and is the output of an accumulator with input

Id. By relabeling , , and and comparing

with the previous two paragraphs, one can see that Ping’s Equation 4 is

mathematically identical to the combination of a LDGM encoder and accumulator.

Id.



Frey, Divsalar, and Ping, rendering claim 20 obvious. Motivations to combine

Frey and Divsalar are discussed supra in connection with Ground 2. Furthermore,


48

a person of ordinary skill in the art would have been motivated to combine these

with Ping by modifying Ping’s encoding system to use an irregular LDGM code

based on the teaching of Frey as well as the background prior art, which taught the

benefits of irregularizing codes. Ex. 1010 at ¶ 168. For example, the abstract of

Ping states that “[a] semi-random approach to low density parity check code

design is shown to achieve essentially the same performance as an existing method,

but with considerably reduced complexity.” Ex. 1014 at 38. As discussed

previously, both Frey and Divsalar are directed to improved method of coding and

decoding information. The combination of Ping with Frey and Divsalar produces a

predictable result. Ex. 1010 at ¶ 168. Any improvement to the Ping code due to

irregularity was therefore predictable based on the general knowledge in the art. Id.

A person of ordinary skill in the art would have been motivated to combine these

references because those in the field of coding theory had recognized the general

improvement that irregularity adds to an existing non-irregular code. Id. The

references themselves suggest the use of irregularity to improve a code. Id. One in

the field would understand the advantages of making a code irregular. Id.

E. Ground 5: The ‘710 Patent Claim 20 is Obvious Under 35 U.S.C. § 103 over Frey in View of Divsalar and Ping and in further view of Hall

This ground is presented in the unlikely event the Board construes “stream”

in the narrower manner that the term is used in the Hall reference, rather under

what petitioner contends is the broadest reasonable construction.


49


As explained above in Ground 4, claim 20 is obvious over Frey in view of

Divsalar and Ping. If, however, the Board adopts a narrower construction of

“stream,” then Hall discloses “streaming-oriented turbo codes” by replacing the

block permuter of Divsalar by a convolutional interleaver. Ex. 1007 at 71.

Section I of Hall states that turbo codes “have been traditionally viewed as a block

coding technique. With this viewpoint, research has focused on the block

interleaver design and block decoding architectures. In this paper, we explore a

stream encoding paradigm, without explicit block boundaries.” Id. The benefits

of stream-oriented turbo codes are described in Hall. Ex. 1010 at ¶ 96. Section 6

of Hall states that “[c]onvolutional interleavers were shown to be attractive for low

decoding latency applications, and with higher delay, provide a structured

interleaving option with near-capacity performance.” Ex. 1007 at 76.



Frey, Divsalar, Hall, and Ping, rendering claim 20 obvious. Motivations to

combine Frey, Divsalar, and Ping are discussed supra in connection with Ground

4.

Furthermore, as discussed above in connection with Ground 3, one of skill in

the art would have been motivated to combine these with Hall because it would be


50

obvious to a person having ordinary skill in art that the encoder in Frey could

implemented in a streaming fashion by replacing the permutation block in Figure 1

or 2 of Frey with a convolutional interleaver. Ex. 1010 at ¶ 97. In addition, based

on Hall, it would be obvious to a person having ordinary skill in art that the “repeat

and accumulate” codes in Divsalar could be implemented in a streaming fashion

by replacing the permutation block in Figure 3 of Divsalar by a convolutional

interleaver. Ex. 1010 at ¶ 98.

Any improvement to the latency or performance of codes due to stream

encoding is therefore predictable based on the general knowledge in the art. Id.

These references are in the same field of inquiry and are directed towards solving

the same problem. Id. The references themselves suggest the use of streaming to



Hall. Id.

VII. CONCLUSION

Petitioner respectfully requests that inter partes review of the ’710 Patent be

instituted and that claims , 3, 4, 5, 6, 15, 16, 21 and 22 be cancelled as unpatentable

under 35 U.S.C. § 318(b).


51

Respectfully submitted,

BAKER BOTTS L.L.P.

October 14, 2014 _/Eliot D. Williams/___________________

Date Eliot D. Williams (Reg. No. 50,822) G. Hopkins Guy III (Reg. No. 35,866)

1001 Page Mill Road, Bld. 1, Suite 200 Palo Alto, California 94304-1007 650.739.7510 Attorneys for Petitioner, Hughes Network Systems, L.L.C. and Hughes Communications, Inc.

CERTIFICATE OF SERVICE

In accordance with 37 C.F.R. §§ 42.6(e) and 42.105, the undersigned

certifies that on the 14th day of October, 2014, a complete and entire copy of the

PETITION FOR INTER PARTES REVIEW OF CLAIMS 1, 3, 4, 5, 6, 15, 16,

20, 21, and 22 OF U.S. PATENT NO. 7,116,710 UNDER §§ 42.100 ET SEQ.

BASED ON FREY AS A LEAD REFERENCE (“petition”) including exhibits

and testimony relied upon were served on the patent owner at the correspondence

address of record for the subject patent,

California Institute of Technology 1200 E.California Blvd.

M/C 201-85 Pasadena, CA 91125

via Express Mail and to counsel for patent owner in the Lawsuit,

Quinn Emanuel Urquhart & Sullivan, LLP James R. Aspberger

865 S. Figueroa St., 10th Floor Los Angeles, California 90017

via Express Mail.

October 14, 2014 __/Eliot D. Williams/________________

Date Eliot D. Williams (Reg. No. 50,822) G. Hopkins Guy III (Reg. No. 35,866)

1001 Page Mill Road, Bld. 1, Suite 200 Palo Alto, California 94304-1007 650.739.7510 Attorneys for Petitioner, Hughes Network

2

Systems, L.L.C. and Hughes Communications, Inc.

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