Unit II:- LOGIC GATESThe logic gate is an electronics ckts. Which

makes logical decisions. It has one output & one or more inputs. The output signal appears only for certain combination of input signals. Logic gates are the building blocks from which most of the digital systems are build up.

Positive & Negative Logic:-The computing systems, the symbol 0 & 1 represents two possible state of a ckt. or device. When voltage levels are used, this methods are possible , positive logic & negative logic.

In positive logic the more positive of the two voltage levels represent the 1, while in negative logic the more negative voltage levels represent the 1 .

Suppose a digital system has voltage level of +5V and 0V. Now if we say 1 stands for +5V and 0 for 0V then the system becomes a positive logic system. On the other hand,if we say 1 stands for 0V and 0 for +5V then it represents a negative logic system.

For example:-

i)Positive logic system.

(a) 5V=1 & 0V=0.

(b) -4V=1 & -10V=0.

ii) Negative logic system:-

(a) -8V=1 & -2V=0.

(b) 0V=1 & 10V=0.

1) The OR gate :-

The OR gate is one of the fundamental basic gate. The OR gate has two or more inputs signal but only one output signal. The output voltage is high if any one or all of the input voltage are high.

Y=A+B

Fig:- Logic symbol of OR gate

Truth Table of OR gate

Input A Input B Output (Y=A+B)

0 0 0

0 1 1

1 0 1

1 1 1

A Y Y

B Y . .

Fig:-OR gate using Diode & Resistor

Above fig. shows two input OR gate by using diode & resistor.

Working, case:-i)when A=0 & B=0,(both input voltages are

0) both diodes are non conducting, the output voltage is 0.therefore Y=0.(because no voltage exists anywhere in the ckt.)

Case:-ii)when A=0 & B=1, the high B input voltage,forward bias(conducting) lower diode D2 producing an o/p voltage that is ideally +5v. i.e. Y is high,(Y=1). Note that the upper diode D1 is reverse bias , because A=0.

Case:-iii) when A=1 & B=0, the high A input voltage,forward bias(conducting) upper diode D1 producing an o/p voltage that is ideally +5v. i.e. Y is high,(Y=1). Note that the lower diode D2 is reverse bias , because B=0.

Case:-iv)when A=1 & B=1, with both inputs are high levels, i.e.+5v, Both diodes are forward bias (conducting) so current flows thro’ both diodes & R1, therefore Y=1, All above conditions are summarized in the truth table of OR gate.

1) The AND gate :-

The AND gate is also one of the fundamental basic gate. The AND gate has two or more inputs signal but only one output signal. The output voltage is high if all of the input voltage must be high.

Y=A.B

Fig. shows logic symbol of AND gate

Truth Table of AND

Input A Input B Output (Y=A.B)

0 0 0

0 1 0

1 0 0

1 1 1

2 2= Vcc

2

Y Y

A Y

B

Fig :- The AND gate using Diode & Resistor

Above fig. shows two input AND gate using diode & resistor

Working:- Case:-i)when A=0 & B=0, since both input voltage are at 0 volt. The diodes D1 & D2 become forward biased & conducts. Because of this, the output voltage is 0. Therefore Y is 0.

Case:-ii)when A=0 & B=1, The diode D1 becomes forward biased & diode D2 reverse biased. Therefore Y is connected to ground & hence Y is 0.

Case:-iii)when A=1 & B=0, The diode D1 is reverse diode & D2is forward biased, Hence Y is 0.

Case:-iv)when A=1 & B=1, Both diodes are reverse biased & non conducting. Since both diodes are OFF, there is no current through resistor R1 & the output is pulled up to +Vcc. Hence Y is 1.

3)The NOT gate:-The NOT gate is one of the fundamental or basic

logic gate. It is also called as an inverter. It has only one input & one output.

A Y=A

Fig. shows logic symbol of NOT gate

Truth Table of Not gate

Input A Output (Y=A)

0 1

1 0

A Y=A

Fig. shows the NOT gate using Transistor.

Above fig. shows a transistor inverter. This common emitter amplifier switches between cutoff & saturation.

Case:- i) when A is low, base current is also low, & hence collector currents are zero. Therefore there is no voltage drop across Rc & hence supply voltage Vcc appears at the output i.e. Y=1.(High)

Case:-ii)when A is high (i.e.1) base current is high & hence collector current flow. Due to this supply voltage Vcc to drop across Rc 7 hence at output there is no voltage. i.e. Y=0.

The NOT operation is also called negative or inversion & a bar is used to signify the NOT operation.

Y=A

The expression is read a Y equal’s NOT (complement) of A. The rates NOT operation are given by the truth table as,0=1,1=0.

The NOR gate

Fig. shows logic symbol of NOR gate

When a OR gate followed by NOT gate, the resultant gate is the NOR gate.

Truth Table of NOR gateInput A Input B Output Y=(A+B)

0 0 1

0 1 0

1 0 0

1 1 0

The NAND gateWhen AND gate followed by NOT gate the resultant

gate is the NAND gate

Input A Input B Output Y=(A.B)

0 0 1

0 1 1

1 0 1

1 1 0

Above fig. shows logic symbol of NAND gate & Truth Table of NAND gate.

The XOR gate (Exclusive OR gate)

The logic gate which output is high when an odd no.of inputs is high is called as XOR gate.

The exclusive OR gate can be designed using OR, AND, NOT gate.The following fig. shows how to build XOR gate & symbol of XOR gate.

Where A & B are two input & Y is an output.Theoutput of XOR gate is HIGH when the two inputs are at opposite logic levels.

Circuit operation of XOR gate:-

Case-i)when A=0 & B=0,

Y=AB+AB =0.0+0.0=1.0+0.1=0.0=0

Case:-ii)when A=0 & B=1,

Y=AB+AB

=0.1+0.1=1.1+0.0=1

Case:-iii)when A=0 & B=0,

Y=AB+AB

=1.0+1.0=0.0+1.1=0+1=1

Case:-iv)when A=1 & B=1,

Y=0+0=0.

Truth Table of XOR gate

Input A Input B Y=AB+AB

0 0 0

0 1 1

1 0 1

1 1 0

XNOR gate (Exclusive NOR gate)The logic gate which output is high when the

both inputs are at same logic level, called as XNOR gate.

The exclusive NOR gate can be designed using OR, AND, NOT gate. The following fig. shows how to build XNOR gate.

Where A & B are two inputs & Y is an output . The output of XNOR gate is HIGH when the two inputs are at same logic levels. i.e. the output of XNOR gate is opposite (compliment)that of the XOR gate. Therefore,

Y = AB + AB

The following fig. shows logic symbol & Truth Table of XNOR gate.

The operation of XNOR gate can be explained using four possible cases.

Case:-i)when A=0 & B=0, then the output of both AND gate is 0, Therefore, Y= 0+0 = 1,

Case:-ii)when A=0 & B=1, then the output of upper AND gate is 1, & the output oflowerAND gate is 0, Therefore, Y= 1+0= 1 = 0,

Case:-iii)when A=1 & B=0, then the ouyput of upper AND gate is 0 & the output of lower And gate is 1, Therefore, Y=0+1=1=0,

Case:-iv)when A=1 & B=1, then the output of both AND gate are 0, Y=0+0=0=1.

Application of Ex-OR gate1)Bit comparator using Ex-OR gate:-The basic

function of bit comparator is to compare the magnitude of two binary quantities & determines whether two numbers are equal.

Suppose A1A0 is the 2-bit binary no. & B1B0 is another 2-bit binary no. These two binary no. can be compared by the bit comparator shown in fig.

i)Suppose A1A0=10 i.e. A1=1 & A0=0,& B1B0=10 i.e. B1=1 & B0=0,

In above fig. output of both Ex-OR gates are 0,These outputs are inverted by the NOT gates, so both inputs to the AND gates are 1 hence its output is 1, It means that both inputs no. are equal.

ii)Suppose, A1A0=11 i.e. A1=1 & A0=1,

& B1B0=10 i.e. B1=1 & B0=0,

The output of upper Ex-OR gate is 1 that of lower Ex-OR is 0.After inversion, the inputs to the AND gates are 1 & 0, so Y=0 it means that both inputs nos.are not equal.

If Y=0,then both input nos. are not equal,& If Y=1, then both input nos. are equal.

To compare two 3 bit binary number attach one more XOR gate followed by NOT gate at the input of AND gate as shown in following figure

Thus by further attaching XOR gate followed by NOT gate at the input of AND gate we can compare two 4 bit binary numbers A3A2A1A0 & B3B2B1B0

Bit comparators are used to detect errors in digit system e.g. computer, calculator etc.

2)Controlled inverter using Ex-OR gates:-

Above fig. shows a 8-bit controlled inverter using XOR gate. Suppose the inputs nos.are

A7A6A5A4A3A2A1A0 =10110011.

i)When INVERT =0, then the outputs are,

Y7Y6Y5Y4Y3Y2Y1Y0=10110011

i.e. the input no. is produced at the output without inversion.

ii)When INVERT=1, then the outputs are,

Y7Y6Y5Y4Y3Y2Y1Y0=01001100

i.e. the input no is produced at the output with inversion i.e. 1’s compliment of 8 bit input is produced at the output.

Parity:-Parity means the no. of 1’s in the binary no.

which may be even or odd. So the parity is of two types.

i)Even parity:- If no. 1’s in the given binary nos. are even is called as even parity.

e.g. a) 1110001 has even parity because it contains 4 times 1’s.

b) 11001101100011101 also has the even parity because it contains 10 times 1’s.

ii)Odd parity:- If no. 1’s in the given binary nos. are odd is called as odd parity.

e.g. a)1111000011110111, has odd parity because it contains 11 times 1’s.

b)1100000111, has odd parity because it contains 5 times 1’s.

Parity Generation:-It means to attach the extra bit to the original binary no.to make the total no. of 1’s in given binary no. even or odd. There are two types of parity generators.

i)Odd parity generator & ii)Even parity generator

i)Odd parity generator:-Following fig. shows the odd parity generator,

An odd parity generator attach the extra bit to the original binary no. to makes the total no. of 1’s odd. If the original binary no. has odd parity then it attach the extra bit ‘0’ & original binary no. has even parity then it attach extra bit ‘1’ & makes odd parity.

Suppose the original binary no. is,

X7X6X5X4X3X2X1X0=01000001, then the no. has even parity, so the XOR gate produce 0 output. because of the NOT gate X8=1, Hence the final 9-bit output is 101000001 & this no. has odd parity.

Suppose the 8 bit input no. is,

X7X6X5X4X3X2X1X0=01100001,Now it has odd parity, in this case XOR gate produces 1 output. but the NOT gate X8=0, Hence the final 9-bit output is 01100001 & this no. has odd parity.

ii)Even parity generator:- An even parity generator attach the extra bit to the original binary no. to makes the total no. of 1’s is even in it . The following fig. shows even parity generator.

Suppose the 8 bit input no. is,

X7X6X5X4X3X2X1X0=01000001,Now it has even parity, in this case XOR gate produces 0 output. Hence the final 9-bit output is 001000001 & this no. has even parity.

Suppose the 8 bit input no. is,

X7X6X5X4X3X2X1X0=01100001,Now it has odd parity, in this case XOR gate produces 1’s output. Hence the final 9-bit output is 101100001 & this no. has even parity.

Parity checker:-It checks the parity (even or odd) of the given binary no. XOR gates are ideal

for checking the parity,

Because they produce an output 1 when the input has an odd no. of 1’s & produces 0 output, when the input has even no. of 1’s.The fig. shows the parity checker.

X15X14------------------------------X1X0

Suppose the 16-bit input nos. are,

X15X14X13…….X1X0=1010 1100 1000 1100,(odd)

Then XOR gate produces output 1’s because the input has odd parity.

Suppose the 16-bit input nos. are,

X15X14X13…….X1X0=0010 1100 1000 1100,(even)

Then XOR gate produces output 0’s because the input has even parity.

Application of Parity Generator & Parity Checker:-

When digital signal in binary form is transmitted from one system to other, e.g. In telephone lines , mobile & TV transmission via satellite etc. an error may occur. This means a signal corresponding to 0 may change to 1 or vice-versa(1 may change to 0).

To check the error, an odd parity generator is used at the transmitting end & odd parity checker is used at the receiving end. If no 1-bit error occur in transmission, the received data will have odd parity.

But one of transmitted bit is changed by noise or by other disturbance, the received data will have even parity. In this way parity generator & checker are useful in digital communication.

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