U8550 SVC ENG 1102 - FixMag.ru
281
Date: November, 2005 / Issue 1.0 Service Manual U8550 Service Manual Model : U8550
Transcript of U8550 SVC ENG 1102 - FixMag.ru
Date: November, 2005 / Issue 1.0
Service ManualU8550
Serv
ice M
an
ual
Mo
del : U
8550
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1. INTRODUCTION .............................. 6
1.1 Purpose................................................... 6
1.2 Regulatory Information............................ 6
1.3 Abbreviations .......................................... 8
2. PERFORMANCE............................ 10
2.1 System Overview.................................. 10
2.2 Usable environment .............................. 11
2.3 Radio Performance ............................... 11
2.4 Current Consumption............................ 19
2.5 RSSI...................................................... 19
2.6 Battery Bar ............................................ 19
2.7 Sound Pressure Level........................... 20
2.8 Charging ............................................... 21
3. Technical Brief .............................. 22
3.1 Digital Baseband(DBB) & Multimedia
Processor ............................................ 22
3.1.1 General Description .........................22
3.1.2 Hardware Architecture .....................23
3.1.3 External memory interface...............27
3.1.4 RF Interface .....................................28
3.1.5 SIM Interface ...................................30
3.1.6 UART Interface ................................31
3.1.7 GPIO (General Purpose Input/Output)
map..................................................32
3.1.8 USB .................................................33
3.1.9 Folder ON/OFF Detection................35
3.1.10 Bluetooth Interface.........................36
3.1.11 TransFlash Interface......................39
3.1.12 Power On Sequence......................40
3.1.13 Keypad...........................................41
3.2 GAM Hardware Subsystem ...................43
3.2.1 General Description .........................43
3.2.2 Block Description .............................44
3.2.3 Camera & Camera FPC Interface... 46
3.2.4 Camera Regulator ...........................49
3.2.5 Display & LCD FPC Interface ..........50
3.2.6 Main&Sub LCD Backlight Illumination...52
3.2.7 Camera Flash LED Illumination ...... 52
3.2.8 Keypad Illumination .........................53
3.3 LCD Module ...........................................54
3.4 Analog Baseband (ABB) Processor.......55
3.4.1 Overview of Audio path....................55
3.4.2 Audio Signal Processing
& Interface........................................56
3.4.3 Audio Mode..................................... 58
3.4.4 Voice Call.........................................59
3.4.5 MIDI (Ring Tone Play) .....................62
3.4.6 MP3 (Audio Player)..........................63
3.4.7 Video Telephony..............................64
3.4.8 Audio Part Main Components..........65
3.4.9 GPADC(General Purpose ADC) and
AUTOADC2 .....................................67
3.4.10 Charger control ..............................68
3.4.11 Fuel Gauge ....................................69
3.4.12 Battery Temperature
Measurement .................................70
3.4.13 Charging Part.................................71
3.5 Voltage Regulation.................................74
3.5.1 Internal Regulation...........................74
3.5.2 External Regulation .........................74
3.6 General Description of RF Part..............76
3.7 GSM Mode.............................................78
3.7.1 Receiver...........................................78
3.7.2 Transmitter.......................................83
3.8 WCDMA Mode .......................................85
3.8.1 Receiver.......................................... 85
3.8.2 Transmitter.......................................88
Table of Contents
Table Of Contents
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3.8.3 Frequency Generation .....................92
4. TROUBLE SHOOTING ...................94
4.1 Power ON Trouble .................................94
4.2 USB Trouble ..........................................96
4.3 SIM Detect Trouble ................................97
4.4 TransFlash Trouble................................98
4.5 Keypad Trouble......................................99
4.6 1.3M Camera Trouble ..........................101
4.7 VGA Camera Trouble ..........................103
4.8 Main LCD Trouble................................105
4.9 Sub LCD Trouble .................................107
4.10 Keypad Backlight Trouble ..................109
4.11 Camera Flash Trouble .......................111
4.12 Audio Trouble.....................................113
4.12.1 Receiver.......................................113
4.12.2 Speaker .......................................117
4.12.3 Microphone ..................................121
4.12.4 Headset - Receiver ......................125
4.12.5 Headset - MIC..............................126
4.12.6 Headset .......................................127
4.13 Charger Trouble.................................128
4.14 RF Component...................................130
4.15 Procedure to check ............................132
4.16 Checking Common Power
Source Block......................................133
4.17 Checking VCXO Block .......................140
4.18 Checking Ant. SW Module Block .......145
4.19 Checking Antenna Switch Block input
logic....................................................146
4.19.1 Mode Logic by TP Command ......146
4.19.2 Checking Switch Block
power source ...............................148
4.20 Checking WCDMA Block ...................153
4.20.1 Checking VCXO Block.................154
4.20.2 Checking Ant. SW module...........154
4.20.3 Checking Control Signal ..............154
4.20.4 Checking RF TX Level .................156
4.20.5 Checking PAM Block ...................159
4.20.6 Checking RX I,Q ..........................162
4.21 Checking GSM Block .........................164
4.21.1 Checking Regulator Circuit ..........165
4.21.2 Checking VCXO Block.................165
4.21.3 Checking Ant. SW Module...........165
4.21.4 Checking Control Signal ..............166
4.21.5 Checking RF Tx Path...................168
4.22 Checking Bluetooth Block ..................181
5. BLOCK DIAGRAM........................185
5.1 GSM & WCDMA RF Block...................185
6. DOWNLOAD .................................187
6.1 The Purpose of Downloading
Software ............................................187
6.2 Download Environment Setup .............187
6.3 U8XXX Download ................................188
7. CALIBRATION ..............................200
7.1 General Description ............................ 200
7.2 XCALMON Environment ..................... 200
7.2.1 H/W Environment.......................... 200
7.2.2 S/W Environment .......................... 200
7.2.3 Configuration Diagram of
Calibration Environment................ 200
7.3 Calibration Explanation ....................... 201
7.3.1 Overview....................................... 201
7.3.2 Calibration Items........................... 201
7.3.3 EGSM 900 Calibration Items ........ 202
7.3.4 DCS 1800 Calibration Items ......... 207
Table Of Contents
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7.3.5 WCDMA Calibration Items............ 210
7.3.6 Baseband Calibration Item ........... 218
7.4 Program Operation ............................. 219
7.4.1 XCALMON Program Overview ..... 219
7.4.2 XCALMON Icon Description ......... 220
7.4.3 Calibration Procedure ................... 223
7.4.4 Calibration Result Message.......... 225
8. Circuit Diagram ............................229
9. pcb layout .....................................239
10. EXPLODED VIEW &
REPLACEMENT PART LIST ..... 248
10.1 EXPLODED VIEW ............................ 248
10.2 Replacement Parts
<Mechanic component>.................... 251
<Main component> ........................... 255
10.3 Accessory ......................................... 282
1. INTRODUCTION
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1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download thefeatures of this model.
1.2 Regulatory Information
A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,persons other than your company’s employees, agents, subcontractors, or person working on yourcompany’s behalf) can result in substantial additional charges for your telecommunications services.System users are responsible for the security of own system.There are may be risks of toll fraud associated with your telecommunications system. System usersare responsible for programming and configuring the equipment to prevent unauthorized use. Themanufacturer does not warrant that this product is immune from the above case but will preventunauthorized use of common-carrier telecommunication service of facilities accessed through orconnected to it. The manufacturer will not be responsible for any charges that result from suchunauthorized use.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and possiblycausing harm or interruption in service to the telephone network, it should disconnect telephoneservice until repair can be done. A telephone company may temporarily disconnect service as long asrepair is not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If thesechanges could reasonably be expected to affect the use of the phones or compatibility with thenetwork, the telephone company is required to give advanced written notice to the user, allowing theuser to take appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on the phones must be performed only by the manufacturer or its authorizedagent. The user may not make any changes and/or repairs expect as specifically noted in this manual.Therefore, note that unauthorized alternations or repair may affect the regulatory status of the systemand may void any remaining warranty.
1. INTRODUCTION
1. INTRODUCTION
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E. Notice of Radiated Emissions
This model complies with rules regarding radiation and radio frequency emission as defined by localregulatory agencies. In accordance with these agencies, you may be required to provide informationsuch as the following to the end user.
F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look slightlydifferent.
G. Interference and Attenuation
A phone may interfere with sensitive laboratory equipment, medical equipment, etc.Interference from unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices
ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by the sign.Following information is ESD handling:
• Service personnel should ground themselves by using a wrist strap when exchange system boards.• When repairs are made to a system board, they should spread the floor with anti-static mat which is
also grounded.• Use a suitable, grounded soldering iron.• Keep sensitive parts in these protective packages until these are used.• When returning system boards or parts like EEPROM to the factory, use the protective package as
described.
1. INTRODUCTION
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1.3 Abbreviations
For the purpose of this manual, following abbreviations apply.
APC Automatic Power Control
BB Baseband
BER Bit Error Ratio
CC-CV Constant Current - Constant Voltage
CLA Cigar Lighter Adapter
DAC Digital to Analog Converter
DCS Digital Communication System
dBm dB relative to 1 milliwatt
DSP Digital Signal Processing
DTC DeskTop Charger
EEPROM Electrical Erasable Programmable Read-Only Memory
EL Electroluminescence
ESD Electrostatic Discharge
FPCB Flexible Printed Circuit Board
GMSK Gaussian Minimum Shift Keying
GPIB General Purpose Interface Bus
GPRS General Packet Radio Service
GSM Global System for Mobile Communications
IPUI International Portable User Identity
IF Intermediate Frequency
LCD Liquid Crystal Display
LDO Low Drop Output
LED Light Emitting Diode
OPLL Offset Phase Locked Loop
PAM Power Amplifier Module
PCB Printed Circuit Board
PGA Programmable Gain Amplifier
PLL Phase Locked Loop
1. INTRODUCTION
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1.3 Abbreviations
For the purpose of this manual, following abbreviations apply.
I. Introduction
PSTN Public Switched Telephone Network
RF Radio Frequency
RLR Receiving Loudness Rating
RMS Root Mean Square
RTC Real Time Clock
SAW Surface Acoustic Wave
SIM Subscriber Identity Module
SLR Sending Loudness Rating
SRAM Static Random Access Memory
UMTS Universal Mobile Telephony System
2. PERFORMANCE
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2.1 System Overview
2. PERFORMANCE
Item Specification
Shape GSM900/1800/1900 & WCDMA Folder- Dual Mode Handset
Size 90 x 55 x 24.7mm
Weight 134g (with Standard Battery)
Power 1400mA Li-Polymer
Talk TimeOver 180 Min (WCDMA, Tx=12 dBm, Voice)
Over 220 Min (GSM, Tx=Max, Voice)
Standby TimeOver 165 hrs (WCDMA, DRX=1.28)
Over 223 hrs (GSM, Paging period=9)
Antenna Fixed Type (Fixed Screw)
Main LCD 220 x 220 TFT LCD 262K Color
Sub LCD 128 x 160 TFT LCD 262K Color
Main/Sub LCD BL White LED Backlight
Vibrator Yes (Cylinder Type)
LED Indicator Blue
C-MIC Yes
Receiver Yes
Earphone Jack Yes
SIM Socket Yes (3.0V/1.8V)
Volume Key Push Type(+,-)
Voice Key Push Type (Memo)
External Memory T - Flash Socket
I/O Connect 24 Pin
2. PERFORMANCE
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2.2 Usable environment
1) Environment
2) Environment(Accessory)
* CLA: 12~24V(DC)
2.3 Radio Performance
1) Transmitter -GSM Mode
Item Spec. Unit
Voltage 4.0 (Typ), 3.4 (Min), (Shut Down: 3.2) V
Operating Temp. -20 ~ + 60 °C
Storage Temp. -30 ~ + 85 °C
Humidity max. 85 %
Item Spec. Min Typ. Max Unit
Power Available power 100 220 240 Vac
No Item GSM DCS/PCS
100k ~ 1GHz -39dBm9k ~ 1GHz -39dBm
MS allocated 1G ~ 1710MHz -33dBm
Channel1G ~ 12.75GHz -33dBm
1710M ~ 1785MHz -39dBm
Conducted 1785M ~ 12.75GHz -33dBm
1 Spurious 100k ~ 880MHz -60dBm 100k ~ 880MHz -60dBm
Emission 880M ~ 915MHz -62dBm 880M ~ 915MHz -62dBm
Idle Mode915M ~ 1000Mz -60dBm 915M ~ 1000MHz -60dBm
1G ~ 1.71GHz -50dBm 1G ~ 1.71GHz -50dBm
1.71G ~ 1.785GHz -56dBm 1.71G ~ 1.785GHz -56dBm
1.785G ~ 12.75GHz -50dBm 1.785G ~ 12.75GHz -50dBm
2. PERFORMANCE
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No Item GSM DCS/PCS
30M ~ 1GHz -36dBm30M ~ 1GHz -36dBm
MS allocated 1G ~ 1710MHz -30dBm
Channel1G ~ 4GHz -30dBm
1710M ~ 1785MHz -36dBm
Radiated 1785M ~ 4GHz -30dBm
1 Spurious 30M ~ 880MHz -57dBm 30M ~ 880MHz -57dBm
Emission 880M ~ 915MHz -59dBm 880M ~ 915MHz -59dBm
Idle Mode915M ~ 1000Mz -57dBm 915M ~ 1000MHz -57dBm
1G ~ 1.71GHz -47dBm 1G ~ 1.71GHz -47dBm
1.71G ~ 1.785GHz -53dBm 1.71G ~ 1.785GHz -53dBm
1.785G ~ 4GHz -47dBm 1.785G ~ 4GHz -47dBm
2 Frequency Error ±0.1ppm ±0.1ppm
3 Phase Error±5(RMS) ±5(RMS)
±20(PEAK) ±20(PEAK)
3dB below reference sensitivity 3dB below reference sensitivity
Frequency Error Under RA250: ±200Hz RA250: ±250Hz
4 Multipath and Interference HT100: ±100Hz HT100: ±250Hz
Condition TU50: ±100Hz TU50: ±150Hz
TU3: ±150Hz TU1.5: ±200Hz
0 ~ 100kHz +0.5dB 0 ~ 100kHz +0.5dB
200kHz -30dB 200kHz -30dB
250kHz -33dB 250kHz -31dB
Due to 400kHz -60dB 400kHz -33dB
Output RFmodulation 600 ~ 1800kHz -66dB 600 ~ 1800kHz -60dB
5 1800 ~ 3000kHz -69dB 1800 ~ 6000kHz -60dBSpectrum
3000 ~ 6000kHz -71dB ≥6000kHz -73dB
≥6000kHz -77dB
Due to400kHz -19dB 400kHz -22dB
Switching600kHz -21dB 600kHz -24dB
transient1200kHz -21dB 1200kHz -24dB
1800kHz -24dB 1800kHz -27dB
2. PERFORMANCE
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No Item GSM DCS/PCS
Frequency offset 800kHz
7 Intermodulation attenuation –Intermodulation product should
be Less than 55dB below the
level of Wanted signal
Power control Power Tolerance Power control Power Tolerance
Level (dBm) (dB) Level (dBm) (dB)
5 33 ±3 0 30 ±3
6 31 ±3 1 28 ±3
7 29 ±3 2 26 ±3
8 27 ±3 3 24 ±3
9 25 ±3 4 22 ±3
10 23 ±3 5 20 ±3
8 Transmitter Output Power 11 21 ±3 6 18 ±3
12 19 ±3 7 16 ±3
13 17 ±3 8 14 ±3
14 15 ±3 9 12 ±4
15 13 ±3 10 10 ±4
16 11 ±5 11 8 ±4
17 9 ±5 12 6 ±4
18 7 ±5 13 4 ±4
19 5 ±5 14 2 ±5
15 0 ±5
9 Burst timing Mask IN Mask IN
2) Transmitter-WCDMA Mode
2. PERFORMANCE
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No Item Specification
1 Maximum Output PowerClass3: +24dBm(+1/-3dB)
Class4: +21dBm(±2dB)
2 Frequency Error ±0.1ppm
3 Open Loop Power control in uplink ±9dB@normal, ±12dB@extreme
Adjust output(TPC command)
cmd 1dB 2dB 3dB
+1 +0.5/1.5 +1/3 +1.5/4.5
4 Inner Loop Power control in uplink 0 -0.5/+0.5 -0.5/+0.5 -0.5/+0.5
-1 -0.5/-1.5 -1/-3 -1.5/-4.5
group(10equal command group)
+1 +8/+12 +16/+24
5 Minimum Output Power -50dBm(3.84MHz)
Qin/Qout:DPCCH quality levels
6 Out-of-synchronization handling of output power Toff@DPCCH/lor:-22->-28dB
Ton@DPCCH/lor:-24->-18dB
7 Transmit OFF Power -56dBm(3.84M)
8 Transmit ON/OFF Time Mask±25us
PRACH, CPCH, uplink compressed mode
±25us
9 Change of TFCpower varies according to the data rate
DTX: DPCH off
(minimize interference between UE)
10 Power setting in uplink compressed ±3dB(after 14slots transmission gap)
11 Occupied Bandwidth(OBW) 5MHz(99%)
-35-15*(∆f-2.5)dBc@∆f=2.5~3.5MHz, 30k
12 Spectrum emission Mask-35-1*(∆f-3.5)dBc@∆f=3.5~7.5MHz, 1M
-39-10*(∆f-7.5)dBc@∆f=7.5~8.5MHz, 1M
-49 dBc@∆f=8.5~12.5MHz, 1M
2. PERFORMANCE
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3)Receiver - GSM Mode
No Item Specification
13 Adjacent Channel Leakage Ratio(ACLR)33dB@5MHz, ACP>-50dBm
43dB@10MHz, ACP>-50dBm
-36dBm@f=9~150KHz, 1k BW
-36dBm@f=150KHz~30MHz, 10k
-36dBm@f=30~1000MHz, 100k
14Spurious Emissions -30dBm@f=1~12.75GHz, 1M
*: additional requirement -41dBm*@1893.5~1919.6MHz, 300k
-67dBm*@925~935MHz, 100k
-79dBm*@935~960MHz, 100k
-71dBm*@1805~1880MHz, 100k
15 Transmit Intermodulation-31dBc@5MHz, Interferer -40dBc
-41dBc@10MHz, Interferer -40dBc
16 Error Vector Magnitude(EVM)17.5% (>-20dBm)
(@12.2k, 1DPDCH+1DPCCH)
17 Transmit OFF Power-15dB@SF=4, 768kbps, multi-code
transmission
No Item GSM DCS/PCS
1 Sensitivity (TCH/FS Class II) -105dBm -105dBm
2Co-Channel Rejection
C/Ic=7dB C/Ic=7dB(TCH/FS Class II, RBER, TUhigh/FH)
3 Adjacent Channel 200kHz C/Ia1=-12dB C/Ia1=-12dB
Rejection 400kHz C/Ia2=-44dB C/Ia2=-44dB
Wanted Signal: -98dBm Wanted Signal: -96dBm
4 Intermodulation Rejection 1’st interferer: -44dBm 1’st interferer: -44dBm
2’st interferer: -45dBm 2’st interferer: -44dBm
5Blocking Response Wanted Signal: -101dBm Wanted Signal: -101dBm
(TCH/FS Class II, RBER) Unwanted Signal: Depend on freq. Unwanted Signal: Depend on freq.
4) Receiver - WCDMA Mode
2. PERFORMANCE
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No Item Specification
18 Reference Sensivitivity Level -106.7dBm(3.84M)
-25dBm(3.84MHz)
19 Maximum Input Level -44dBm/3.84MHz(DPCH_Ec)
UE@+20dBm output power(class3)
20 Adjacent Channel Selectivity(ACS)33dB
UE@+20dBm output power(class3)
-56dBm/3.84MHz@10MHz
21 In-band Blocking UE@+20dBm output power(class3)
-44dBm/3.84MHz@15MHz
UE@+20dBm output power(class3)
-44dBm/3.84MHz@f=2050~2095 &
2185~2230MHz, band a)
UE@+20dBm output power(class3)
-30dBm/3.84MHz@f=2025~2050 &
22 Out-band Blocking 2230~2255MHz, band a)
UE@+20dBm output power(class3)
-15dBm/3.84MHz@f=1~2025 &
2255~12500MHz, band a)
UE@+20dBm output power(class3)
23 Spurious Response-44dBm CW
UE@+20dBm output power(class3)
-46dBm CW@10MHz &
24 Intermodulation Characteristic -46dBm/3.84MHz@20MHz
UE@+20dBm output power(class3)
-57dBm@f=9KHz~1GHz, 100k BW
25 Spurious Emissions -47dBm@f=1~12.75GHz, 1M
-60dBm@f=1920~1980MHz, 3.84MHz
-60dBm@f=2110~2170MHz, 3.84MHz
2. PERFORMANCE
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5) Bluetooth Mode
5.1) Transmitter
1 Out Power Class 2 : -6~4dBm
2 Power Density Power density < 20dBm per 100kHz EIRP
3 Power ControlOption
2dB ≤ step size ≤ 8dB
4TX Output Spectrum fmax & fmin @ below the level of -30dBm(100khz BW)
-Frequency range within 2.4GHz~2.4835GHz
5TX Output Spectrum
≤ 1MHz-20dB Bandwidth
6Tx Output Spectrum ≤ -20dBm @ C/I = 2MHz
-Adjacent channel Po ≤ -40dBm @ C/I ≥ 3MHz
140kHz ≤ delta f1 avg ≤175kHz
7 Modulation Characteristics delta f2max ≥115kHz at least 99.9% of all deltaf2max
delta f2avg/deata f1avg≥0.8
8 Init. Carrier Freq. Tolerance ≤ ±75KHz
1 slot : ≤ ± 25kHz
9 Carrier Frequency Drift3 slot : ≤ ± 40kHz
5 slot : ≤ ± 40kHz
Maximum drift rate ≤ 20KHz/50usec
Freq.Range Operating Standby
30MHz~1GHz -36dBm -57dBm
10 Out of Band Spurious Emissions Above 1GHz~12.75GHz -30dBm -47dBm
1.8~1.9GHz -47dBm -47dBm
5.15~5.3GHz -47dBm -47dBm
2. PERFORMANCE
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5.2) Receiver
11 Sensitivity single slot packets BER≤0.1%@-70dBm
12 Sensitivity multi slot packets BER≤0.1%@-70dBm
13 BER ≤ 0.1%@ (Low,Mid,High Frequency)
2405MHz, 2441MHz, 2477MHz
Interference Ratio
Co-Channel interference, C/I co-channel 11dB
C/I performance Adjacent(1MHz)interference, C/I 1MHz 0dB
Adjacent(2MHz)interference, C/I 2MHz -30dB
Adjacent(≥3MHz)interference, C/I ≥3MHz -40dB
Adjacent(≥3MHz)interference to in band -9dB
mirror frequency, C/I image ±1MHz -20dB
14 BER ≤ 0.1%@wanted signal -67dBm
interfering Signal Frequency Power Level
Blocking Characteristic30MHz~2000MHz -10dBm
2000MHz~2400MHz -27dBm
2500MHz~3000MHz -27dBm
3000MHz~12.75GHz -10dBm
15 BER ≤ 0.1%@wanted signal -64dBm
Intermodluation Performance static sinwave signal at f1=-39dBm
a BT modulated signal f2=-39dBm(payload PRBS15)
16 Maximum Input Level BER ≤ 0.1%@-20dBm
2. PERFORMANCE
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2.4 Current Consumption
(VT test : Speaker off, LCD backlight On)
2.5 RSSI
TBD
2.6 Battery Bar
Stand by Voice Call VT
WCDMA 165Hours=8.48mA 180Min=467mA 130Min=646mA
(DRX=1.28) (Tx=12dBm) (Tx=12dBm)
GSM 223Hours=6.28mA 220Min=380mA
(paging=9period) (Tx=Max)
GSM WCDMA(TBD)
BAR 4 → 3 -91 ±2dBm -87 ±2dBm
BAR 3 → 2 -96 ±2dBm -97 ±2dBm
BAR 2 → 1 -101 ±2dBm -107 ±2dBm
BAR 1 → 0 -106 ±2dBm -112 ±2dBm
Indication Voltage
BAR 4 → 3 (65%) 3.87 ± 0.05V
BAR 3 → 2 (43%) 3.77 ± 0.05V
BAR 2 → 1 (24%) 3.72 ±0.05V
BAR 1 → Icon Blinking (3%) 3.54 ±0.05V
Low voltage, warning message3.54 ±0.03V(Talk: 1min. interval) -3%
3.50 ±0.03V(Standby: 3min. Inverval) -2%
Power OFF3.15 ±0.03V ↓ (WCDMA Talk)
3.23 ±0.03V ↓ (else)
2. PERFORMANCE
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2.7 Sound Pressure Level
No Test Item Specification
1 Sending Loudness Rating (SLR)NOM
8±3dBMAX
2 Receiving Loudness Rating (RLR)NOM -1±3dB
MAX -15±3dB
3 Side Tone Masking Rating (STMR)NOM
17dB overMAX
4 Echo Loss (EL)NOM
40dB overMAX
5 Sending Distortion (SD) refer to TABLE 30.3
6 Receiving Distortion (RD) refer to TABLE 30.4
7 Idle Noise-Sending (INS)NOM
-64dBm0p underMAX
8 Idle Noise-Receiving (INR)NOM -47dBPA under
MAX -36dBPA under
9 Sending Loudness Rating (SLR)NOM
8±3dBMAX
10 Receiving Loudness Rating (RLR)NOM -1±3dB
MAX -12±3dB
11 Side Tone Masking Rating (STMR)NOM
25dB overMAX
12 Echo Loss (EL)NOM
40dB overMAX
13 Sending Distortion (SD) refer to TABLE 30.3
14 Receiving Distortion (RD) refer to TABLE 30.4
15 Idle Noise-Sending (INS)NOM
-55dBm0p underMAX
16 Idle Noise-Receiving (INR)NOM -45dBPA under
MAX -40dBPA under
TDMA NOISEGSM
SEND
–.GSM: Power Level: 5MS
REV.
DCS: Power Level: 0DCS
SEND
17(Cell Power: -90 ~ -105dBm) REV.
-62dBm under–.Acoustic(Max Vol.)
GSMSEND
MS/HEADSET SLR: 8±3dBHeadset
REV.
MS/HEADSET RLR: -13±1dB/-15dBDCS
SEND
(SLR/RLR: mid-Value Setting) REV.
A
C
O
U
S
T
I
C
MS
HEAD
SET
2. PERFORMANCE
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2.8 Charging
• Normal mode: Complete Voltage: 4.2VCharging Current: 800mA
• Await mode: In case of During a Call, should be kept 3.9V(GSM: It should be kept 3.9V in all power level WCDMA: It will not be kept 3.9V in some power level)
• Extend await mode: At Charging prohibited temperature(-20C under or 60C over)(GSM: It should be kept 3.7V in all power level WCDMA: It will not be kept 3.7V in some power level)
3. Technical Brief
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3.1 Digital Baseband(DBB) & Multimedia Processor
3.1.1 General Description
A. Features
• CPU ARM946 running at 104 MHz- 32 kB Instruction Cache, 16 kB Data Cache, 128 kB Instruction TCM and 128 kB Data TCM- 8 channel DMAC
• DSP C55x (LEAD3) Megastar (MGS3_2.0B) running at 170 MHz- 144 kWord ROM, 32 kWord DARAM, 32 kWord SARAM- 7 channel DMAC- Dedicated API channel to DSP memory (not locked up to other DMA channels)
• UMTS Access- Support for WCDMA/GSM Dual Mode- GSM/GPRS network signaling (from Layer 1 to 3)- WCDMA Ciphering and Integrity- High Speed Serial Link (HSSL) to the WCDMA Modem (at Layer 1)- GSM AMR- Multislot Class 8- HSCSD 14.4 kb/s
• MMI- Keypad Interface- Tone Generator Interface- Camera Data and Programmable Display Interfaces- Enhanced graphics support for QCIF display
• Operation and Services- I2 CTM‚ Interface- SIM Interfaces- General Purpose I/O (GPIO) Interface- External Memory Interface that supports FLASH, SRAM and PSRAM- JTAG- RTC
• Data Communication- IrDA ® (SIR)- UARTs (ACB, EDB (RS232), Bluetooth® HCI)- Slave USB
• Package- 12 by 12 mm 289 pin FPBGA Production Package
3. Technical Brief
3. Technical Brief
- 23 -
3.1.2 Hardware Architecture
The hardware structure is delivered as five separate hardware macros to the top-level design, alsodepicted in Figure.
CPU Subsystem
GAM Subsystem
Peripheral Subsystem
DPS Subsystem
GSM CoreSubsystem
SYSCON
Figure 3-1-1 Simplified Block Diagram of Ericsson DB 2000
3. Technical Brief
- 24 -
A. Block Diagram
Figure 3-1-2 Detailed Block Diagram of Ericsson DB 2000
CPU Sub-Chip
Cam
era
Mod
ule
Dis
play
Mod
ule
DSP Sub-System
MGS3_2.0B
DSP_INT
MGS3peripherals
GAM Sub-System
DLUL
Con
trol
CP
U I
/O in
terf
ace
eigh
t bit
wid
e m
ultip
lexe
d bu
s,
DLUL
DLUL
UL
UL
UL
DLDL
UL
DL
DL
DLUL
DL
CHE
NODI
4 x CHD
EQU
GPRSCRC24
GPRSCRYPTO
SERCON
TIMGEN
FCHDET
CLKCON
RXIF
CRYPTO
DIRMOD
DM
A C
hann
els
6.5
Mbp
s
43x16 bit RAM43x16 bit RAM
360x38bit RAM
144 bit
AHB1 (CPU)
AHB2 (DMA)
AHBSlave
AHBSlave
AHB Master
AHBMaster
DMA(16Rq 8Ch)
Boot ROM16k bytes
(4K x 32bit)
MPPCM
Ciphering
Integrity
HSSL
I2C
SYSCON
RTC
TONGEN
GPIO
UART1EDB
UART3BT
UART6
UART7DSP debug
AHBSlave
SIMIF_0
MEMSTICK
Control
SIMIF_1
AHBSlave
AHBSlave
Conceptual Diagram of bus
BridgeAsynchronous
SystemBRAM
16k bytes(4K x 32bit)
13M
Hz
MUX
16
16
16
16
32
32
32
16
16
16
RHEA
AP
I (1
6)
IRA
M(I
nter
nal r
adio
dat
a R
AM
)
16 k
B d
ual p
ort S
RA
M
AHBSlave
AHBSlave
AHBSlave
32
EM
IFS
ME
MS
YS
(D
MA
bus
)
UART0ACB
INTCON
KEYPAD
UART5
UART2GPS
UART4
TS
16
16
16
16
16
32
16
13M
Hz
13M
Hz
13M
Hz,
26M
Hz
AHBSlave
TIMER
32
IRDA32
JOGDIAL
ETX
208DPLL
13APLL
48APLL
APB Bridge(1)
APB Bridge(2)
MMC
APB Bridge(Slow)
APB Bridge(Data)
Interconnect Matrix
USB
CPU Sub-System
AHBSlave
Per
iph
eral
Su
b-S
yste
m
16
16
16
32
32
16
16
32
GSM Sub-System
DefaultSlave
AHBSlave
16
26APLL
CLKSQR
16
1616
1616ROM
144 kWords(18 x 8 kW) BX
RHEA
DMA
DARAM32 kWords(8 x 4kW)
BRE
APISARAM32 kWords(8 x 4kW)
BRE
HPRTD
TRACE Timer2DPLL
DGPIO
JTAG
Timer1
C55x CPU
AHBSlave
AHBSlave
AHBSlave
CIPCLK
CID [7:0]
CIVSYNC
CIHSYNC
CIRES_N
PDIRES_N
PDIC [4:0]
PDID [7:0]
CDI
PDIGRAPHCON
GAMCON
GRAM160k byte
7kB RAM
4
4 4
11 3
GAM
3
3
35
2
3
3
CLKREQ7
BPW
MUX MUX MUX MUX
MUX MUXMUXMUX
MU
X
ARM9E
CP15
RAM Control
ETM
Data RAM128kB
InstructionSRAM128kB
IPU
I CacheControl
I Cache32kB
DPU
D CacheControl
D Cache16kB
Write Buffer & AHB IF
ETM IF
JTAG
946
11
8 JTAG
23
GAM
AHB-Lite
AHB-Lite
DAT [16]
ADD [24]
CS [4]
we/oe [2]
MEME[5]
SYSCLK [3]
MCLK
PWRREQ_N
RESOUT [5]
SERVICE
RESPOW_N
3
4
GPIO MUX
RH
EA
GPIO MUX
1
Ext
erna
l Mem
ory
PA
R/
SS
Idatadata
cpu
40
28
1325
53
8
26
59
0
89
key
unused 2
4
44
4
4
6
3. Technical Brief
- 25 -
B. CPU Hardware Subsystem
The CPU subsystem incorporates:• CPU Sub chip• Backplane• JTAG• DMA Controller• System Buffer RAM• Boot ROM• External Memory Interface (EMIF) for connection to external SRAM and Flash memories. The bus
architecture is built on the ARM AMBA standard with multi-layer AHB (Advanced High-speed Bus)and APB (Advanced Peripheral Bus) for the peripheral buses. There are two AHB busses, the CPUAHB and the DMA AHB.Clocks to the CPU subsystem are distributed from the system control (SYSCON) backplane clocking.The reset lines are all asynchronously asserted low and synchronously negated high. The CPUsubsystem has separate clocking and reset for the ARM946, AHB system, EMIF and DMAC.
C. Peripheral Hardware Subsystem
There are 29 peripherals within the peripheral hardware subsystem. With the exception of the USB, all
hardware peripheral blocks are APB slave peripherals. From an architecturehierarchy perspective, the
SYSCON block is an APB slave on the slow APB bridge, but resides at the top level of the ASIC. The
APB provides a simple interface to support low-performance peripherals. Within the peripheral
subsystem, there are four separate APB busses with AHB to APB (AHB2APB) bridges to the multi-
layer AHB.
D. DSP Hardware Subsystem
The DSP subsystem provides support for processor intensive activity, such as voice coding and
multimedia application support. The DSP subsystem includes the standard C55xTM Core (LEAD3)
from Texas Instruments with associated memory system and peripherals.
E. GAM Hardware Subsystem
The Graphics Accelerator Module (GAM) subsystem provides hardware support in the creation of
visual imagery and the transfer of this data to the display. GAM also provides support for the camera
module. The visual data could be graphics, still images or video.
The GAM subsystem consists of five modules:• GRAM - graphics memory (160 kB).• GAMCON - GAM controller.• GRAPHCON - graphics controller.• PDI/SSI - programmable display interface for parallel/serial displays.• CDI - camera data interface.
3. Technical Brief
- 26 -
F. GSM Hardware Subsystem
The GSM subsystem is a stand-alone sub-chip incorporating GSM modem and interface to GSM radio
together with memory control (MEMSYS) and internal RAM (IRAM).
The hardware peripheral blocks are RXIF, FCHDET, CRYPTO, EQU, NODI, 4 x CHD, GPRS
CRYPTO, GPRS CRC24, CHE, DIRMOD, CLKCON, SERCON, TIMGEN, MEMSYS and IRAM.
The peripherals are accessible to the AHB (CPU-only) by an asynchronous I/O bridge.
The dual port IRAM is accessible to the AHB (CPU and DMA) by a synchronous AHB slave interface.
G. System Control Subsystem
The system controller subsystem (SYSCON) is primarily responsible for generating clock signals and
distributing the clock and reset signals within the ASIC and certain external devices. The GSM core,
GAM and DSP subsystems include their own system controllers that are sourced from SYSCON.
SYSCON consists of analog and digital PLL clocks and a clock squarer. The block is a slave
peripheral on the slow APB bus under control of the CPU.
The programming of SYSCON controls the fundamental modes of operation within the ASIC.
Individual blocks can also be reset and their clocks held inactive by accessing the appropriate control
registers. SYSCON also controls the requesting protocol through which different subblocks in Ericsson
DB 20000 can request clocks derived from the system clock.
The system controller also stores the chip-ID number in a read only register.
3. Technical Brief
- 27 -
3.1.3 External memory interface
There are four independent chip selects (CS0, CS1, CS2, CS3) provided for external memoriesand each has an address range of 256 Mb.RF calibration data, Audio parameters and battery calibration data etc are stored in flash memoryarea.
A. U8550
• 1-MCP used (512Mb flash memory + 128Mb PSRAM)• 4-CS (Chip Select) are used
Table 3-1-1. External Memory Interface Spec. of U8550
Figure 3-1-3. External Memory Configuration of U8550
Interface Spec.
Device Part Name Maker
Read Access Time Write
Async Page BurstAccess
Time
Flash 85 ns 25 ns14 ns
90 ns
RD38F4455LLYBQ1 Intelat 54MHz
PSRAM 85 ns 25 ns10 ns
85 nsat 66MHz
CS0
CS1
CS2
CS3
Flash256 Mb
(Top boot)
Flash256 Mb
(Bottom boot)
PSRAM64 Mb
PSRAM64 Mb
MARITA Intel MCP
3. Technical Brief
- 28 -
3.1.4 RF Interface
A. MARITA Interface
Marita controls GSM RF part using these signals through GSM RF chip-Ingela.
• RFCLK, RFDAT, RFSTR : Control signals for Ingela
• TXON, RXON : Control signals for TX and RX part of Ingela
• PCTL : Control signal for GSM TX PAM
• BANDSEL0 : Band selection signal for GSM or DCS
• ANTSW[0:3] : Control signals for antenna switch
• DCLK, IDATA, QDATA : GSM/DCS RX Data
• DIRMOD[A:D] : GSM/DCS TX Data
RF I/F
R63
110
00R
627
TX
ON
G3
G2
RX
ON
L7
QD
AT
A
K8
RF
CL
K
G1
RF
DA
TR
FS
TR
H4
PC
TL
L8
K3
IDA
TA
DIR
MO
D3
DC
LK
K4
DIR
MO
D0
E2
DIR
MO
D1
J7 F3
DIR
MO
D2
F2
J2A
NT
SW
0A
NT
SW
1J4 J3
AN
TS
W2
J1A
NT
SW
3
H3
BA
ND
SE
L0
K7
BA
ND
SE
L1
R63
2N
A
MO
DC
MO
DB
MO
DA
DC
LK
BS
EL
0
AN
TS
W3
AN
TS
W2
AN
TS
W1
AN
TS
W0
IDA
TA
MO
DD
PC
TL
RX
ON
RA
DD
AT
RA
DC
LK
QD
AT
A
GP
RF
CT
RL
RA
DS
TR
TX
ON
Figure 3-1-4. Schematic of MARITA RF Interface
3. Technical Brief
- 29 -
B. WANDA Interface
Wanda controls WCDMA RF part using these signals through W-CDMA RF chip-Wopy & Wivi.
• WCLK, WDAT, WSTR : Control signals for Wivi & Wopy
• RXIA, RXIB, RXQA, RXQB : WCDMA RX Data
• TXIA, TXIB, TXQA, TXQB : WCDMA TX Data
• HSSLRX_D, HSSLRX_CLK : Marita & Wanda Communication Signal
• HSSLTX_D, HSSLTX_CLK : Marita & Wanda Communication Signal
R74
810
0K
G13
JTAG_TMSG15
G16JTAG_TRSTN
R17RADIO_CLKRADIO_DAT
P15M13
RADIO_STR
C14HSSLRX_CLK
HSSLRX_DB16A16
HSSLTX_CLKHSSLTX_D
A15
D4ID_BALL
IS_EVENT_NB12A13
IS_SYNC_N
JTAG_TCKG17
F16JTAG_TDIJTAG_TDO
EMU0F13E15
EMU1
N8DAC_I_OUTDAC_I_OUT_INV
U8
DAC_Q_OUTU7
DAC_Q_OUT_INVR7T7
DAC_TXEXTRES
ADC_I_IN_INVADC_Q_IN
R9T9
ADC_Q_IN_INV
N9ADC_RXEXTREF_NADC_RXEXTREF_P
T10
AD_STRM16
U12APLL_ATEST1
ADC_I_INR10N10
R74
910
0K
VDIG
NA
R746
VCORE
C730 0.1u
3.3K
R74
4
VCORE
Q702 23 1
PMST3904
2.7K
R74
5
47p
C72
6
TXQB
HSSLTXHSSLRXCLK
HSSLRXHSSLTXCLK
ISSYNCnISEVENTn
RXIBRXQARXQB
ADCSTR
TXIATXIB
TXQA
WCLKWDAT
RXIA
WSTR
Figure 3-1-5. Schematic of WANDA RF Interface
3. Technical Brief
- 30 -
3.1.5 SIM Interface
SIM interface scheme is shown in Figure 3-1-6SIMDAT0, SIMCLK0, SIMRST0 ports are used to communicate DBB(MARITA) withABB(VINCENNE) and filter.
SIM (Interface between DBB and ABB)
SIMDATO SIM card bidirectional data line
SIMCLKO SIM card reference clock
SIMRSTO SIM card async/sync reset
Table 3-1-2. SIM Interface
VDD
DAT
CLK CARD
RST
SIMVCC
VINCENNE
SDAT SIMDAT
SCLK SIMCLK
SRST SIMRST
MARITA
SIMDAT0
SIMCLK0
SIMRST0
VDIG
10K15K
Figure 3-1-6. SIM Interface Scheme
3. Technical Brief
- 31 -
3.1.6 UART Interface
UART signals are connected to MARITA GPIO through IO connector and Bluetooth interface.
UART0
Resource Name Note
GPIO10 UARTRX0 Receive Data
GPIO11 UARTTX0 Transmit Data
UART3 for the bluetooth
GPIO24 UARTRX3 Receive Data
GPIO25 UARTTX3 Transmit Data
GPIO26 UARTCTS3 Clear To Send
GPIO27 UARTRTS3 Request To Send
Table 3-1-3. UART Interface
3. Technical Brief
- 32 -
Table 3-1-4. MARITA GPIO Map Table
3.1.7 GPIO (General Purpose Input/Output) map
In total 40 allowable resources. This model is using 22 resources.GPIO Map, describing application, I/O state, and enable level are shown in below table 3-1-4.
IO # Application IO Resource Inactive State Active StateGPIO00 VGA_IO_OFF O GPIO Low High GPIO01 I2C_VGA_EN O GPIO Low High GPIO02 CAM28_VGA_EN O GPIO Low HighGPIO03 PULSESKIP (Not used) - - - -GPIO04 Not used - - - -GPIO05 CIRES_N_MEGA O GPIO High LowGPIO06 HS_AMP_EN O GPIO Low HighGPIO07 Not used - - - -GPIO10 UARTRX0 I UART0 High LowGPIO11 UARTTX0 O UART0 High LowGPIO12 AUDIO_AMP_EN O GPIO Low HighGPIO13 HS_SPK_SEL O GPIO Low(Headest) High(Speaker)GPIO14 Not used - - - -GPIO15 Not used - - - -GPIO16 Not used - - - -GPIO17 I2C_MEGA_EN O GPIO Low HighGPIO20 CAM28_EN O GPIO Low HighGPIO21 Not used - - - -GPIO22 3D_OFF O GPIO Low HighGPIO23 Not used - - - -GPIO24 UARTRX3 I UART3 High LowGPIO25 UARTTX3 O UART3 High LowGPIO26 UARTCTS3 I UART3 - -GPIO27 UARTRTS3 O UART3 - -GPIO30 Not used - - - -GPIO31 CAM18_EN O GPIO Low HighGPIO32 KEY_LED_ONOFF O GPIO Low HighGPIO33 Not used - - - -GPIO34 BTF_REG_EN O GPIO Low HighGPIO35 Not used - - - -GPIO36 3D_CTRL2 O GPIO Low HighGPIO37 TF_DETECT I GPIO Low HighGPIO40 USBSENSE I GPIO Low HighGPIO41 3D_CTRL1 O GPIO Low HighGPIO42 Not used - - - -GPIO43 FOLDER_DET I GPIO Low(Closed) High(Open)GPIO44 Not used - - - -GPIO45 TP601(Not used) - - - -GPIO46 BL_SLEEP_EN O GPIO Low HighGPIO47 Not used - - - -
3. Technical Brief
- 33 -
3.1.8 USB
The USB block supports the implementation of a "full-speed" device fully compliant to USB 2.0standard. It provides an interface between the CPU (embedded local host) and the USB wire, andhandles USB transactions with minimal CPU intervention.The USB specification allows up to 15 pairs of endpoints. Data for each endpoint is buffered in RAMwithin the USB block and is read/written from the endpoint FIFO using DMA transfers or FIFO registeraccess. High-speed (high throughput) endpoints can use DMA while slower endpoints can use FIFOregister access. The USB block can request up to six DMA channels, three for IN endpoints and threefor OUT endpoints.
USB regulator input voltage is 5V and uses external USB device power through IO Connector.Output voltage is 3.3V and supplies to MARITA USB block.USB is detected by MARITA GPIO40(USBSENES).• VUSB / (10K + 51K) = VUSBSENSE / 51K
USB Function Note
USBDP USB differential (+) line
USBDM USB differential (-) line
USBSENSE (GPIO40) USB detection (input)
USBPUEN USB Pull-up control
VDDUSB Power supply for MARITA USB block
Table 3-1-5. USB Signal Interface of MARITA
Figure 3-1-7. Schematic of USB Regulator
C509100p
10K
R514
R513
51K
N501
LP2985IM5X-3.3
3.3V USB Regulator
4BYPASS
2GND
3ON_OFF
VIN1 5
VOUT
VUSB
1608
C508
4.7u2.2u1608
C510 USBSENSE
VBUS
PWRRSTn
3. Technical Brief
- 34 -
Figure 3-1-8. Schematic of MARITA USB block
Figure 3-1-9. Schematic of USB filter
USB J20USBDM
J15USBDP
USBPUENH19
USBPUEN
USBDPUSBDM
3_3V5
D11
D23 4
D3
D46
2GND
L701
NUF2221W1T2
USB FILTER
USBDM
USBDP
USBPUEN
VBUS
3. Technical Brief
- 35 -
3.1.9 Folder ON/OFF Detection
There is a magnet to detect the folder status, opened or closed.If a magnet is close to the hall-effect switch(U1 on Keypad), the voltage at Pin 1 of U1 goes to 0V.Otherwise 2.8V.This folder signal is delivered to MARITA GPIO43(FOLDER_DET).
Figure 3-1-10. Folder ON/OFF Detector
VDIG
100KR1
C20.1u
7PGND
6VDD
U1A3212EEH-T
Folder Detect
3GND1
GND24
2NC1
5NC2
1OUTPUT
10pC1
FOLDER_DET
3. Technical Brief
- 36 -
3.1.10 Bluetooth Interface
U8550 supports Bluetooth operation using Philips’ BGB202/S2 Bluetooth module.
A. General DescriptionThe Bluetooth interface utilizes the UART interface for control signals going to and from the Bluetoothmodule. The UART is also used for data transmissions. It uses the PCM interface for transmittingaudio to and from the Bluetooth module.The Bluetooth module uses both the 13 MHz master clock signal and the 32,768 kHz low-frequencyclock signal for internal timing within the Bluetooth module. The intention is to use the low-frequencyclock as a low-power timing provider and to use the 13 MHz as a high precision timing reference usedmainly by the Bluetooth radio during operation. The clock request mechanism is used to minimizecurrent consumption for the total system. The intention is to use the CLKREQ signal to ask for themaster clock when needed, for example, when the Bluetooth radio is operating.
B. UART InterfaceThe UART interface is a standard interface and it includes the handshake signals RTS and CTS.The following speeds can be achieved:9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600, and 1843200 bauds/s.
C. PCM InterfaceThe PCM interface is used to send audio to and from the Bluetooth module. The interface is asynchronous interface using a PCM clock and a PCM sync signal for synchronization. Two datasignals are used for data, one in each direction. The PCM clock signal operates at frequencies as highas 1 MHz. The word length of the audio data can be 8 or 16 bits. Furthermore, the PCM interface hasa function known as MP-PCM, which is an addressing scheme, used to have more than two devicestalking on the bus. To add this function, the data pins have to be bi-directional. Additionally, theposition of the audio data relative to the frame sync pulse must be selectable. During the periodswithin a frame that a device is not transmitting audio data, it must put both PCM data signals in a high-impedance state to allow other devices access.
D. Master Clock and Clock Request InterfaceThe master clock (MCLK) is a 13 MHz signal used as the high precision clock signal for the Bluetoothmodule. The signal can be switched on and off by the platform. The master clock request (CLKREQ) isused by the Bluetooth module to ask for the master clock.If the Bluetooth module asserts the signal high, it gets the master clock. The other alternative for theBluetooth module is to set the clock request output to high impedance state, indicating that it does notneed the master clock. The Bluetooth module receives the master clock, if other parts of the chipsetrequest it.
E. Low Frequency Clock InterfaceThe low-frequency clock signal (RTCCLK) is used by the Bluetooth module as a low-power clock. Theclock is used in different Bluetooth modes, like sniff and park, to have a correct timing on the Bluetoothair interface without having the master clock running. The low-frequency clock is always present, insome applications even when the chipset is powered down.
3. Technical Brief
- 37 -
F. BGB202/S2
• General- Full module (BB+RF) : Only need to external antenna and reference clock- Bluetooth Specification version 1.1- Dimensions : 7 x 8 x 1.3 mm- Power class 2 : 10m
• Radio Part- Fully integrated near-zero-IF receiver with high sensitivity (typical -82dBm)- Advanced DC offset compensation for improved reception quality- RSSI with high dynamic range- Programmable output pre-amplifier- Fully integrated low phase noise VCO operating in the 5 GHz frequency range- Internal shielding for better EMI (Electro Magnetic Interference) immunity.
• Baseband Part- Embedded ARM7TDMI microprocessor- 224 kBytes embedded ROM, 32 kBytes SRAM and 8 kBytes internal RAM (iRAM) for BB controller- Watchdog timer and Two 32-bit system timers- Bluetooth controller including scrambling, CRC generation/checking, FEC encoding/decoding and
ciphering according the Specification of the Bluetooth System, Version 1.1- Bluetooth connections supporting : Maximum 3 active connections (ACL)
One voice connection (SCO)- CVSD transcoder- RF interface- RSSI measurement- On-chip 1.8 V voltage regulator- 8-bit D/A and A/D conversion for various purposes, e.g. PA control- Power-on reset- System clock crystal oscillator- Low-power crystal oscillator for a low-frequency clock input- System clock request signal for control of external clock source- Microprocessor interfaces including UART, I2C-bus, combined PCM/IOM® and general purpose
I/O-pins- PATCH mechanism for code updates and corrections
• Firmware- Interface drivers- Bluetooth controller driver- Link Controller (LC)- Link Manager (LM)- Host Controller Interface (HCI)
3. Technical Brief
- 38 -
G. U8550 Bluetooth Schematic
• Clock- Clock request→ Connected to CLKREQ of MARITA and VINCENNE, input to WOPY- Fast clock : 13MHz→ Supplied MCLK from WOPY→ Frequency deviation : ±10ppm→ If level of MCLK is less than 400mVpp, connect to 1.8V through R652(120K)- Slow clock : 32.768kHz→ Supplied RTCCLK from MARITA
• Power- Supplied 2.85V from external regulator (U510, controlled by GPIO34 of MARITA)→ NRESET, UART, PCM, GPIO[2-9]- 1.8V is generated by internal regulator of BGB202/S2→ Baseband core, GPIO[10-14], SysClkReq, JTAG
• Reset- RESOUT2n signal of MARITA controls BGB202/S2 reset.
• UART- Connected to UART3 of MARITA- HCI interface between MARITA and BGB202/S2
• PCM- Audio signal interface between MARITA/VINCENNE and BGB202/S2
• ANT- 2.4GHz, 50 ohm matching- Antenna switch(CN601) is used for Bluetooth calibration
C647 22p
120KR652120K
100pC642
22KR650
C6410.1u
0.1uC646
VBT
100pC643
R649 NA
ANT601
FEED
NC1
NC2
R651 0
33pL602
3G
ND
14
GN
D2
GN
D3
5G
ND
46
1IN OU
T 2
CN601
MM8430-2600B
10uC640
2012
27nHL601
20121R648
0.1uC645
39VDDIORFVDD_IOV
38
VREG1840
19XTAL1_LPO
29XTAL1_SYS
XTAL2_LPO18
XTAL2_SYS28
33GPIO7_FSC_IPGPIO8_DCLK_IP
36
GPIO9_DB_IP34
15GP_CLK
53PGND
27POR_DISABLE
REF_CLK30
45RESET_N TCK_JTAG
50
49TDI_JTAG
TDO_JTAG48
47TMS_JTAG
17VANLI
VANLO22
VBAT16
37VDD18
GND678
GND7GND8
910
GND9
21GPIO0GPIO1
20
25GPIO10
GPIO112431
GPIO1223
GPIO13GPIO14
32
GPIO2_CTS_UART4441
GPIO3_RTS_UART43
GPIO4_TXD_UARTGPIO5_RXD_UART
42
35GPIO6_DA_IP
Bluetooth (BGB202/S2)
1_8V
_DE
CO
UP
126
1_8V
_DE
CO
UP
246
ANT2
1GND1
GND101112
GND11GND12
1314
GND13GND14
5152
GND15
GND234
GND3GND4
56
GND5
U604 BGB202_S2
R656 33p
UARTRX3UARTCTS3UARTRTS3
UARTTX3
PCMCLK
PCMDATB
CLKREQ
MCLK
RTCCLK
PCMSYN
PCMDATA
RESOUT2n
Figure 3-1-11. Schematic of Bluetooth module (BGB202/S2)
3. Technical Brief
- 39 -
3.1.11 TransFlash Interface
U8550 supports the TransFlash interface as external memory card.TransFlash has 4-data line, but U8550 uses only 1-data line.All control and data line is connected to MARITA
• Card detection- When there are no card in TransFlash socket, TF_DETECT pin is Low.- If card is inserted in socket, because TransFlash has internal pull-up, TF_DETECT pin changes
High.- VTF is always supply power.- If card is removed, TF_DETECT pin changes Low.
TransFlash Interface
TF_DETECT Card detection, connected to GPIO37 of MARITA
TF_CMD Command/Response
TF_CLK Clock
TF_DAT Data line
VTF Supply voltage from 2.85V external regulator(U510)
VTF
100K
R65
5
DAT1_RSV
DAT2_RSV
GND
GND
VDD
VSS
Trans-Flash
500873-0802S601
CD_DAT3_CS
CLK_SCLK
CMD_DI
DAT0_DO
R653
470K
1uC
636
1608
0.1u
C64
4
100K
R65
4
TF_DETECTTF_CMD
TF_CLK
TF_DAT
Table 3-1-6. TransFlash Interface
Figure 3-1-12. TransFlash and Schematic of TransFlash Interface
3. Technical Brief
- 40 -
3.1.12 Power On Sequence
➀ User presses END key and then ONSWAn signal is changed to Low.➁ VINCENNE initiates the internal oscillator and powers on the regulators.➂ VINCENNE generates a power for MARITA.➃ VINCENNE releases the power reset signal(PWRRSTn) and generates an interrupt(IRQ0n) to
MARITA.
MARITA
RESPOW_N
IRQ0_N
VIN CENNE
PWRRST
IRQ
ONSWA
Power for MARITA
PWRRSTn
IRQ0nONSWAn
Press END key
Figure 3-1-13. Power On Sequence
3. Technical Brief
- 41 -
Table 3-1-7. Key Matrix Mapping Table
Figure 3-1-14. Schematic of Keypad
END1
END
EV
L14
K02
200
VA
1
VA
2E
VL
14K
0220
0
SIDE2
SIDE3
NA
GAME1
C4
GAME
22
DOWNDOWN1
470
R28
BACKBACK1
NAC5
OK1
OK
68
CN21234
SHARP1
#
SIDE KEY Keypad
R27 470
9
8
44
D1
R24
470
1SS388
1
1 *
SEARCH1
STAR1
SEARCHMULTI1
MULTI
EV
L14
K02
200
VA
3
SIDE1
10
0
97
CAM
75
470
R25
CAM1
RIGHTRIGHT1
CLEAR
TV
S3
UC
LA
MP
0501
H
INS
TP
AR
CLEAR1
6
5
MENU1
MENU
3
3
LEFTLEFT1SEND1
SEND
UP1
UP
C6NA
KE
YIN
0
KE
YIN
1
KE
YIN
2
KE
YIN
3
KE
YIN
4
KEYOUT2
KEYOUT4
KEYOUT3
KEYOUT1
KEYOUT5
ON
SW
An
KEYOUT0
3.1.13 Keypad
There are 26 buttons, 3 side keys and 3 MOD keys.‘END’ key is connected to ONSWAn for Vincenne.
KEYIN0 KEYIN1 KEYIN2 KEYIN3 KEYIN4
KEYOUT0 SIDE1 SIDE2 SIDE3
KEYOUT1 MENU SEARCH MULTI CAM OK
KEYOUT2 1 4 7 * UP
KEYOUT3 2 5 8 0 DOWN
KEYOUT4 3 6 9 # RIGHT
KEYOUT5 SEND CLEAR BACK GAME LEFT
3. Technical Brief
- 42 -
KEYIN1 KEYIN2 KEYIN3
GND RIGHT CENTER LEFT
Table 3-1-8. MOD Key Matrix Mapping Table
Figure 3-1-15. Schematic of MOD Keypad
RIGHT
CENTER
LEFT
KEYIN1KEYIN2KEYIN3
DCIN_3
CPO_LTC_LCDBL
3. Technical Brief
- 43 -
3.2 GAM Hardware Subsystem
3.2.1 General Description
The Graphics Accelerator Module (GAM) subsystem provides hardware support in the creation ofvisual imagery and the transfer of this data to the display. GAM also provides support for the cameramodule. The visual data could be graphics, still images or video. The GAM subsystem consists of fivemodules:
• GRAM : graphics memory (160 kB).
• GAMCON : GAM controller.
• GRAPHCON : graphics controller.
• PDI/SSI : programmable display interface for parallel/serial displays.
• CDI : camera data interface.
Figure 3-2-1. GAM Subsystem Functional Block Diagram
GAM
AHB2 (DMA)
AHB1 (CPU)
CIPCLK
CID [7:0]
CIVSYNC
CIHSYNC
CIRES_N
control
MUXMUX
PDIRES_N
PDIC [4:0]
PDID [7:0]
AHB Slave AHB Slave
CDI
PDI/SSIGRAPHCON
GAMCONGRAM
160k byteCameraModule
DisplayModule
3. Technical Brief
- 44 -
3.2.2 Block Description
A. GAM Controller(GAMCON)
The GAM Controller (GAMCON) is responsible for clock gating and distribution within the GAMmodule. GAMCON receives the HCLK from SYSCON and distributes to GRAPHCON, GRAM, PDIand CDI. GAMCON also distributes the GAM reset signal to GRAPHCON, GRAM, PDI and CDI.The reset signals CIRES_N and PDIRES_N are distributed from GAMCON to the camera and displaymodule respectively, see Figure 2.28. The CIPCLK is used to clock the received data into the cameradata interface. The CIPCLK can be in the range of 100 kHz to 16 MHz.
B. Graphics RAM (GRAM) Block
GAM includes 160 kB of graphics memory (GRAM) in order to support display screen sizes of QCIF +alfa display size and three frame buffers when decoding QCIF video.The GRAM can be accessed in 8, 16 or 32-bit mode. Write access takes a single AHB clock cycle.Non-sequential read and the first access of a sequential read access takes two AHB clock cycles.Subsequent sequential read access take a single AHB clock cycle.The GRAM contains both frame buffer and temporary data. There are three image areas with oneused for normal MMI graphics and the other two areas used for still images, video frames or cameraframes. The three image areas can be combined into one frame buffer.GRAM is required to transfer a VGA (640 by 480 pixels) image from the camera data interface (CDI)over DMA at 100 MBit/s, within a 50 ms timeframe. The GRAM is used as a buffer, but the averagetransfer bandwidth required is approximately 3 Mword/s (32-bit word), that is 12 MByte/s.
C. Graphics Controller (GRAPHCON) Block
GRAPHCON is controlled by the application CPU and can perform operations on pixels and imageareas. Images can be moved and merged with other images and text.The GRAPHCON block receives graphical objects from GRAM and performers the appropriategraphical manipulation. The resulting data is transfers to the display interface (PDI).GRAPHCON can receive images from the camera data interface (CDI) and send them to the PDIautomatically. GRAPHCON performs conversion from YUV to RGB and can scale (zoom) still or videoimages.
D. Programmable Display Interface (PDI) Block
The programmable display interface (PDI) is designed to interface both parallel and serial displaymodules. The display data is transferred from the 32 word FIFO on GAMCON to the display modulevia the PDI block. The PDI block is built around a micro controller and executes 16-bit instructionwords to individually control the I/O ports. It has a 128 byte program memory, programmable by theCPU, which can store up to 64 instructions.The CPU transfers all set-up and control data to the display. Data is transferred to PDI as 32-bit words,which in turn writes 8-bit data to the display. The programmable PDI block is configured at thesoftware build stage, to support either parallel interface such as PPI or serial interface such as SSI orI2C.
3. Technical Brief
- 45 -
E. Camera Data Interface (CDI) Block
The camera data interface (CDI) block is designed to support a range of still image camera modules.An 8-bit parallel bus supports data transfer from the camera module to the CDI.The pixel clock is an output clock from the camera module to the CDI and qualifies the data on theparallel bus. One byte of data is captured on each rising edge of the pixel clock. CDI allows the pixelclock to be in the range of 100 kHz to 16 MHz.The horizontal synchronization line is an input from the camera module and defines one scanline ofimage data. The horizontal synchronization line can be programmed to be active high or low. Thevertical synchronization line is an input from the camera module and defines one image frame (imageheight) of data. The vertical synchronization line can be programmed to be active high or low.The frame rate can be adjusted by skipping frames and various interrupts are used to inform theapplication CPU regarding the progress of incoming images and potential errors. The normal dataformat on the data bus is YUV 4:2:2 (raw binary image data) according to the CCIR-656 standard. Afunction within the CDI can be programmed to reorder the YUV parameters as they pass through theCDI. In addition, the CDI is able to detect the end of an image and perform some truncation as well asoverflow conditions. There is nothing preventing the use of other data types such as JPEG or RGB (aslong as the timing is followed), but only YUV data can be sent to the display.Camera images can also be sent to a DMA channel to store the image in external memory.The I2C interface and GPIO are part of the interface to the camera module, but they are not part of theCDI block. The I2C is used to set-up and control the camera module.The camera module I2C lines must go high impedance when the supply is removed from the camera.The I2C commands needed to control the camera, as well as the functional behavior of the module,are also different for each implementation.The ON-signal (GPIO) is used to power-on the camera from Standby or Off mode (implementationdependent). This signal must be held low when the mobile equipment is powered down and during themobile equipment reset period. The GPIO pin can also be an input or high impedance during mobileequipment reset and start. In this case, it must have pull-down to ground.The camera module reset signal is an output to the camera module.
3.2.3 Camera & Camera FPC Interface
3. Technical Brief
- 46 -
1.3M CAMERA CONNECTOR
LCD, VGA CAMERA CONNECTOR
R731 0
0R
721
R720 NA
C1919NA
R719 NA
VC
AM
_2.8
V
0R732
C705
20p
VC
AM
_2.8
V
0R726
20pC706
NAC1920
NAR709
10K
R730 R724
10K
R714 0
FB
702
R728
NA
0R701
0R715
NAR712
0R702
VC
AM
_VG
A_2
.8V
NA
C70
3
FL703 5G
110
G2
1INOUT_A1
INOUT_A22
3INOUT_A3
INOUT_A44
INOUT_B19
8INOUT_B2
INOUT_B37
6INOUT_B4
ICVE21184E150R101FR
C70
1N
AN
AC
702
0R717
R725 0
R79
9
10
FL706NFA21SL207X1A45L
G1
5
G2
10
1IN1
IN22
3IN3
IN44
OUT19
8OUT2
OUT37
6OUT4
R722 NA
NFA21SL207X1A45L
5G
110
G2
IN11
2IN2
IN33
4IN4
9OUT1
OUT28
7OUT3
OUT46
474849
5
50
6789
FL705
313233343536373839
4
40414243444546
171819
2
202122232425 26
272829
3
30
CN70151 52
53 54
1
10111213141516
VD
IG
NA
R729
NA
R72
3
51R718
NAR711
NA
C70
4
C707
VC
AM
_2.8
V
NA
VC
AM
_1.8
V
51R716
INOUT_B19
8INOUT_B2
INOUT_B37
6INOUT_B4
ICVE21184E150R101FR
FL7045G
110
G2
1INOUT_A1
INOUT_A22
3INOUT_A3
INOUT_A44
2526
3456789
G1 G2
G3 G4
10111213 14
1516171819
2
2021222324
CN702
1
R710 NA
R713
CIRES_N_MEGA
CIRES_N_VGA
NA
I2CDAT_VGA
I2CCLK_MEGAI2CDAT_MEGA
CID0CID1CID2CID3
CID4CID5CID6CID7
CPO_LTC_LCDBL
KEYIN2
DCIN_3
IND_SINK
SYSCLK1
CIHSYNC
KEYIN1
KEYIN3
CIPCLK
I2CCLK_VGACIVSYNC
CIHSYNC
CIPCLK
SYSCLK1CIVSYNC
FLASH3FLASH2FLASH1
CPO_LTC_FLASH
Figure 3-2-3. Main Board to FPCB Connector(50pin,26pin - Main Board)
Figure 3-2-2. Camera Interface (in Marita)
CAMERA I/F
LCD I/F
2
31
PMST3904Q601
R602
100K
NA
R2243
100K
R618
VDIG
NO
1C
4
NO
2A
4
V+B4
CO
M1
C3
CO
M2
A3
GNDB1
IN1
C2
IN2
A2
NC
1C
1
NC
2A
1
DG3516DB-T5-E1
U601
VDIG
0.1uC616
C6170.1u
VDIG
VS
SA
0W
13V
SS
A1
V14
VS
SA
2
G14B20
PDID7
PDIRES_ND19
PDIC0C19D18
PDIC1PDIC2
C20C21
PDIC3PDIC4
E18
PDID0B18D17
PDID1C18
PDID2PDID3
B19A20
PDID4H13
PDID5PDID6
I2CSCLY2W3
I2CSDA
G21
H18CIPCLK
CIRES_NE19
CIVSYNCH15
E20CID0CID1
E21
CID2H14F19
CID3F20
CID4G18
CID5CID6
G19G20
CID7
CIHSYNC
NA
R2246 R2247
NA
R2242
NA
R630
3.3K
VCORE
3.3K
R609
1.2K
R610
NA
R2245R2244
NA
NAR611
U602
DG3516DB-T5-E1
C3
CO
M1
A3
CO
M2
B1GND
C2
IN1
A2
IN2
C1
NC
1
A1
NC
2
C4
NO
1
A4
NO
2
B4V+
VDIG
VDIG
R601
4.7KVDIG
VDIG
I2CDAT_MEGA
I2CCLK_MEGA
I2CDAT_VGA
I2CCLK_VGA
I2C_VGA_EN
I2CCLK_DRIVER
I2C_MEGA_EN
I2CCLK
I2CDAT
CIVSYNC
CIRES_N_VGA
CIPCLK
CIHSYNC
CID7CID6CID5CID4CID3CID2CID1CID0
LCDRSLCDWRXLCDCSX_SUBLCDRESX
PDID7PDID6PDID5PDID4PDID3PDID2PDID1PDID0LCDRDXLCDCSX_MAIN
3. Technical Brief
- 47 -
RIGHT
CENTER
0
R4
LEFT
LD1
LEBB-S14H
LD2
LEBB-S14H
R3
0
20
3456789
CN3
AXK720145G
1
10 1112131415161718192
VGA Camera Connector
VD
IG
9
VC
AM
_VG
A_2
.8V
40414243444546474849
5
50
678
25 26272829
3
30313233343536373839
4
111213141516171819
2
2021222324
CN2
HEADER
51 52
53 54
1
10
0R11 AXK8L50125BG
R10 0R12 10
1u
1u
C4
C5
CID5
IND_SINK
CIRES_N
CID1CID2CID3CID4
KEYIN1KEYIN2KEYIN3
DCIN_3
CID0
CIPCLK
SYSCLK1
CPO_LTC_LCDBL
CID6CID7
CIVSYNCCIHSYNC
I2C_DATI2C_CLK
Figure 3-2-5. Main Board to LCD FPCB Connector(50pin - FPCB)FPCB to VGA camera Connector(20pin - FPCB)
Figure 3-2-4. Main Board to camera FPCB Connector(26pin - FPCB)FPCB to 1.3M camera Connector(24pin - FPCB)
VC
AM
_1.8
V
222324
3456789
VC
AM
_2.8
_AV
DD
VC
AM
_2.8
_DV
DD
VC
AM
_2.8
_DV
DD
1
101112 13
141516171819
2
2021
FPCB-to-1.3M Connector
CN2
89
G1
G2
VC
AM
_1.8
V
VC
AM
_2.8
_AV
DD
171819
2
20212223242526
34567
CN1
MAIN-to-FPCB Connector
1
1011121314
1516
EDLM0005801
LD1
R1
51
CID1CID0
CID0
CPO_LTC_FLASHFLASH1FLASH2FLASH3
CIPCLK
CIPCLK
CID7
CID7CID6
CID6CID5
CID5CID4
CID4CID3
CID3CID2
CID2CID1
I2C_CLK
I2C_CLKI2C_DAT
I2C_DAT
CIVSYNC
CIVSYNCCIHSYNC
CIHSYNC
SYSCLK
SYSCLK
CIRES_1.3M
CIRES_1.3M
- 48 -
The 1.3M Camera module is connected to main board(AXK7L26227) with Camera FPCB(AXK8L26125). The VGA Camera module is connected to main board(AXK7L50227) with Camera &LCD FPCB(AXK8L50125). 1.3M Camera module is connected to FPCB with 24-pin Board to Boardconnector(14-5602-024-000-829 - 1.3M Camera). VGA Camera module is connected to FPCB with20-pin Board to Board connector(AXK720145 - VGA Camera). Its interface is dedicated camerainterface port in Marita. The camera port supply 13MHz master clock to camera module and receive17MHz pixel clock(15fps), vertical sync signal, horizontal sync signal, reset signal and 8bits YUV datafrom camera module. The camera module is controlled by I2C port.
NO Pin Name I/O Description1 GND O Analog Ground 2 D7 O Digital video data bit[7]3 D6 O Digital video data bit[6]4 D5 O Digital video data bit[5]5 D4 O Digital video data bit[4]6 D3 O Digital video data bit[3]7 D2 O Digital video data bit[2]8 D1 O Digital video data bit[1]9 D0 O Digital video data bit[0]10 PCLK O Clock for output data11 RESET I Reset12 STANDBY P Digital Ground13 DGND P Digital Ground14 DVDD P Digital Core Voltage(1.8V)15 DVDD P Digital interface Voltage(2.8V)16 AVDD P Analog Voltage(2.8V)17 GND P Interface Ground18 MCLK I System Clock19 HREF O Horizental sync signal20 VSYNC O Vertical sync signal21 GND P Interface Ground22 SDA I/O Serial data I/O for 12C bus23 SCK I/O Clock for output data24 GND P Analog Ground
NO Pin Name I/O Description1 STANDBY In Stanby mode 2 MCLK In System Clock Input3 GND Gnd Frame Synchronous Signal4 PCLK Out Pixel Clock5 D0 Out Image data output6 D1 Out Image data output7 D2 Out Image data output8 D3 Out Image data output9 D4 Out Image data output10 D5 Out Image data output11 D6 Out Image data output12 D7 Out Image data output13 VSYNC Out Vertical Synchronization Reference14 HSYNC Out Horizontal Synchronization Reference15 GND Gnd Ground16 SDA In/Out Serial Bus Data17 SCL In/Out Serial Bus Clock18 RESET In Reset19 DVDD 2.8V Power 2.8V Digital Power20 AVDD 2.8V Power 2.8V Analog Power
Table 3-2-1. Interface between 1.3M Camera Module and FPCB (in FPCB)
Table 3-2-2. Interface between VGA Camera Module and FPCB (in FPCB)
3.2.4 Camera Regulator
GPIO_31 enables the 1.8V Camera Regulator for the 1.3M Camera Digital Core. GPIO_20 enablesthe MEGA_2.8V Camera and GPIO_02 enables the VGA_2.8V Camera Regulator.
- 49 -
Figure 3-2-6. 1.3M 2.8V and 1.8V Camera Regulator
C522
16081u
VCAM_2.8V
R527 0
0.47u1608
C523
0R526
100K
R528
VBATI
R1114N281D-TR-F
U503
3CE
2GND
4NC
VDD1
VOUT5
MEGA_2.8V Camera Analog Power
CAM28_EN
VCAM_1.8V
R508
0R507
100K
VBATI
R501
0
2.2u1608
C5041u
C501
1608
R1114N181D-TR-F
U502
CE32
GNDNC
4
1VDD VOUT
5
1.8V Camera power
CAM18_EN
Figure 3-2-7. VGA 2.8V Camera Regulator
R505 0
C5021u
1608
R503 0
0.47uC503
1608
U501
R1114N281D-TR-F
CE3
GND2
NC4
1VDD
5VOUT
VGA_2.8V Camera Analog Power
VCAM_VGA_2.8VVBATI
R504
100K
CAM28_VGA_EN
3. Technical Brief
- 50 -
3.2.5 Display & LCD FPC Interface
LCD module include device in table 3-2-3
The LCD Module is connected to FPCB with the 40-pin Board to Board Connector(AXK8L40125) andReceiver, 2 blue Indicator/backlight LEDs are connected by soldering in the Camera & LCD FPCB.The Main&Sub LCD are controlled by 8-bit PDI(Parallel Data Interface) in Marita. In case of power offmode, if TA is inserted, 2 blue Indicator LEDs are turned-on.
Table 3-2-3. Devices in LCD Module
Table 3-2-4. Interface between Camera&LCD FPCB and Receiver, Vibrator,Indicator LEDs and Camera Flash LEDs
Device Type
Main LCD 220 X RGB X 220 262K Color TFT LCD
Sub LCD 128 X RGB X 160 262K Color TFT LCD
Main/Sub LCD Backlight 5 White LEDs (simultaneously)
NO Pin Name Pin Type Description
Indicator LEDs
20 DCIN_3 O Indicator LEDs Power
10 IND_SINK I Indicator LEDs Ground
Receiver Terminal
48 EARM O Receiver Minus
49 EARP O Receiver Plus
3. Technical Brief
- 51 -
NO Pin Name Pin Type Description Unused Pin1 VCC - The Logic Power Supply for LDI and LCM -2 VCI - The Analogue Power Supply for LDI and LCM -3 S_RESET I Sub Reset Pin. Initialize the LSI at the low level -4 M_RESET I Main Reset Pin. Initialize the LSI at the low level -5 SUB_CS I Sub Chip Select, Active low -6 D0 I/O Bi-Direction Data Bus GND
7 L D1 I/O Bi-Direction Data Bus GND8 D2 I/O Bi-Direction Data Bus GND9 D3 I/O Bi-Direction Data Bus GND10 D4 I/O Bi-Direction Data Bus GND11 D5 I/O Bi-Direction Data Bus GND12 D6 I/O Bi-Direction Data Bus GND13 D7 I/O Bi-Direction Data Bus GND14 MLED I Anode of LEDS -15 MLE1 O Cathode of LED1 -16 MLE2 O Cathode of LED2 -17 MLE3 O Cathode of LED3 -18 MLE4 O Cathode of LED4 -19 GND - Ground -20 GND - Ground -21 MLED5 O Cathode of LED5 -22 MAIN_IF2 I Main Mode Select2 (See Table 7.1) -23 SUB_IF2 I Sub Mode Select2 (See Table 7.2) -24 GND - Ground -25 BST O Indicate the start of Vertical Blank. OPEN26 D15 I/O Bi-Direction Data Bus GND27 D14 I/O Bi-Direction Data Bus GND28 D13 I/O Bi-Direction Data Bus GND29 D12 I/O Bi-Direction Data Bus GND30 D11 I/O Bi-Direction Data Bus GND31 D10 I/O Bi-Direction Data Bus GND32 D9 I/O Bi-Direction Data Bus GND33 D8 I/O Bi-Direction Data Bus GND34 _WR I Write-Strobe Signal. Active low -35 MAIN_CS I Main Chip Select, Active low VCC36 RS I Select Register. High: Control, Low: Index/Status VCC37 MAIN_IF1 I Main Mode Select1(See Table 7.1) -38 ID_MAKER - Connected to Ground OPEN39 SUB_IF1 I Sub Mode Select1(See Table 7.2) -40 _RD I Read-Strobe Signal. Active low VCC
Table 3-2-5. Interface between LCD module and FPCB(in FPCB)
3. Technical Brief
- 52 -
3.2.6 Main&Sub LCD Backlight Illumination
There are 5 white LEDs for the Main LCD and the Sub LCD Backlight circuit which are driven by theCharge Pump(LTC3206EUF). I2C is used for the backlight brightness control. GPIO_46 enables theCharge Pump IC.
3.2.7 Camera Flash LED Illumination
Camera Flash is composed of one White LED module(LEWW-S35LA with 3 LEDs). The ChargePump(LTC3206EUF) control similarly the flash LED current respectively.
Figure 3-2-8. Charge Pump Circuit for Main&Sub LCD Backlight
2.2uC711
1uC
710
R737 01u
C71
4
R734 NA
10
GREEN17
11IM
S
12IR
GB
MAIN122
MAIN22120
MAIN319
MAIN4
PG
ND
25
RED16
SCL98
SDA
13S
GN
D
SUB112
SUB2
15VIN
U701LTC3206EUF
LCD BL and Cam Flash Driver LTC3206
23AUX1
AUX224
BLUE18
5C
1+
4C
1-6
C2+
3C
2-
CPO14
DVCC7
ENRGB
R73
63K
2.2uC708
2.2u
C712 C709
2.2u
VBATI
0R739
1uC
713
0
R738
1u
R73
512
K
C71
6
0R740
1uC
715
R733 0
I2CCLK_DRIVERI2CCLK
LCDBL1LCDBL2LCDBL3LCDBL4LCDBL5
BL_SLEEP_EN
FLASH1I2CDATFLASH2FLASH3
CPO_LTC_FLASHCPO_LTC_LCDBL
Figure 3-2-9. Camera Flash
Charge Pump Circuit
Figure 3-2-10. Camera Flash
LEDs Circuit (in FPCB)
1uC
710
1uC
714
GREEN17
MAIN122
MAIN22120
MAIN319
MAIN4
RED16
SUB112
SUB2
U701LTC3206EUF
23AUX1
AUX224
BLUE18
4C
1-6
C2+
3C
2-
CPO14
2.2uC7080R739
1uC
713
1uC
716
0R740
1uC
715
LCDBL1LCDBL2LCDBL3LCDBL4LCDBL5
FLASH1FLASH2FLASH3
CPO_LTC_FLASHCPO_LTC_LCDBL
234
CN1
1
EDLM0005801
LD1
R1
51
CPO_LTC_FLASHFLASH1FLASH2FLASH3
3. Technical Brief
- 53 -
3.2.8 Keypad Illumination
There are 19 blue LEDs in key board backlight circuit, which are driven by GPIO32(KEY_LED_ONOFF) line form Marita.
Figure 3-2-11. Keypad Backlight Blue LED Interface
R741 2.7K
12
R742
EMX18Q701
Keypad Backlight Control
2
56
31
4
12
R727
KEY_LED_ONOFF
KEY_LED-
Figure 3-2-12. Keypad Backlight Circuit
150
R15
150
R4
LD
11L
EB
B-S
14H
R23
150
LD
10L
EB
B-S
14H
LE
BB
-S14
HL
D9
R29
150
LE
BB
-S14
HL
D5
LE
BB
-S14
HL
D13 LD
2L
EB
B-S
14H
150
R31
LD
4L
EB
B-S
14H
LE
BB
-S14
HL
D7
150
R3
VBATI
0.1uC3
PG05DBTFC
R32 100K
R5
150
150
R10R2
150
R26
150
R14
150
LE
BB
-S14
HL
D12
150
R30
LD
8L
EB
B-S
14H
LD
6L
EB
B-S
14H
LE
BB
-S14
HL
D1
LE
BB
-S14
HL
D3
R6
150
PG05DBTFC
R34 100K
100KR33
PG05DBTFC
KEY_LED-
3. Technical Brief
- 54 -
3.3 LCD Module
Figure 3-3-1. LCD Module Block Diagram
Figure 3-3-2. LCD Module (Main & Sub LCD)
LCD Module Camera&LCD FPCB Main Board
Ear Piece
VGA Camera
50pin BtoBConnector
40pin BtoBConnector
20pin BtoBConnector
3. Technical Brief
- 55 -
3.4 Analog Baseband (ABB) Processor
3.4.1 Overview of Audio path
Figure 3-4-1. Audio Path Block Diagram
Digital Baseband ASIC
Voice Call RX
Tone Generator
Voice Call TX
Audio and PowerManagement ASIC
CODEC
Audio Mixer
MARITA
VINCENNE
MIDI or WAVE
MP3
Videp Telephony TX
Videp Telephony RX
Receiver
Filter
TJATTE2 C-MIC
3D IC
AUDIO AMP
Speaker
HEADSET
Analog S/W
Speaker
HEADSET AMP
3. Technical Brief
- 56 -
3.4.2 Audio Signal Processing & Interface
Audio signal processing is divided Uplink path and downlink path.The uplink path amplifies the audio signal from MIC and converts this analog signal to digital signaland then transmit it to DBB Chip (MARITA).This transmitted signal is reformed to fit in GSM & WCDMA Frame format and delivered to RF Chip.The downlink path amplifies the signal from DBB chip (MARITA) and outputs it to Receiver (orSpeaker). The audio interface consists of PCM encoding and decoding circuitry, microphone amplifiersand earphone drivers.The PCM encoder and decoder blocks are two-channel, 16-bit circuits with programmable gainamplifiers (PGA).The decoder has a receive volume control. The audio inputs and outputs can be switched to normal orauxiliary ports.
PCM
DECODER8 /16 kHzONE CH.44/48 kHzTWO CH.
ENCODER8 /16 kHzTWO CH.
VOL
SIDETONE
RX-FILTER
MIC1NMIC1P
MICAMP MIC2N
MIC2P
AUXI1
RX-PGA1
DAC1
TxGC
RX-FILTER
RX-PGA2
DAC2
AUXO1
BEARN
TX-PGA2
TX-PGA1
ADC2
ADC1
TX-FILT
TX-FILT
AUXI2
AUXILIARY INPUT 1
AUXILIARY OUTPUT 2
EARPHONE
AUXO2
AUXILIARY OUTPUT 1
MICAMP
32
32
16
16
PCMSYN
PCMCLK
PCMI
PCMO
BEARP
AUXILIARY INPUT 2
Figure 3-4-2. Audio Interface Detailed Diagram (VINCENNE)
3. Technical Brief
- 57 -
Figure 3-4-3. Schematic of Audio Path
Page 5 of 7(Baseband 1 of 3)
Size:
HOOK
TITLE:R&D CHK:
LG ELECTRONICS INC.
1608
2012
DOC CTRL CHK:
Drawn by:HW Group, Development Lab 6.
Engineer:
Mobile Handsets R&D Center
Vincenne, Regulators
GUIDE HOLE
MFG ENGR CHK:
Jeongseok Lee
Jeongseok Lee
U8550-spfy0106301-1.112 1 8 A
C552 470p
68pC529
R596 120K
C567 0.068u
C564
0R
2131
10u
33nC528
R574 620
1uC574
1608
C507
47p
47pC537
D2
3
D3
4 5D
4
D5
6
2G
ND
D70
2
SM
F05
C-T
CT
1D
1
201210u
C590
C582
4700p1KR525
R589
100K
D50
1
RB
521S
-300R561
R594
4.7K
GN
D4
C2
C3
GN
D5
GN
D6
D2
D3
GN
D7
C1IN+
D1IN-
NCB1
B4VDD1VDD2
C4
VO+D4
A4VO-
_SDA1
TPA2005D1ZQYRU504
A2
GN
D1
GN
D2
A3
B3
GN
D3
VBATI
0R569
VDIG
R21
300
OJ500
0R566
R539
0
C52568p
C56
10.
1u
R577 0
0
R530
R572 620
R590
8.2K
R567
100K
R2252
10K
R2253
10K
X503
U8360-MIC
12
C554 1u
R573 0
OJ503
1608
R571
NA
1uC573
C54
0N
A
22p
C54
1
10K
R595
4.7K
R598
33nR583
R580 33n
7NFSPL
NFSPR5
PS
102
RIN
4R
OU
T
STBY13
SW
112 11
SW
2
14V+
16VREF
VBATI
U50
7N
JM27
05P
C1
GND15
LIN
1
9L
MO
NL
OU
T3
8NFHPL
6NFHPR
22p
C54
3
22KR559
NA
0.068u
C586
C568
R582 0
2700pC578
R584 0
47pC581
33nC524
0R558
R529
100K
3300pC579
BLM15BB750SN1J
L502
R534
18K A4
A1_SD
GN
D1
A2
A3
GN
D2
GN
D3
B3
C2
GN
D4
GN
D5
C3
D2
GN
D6
D3
GN
D7
IN+C1
IN-D1
B1NC
B4VDD1
C4VDD2
D4VO+
VO-
56789
U505 TPA2005D1ZQYR
1
101112
13
14
15
16
17
18
234
CN502
C-1827541
C5171u
0R579
NAC583
16080R564
470pC598
0R
587
100KR586
C5842527100u
18K
R531
C5801u
0R511
C526
33n
47p
C558
R581 0
NA
C565
VDIG
VBATI
C5191u
C56
21u
C585 100u2527
4700pC589
C5922527100u
3300pC587
OJ501
120KR597
C560
33n
B4
V+
0
R588
U508
C3COM1
A3COM2
B1
GN
D
C2IN1
A2IN2
C1NC1
A1NC2
C4NO1
NO2A4
NLAS4684FCT1
NA
C569
0
R578C563
201210u
0
R576
1uC
542
C559
C575
1u
47p
OJ504
C1931C1930
10p10p
C57168p
BLM15BB750SN1JL501
0R585
C572
1608
1u
0
R533
NA
R575
22p
C566
1KR524
10p10pC1932
C1933
R592 120KC593 100u
2527
BGND9
BYPASS2
GND3
VDD7
1VIN1
5VIN2
VOUT18
VOUT26
4_SHDN
LM4809LDU509
18K
R537
VSSTH3
F4VSSTH30
E4VSSTH31
E5VSSTH4VSSTH5
E6E7
VSSTH6E8
VSSTH7VSSTH8
F8G8
VSSTH9
VSSTH15D5
VSSTH16
VSSTH17D6D7
VSSTH18
D8VSSTH19
VSSTH2G7
VSSTH20E9F9
VSSTH21
G9VSSTH22VSSTH23
H9J8
VSSTH24
J7VSSTH25VSSTH26
J6VSSTH27
J5H4
VSSTH28VSSTH29
G4
G6
F7VSSTH1
H8VSSTH10
H7VSSTH11VSSTH12
H6H5
VSSTH13VSSTH14
G5F5
TXONA8
MIC1N
MIC1PM8
MIC2NL7M7
MIC2P
K12GPA5
L8
DACO1B5G11
DACO2H11
DACO3
G10EXPOUT
FF_INF10
AUXI1M6
L6AUXI2
AUXO1L4
J4AUXO2
L3BEARN
BEARPM4
L9CCO
120KR591
C555
R532
18K
10p
68pC570
OJ505
68R
2249
R22
4868
0R510
1uC577
C1CCO
GND1B1B2
GND2GND3
B3
GND4C3C4
GND5GND6
C5
MICNA1
D1MICN_INT
MICPA2
MICP_INTD2
B5VDD
N504
A5AFMS_L
AFMS_L_INTD5
AFMS_RB4
D4AFMS_R_INT
A3ATMS
C2ATMS_AD
ATMS_CAPA4
ATMS_INTD3
JACK_DETIP4025CX20-LF
TJATTE2
SPK_RIGHT_P
SPK_RIGHT_M
AUDIO_AMP_EN
SPK_LEFT_M
SPK_LEFT_P
HS_AMP_EN
VCXOCONTWPAREFWDCDCREF
MIC2N
TXON
MIC2P
EARM
EARP
HS_SPK_SEL
3D_CTRL13D_CTRL2
3D_OFF
3. Technical Brief
- 58 -
3.4.3 Audio Mode
Audio Mode includes three states(Voice call, Midi, MP3)Each states is sorted by the total 7 Modes according to external Devices.(Receiver,Loud Speaker,Headset) Video Telephony Mode Operate on state of the WCDMA Call.
ModeVINCENNE In / Out Port
IN OUT
Voice call
Receiver Mode MIC1P/MIC1N BEARP/BEARN
Loud Speaker Mode MIC2P/MIC2N AUXO1/AUXO2
Headset Mode AUXI1 AUXO1/AUXO2
Video Telephony Mode MIC2P/MIC2N AUXO1/AUXO2
MIDI Only Loud Speaker AUXO1/AUXO2
MP3Loud Speaker Mode AUXO1/AUXO2
Headset Mode AUXO1/AUXO2
Table 3-4-1. Audio Mode
3. Technical Brief
- 59 -
3.4.4 Voice Call
A. Voice call Downlink Mode(Receiver, Speaker, Headset)
This section provides a detailed description of the Voice Call RX functions.
Figure 3-4-4. Voice Call Downlink Scheme
Tone Generator
FR SpeechDecoder
HR SpeechDecoder
AMR SpeechDecoder
EFR SpeechDecoder
SHFCompressor
OHFCompressor
AHFCompressor
AcousticCompensation
Voice Call RX Audio Mixer
Speech CodedData from Host
BluetoothModule
To Linear EchoCanceller in
Voice Call TX
A
1
64 29
65a
65b
65d
B
G
F
E
C D
45
DecoderPCM 8/16
VolumePCM 8/16
DAC1 RX PGA1
Earphone Driver
Auxiliary Output 1
Audio Codec (RX-path)
AUXO1
BEARN
BEARP
SidetoneLoop
Analog Loopfrom TX1
MIC1 toAUXO1 Loop
RX1 HP RX1 LP
AUXO2Auxiliary Output 2
45
VolumePCM 44/48
5844 14
DAC2 RX PGA2
Analog Loopfrom TX2
50 A
A
30
30
5136
16
22
27
27
17
5214
49
DecoderPCM 44/48
45 5844
65c
3. Technical Brief
- 60 -
The voice decoder accepts a serial input stream of linear PCM coded speech. The receive band-passfilter is the next step in the CODEC receive path. Following the filter is the DAC, followed by a PGAenabling to adjust or trim the circuit in the product for different sensitivity of the earphone and spread inthe RX path. The final step in the receive path is the earphone amplifier and the auxiliary output.The auxiliary audio amplifier is intended to drive low impedance headphones. The earphoneamplifier and the auxiliary audio outputs can be powered down (muted) via I2C. Both the earphonedriver and one of the auxiliary drivers can simultaneously provide an output signal during voicedecoding.
• Receiver Mode : Earphone amplifier → BEARP/N Port → Receiver(32Ω)
• Loud Speaker / Video Telephony Mode : Auxiliary audio amplifier → AUXO1/2 →SURROUND AUDIO PROCESSOR(NJM2705) →TJATTE2 → Analog S/W(NLAS4684) →AUDIO AMP(TPA2005D1) → Speaker(8Ω)
• Headset Mode : Auxiliary audio amplifier → AUXO1/2 → SURROUND AUDIO PROCESSOR(NJM2705) → TJATTE2 → Analog S/W(NLAS4684) →HEADSET AMP(LM4809LD) → Head Phone
Loud Speaker Mode has four GPIO switching control ports. It is 3D_CTRL1/2, HS_SPK_SEL andAudio_AMP_EN. HS_SPK_SEL controls analog switch(NLAS4684) and Audio_AMP_EN controlsshutdown of AUDIOAMP(LM4809LD). Video Telephony Mode has same paths with Loud SpeakerMode.
Mode3D IC
HS_SPK_SEL AUDIO_AMP_EN3D_CTRL1 3D_CTRL2
Receiver -- -- -- --
Headset (amr) Low Low Low Low
Headset (mp3) High Low Low Low
Loud Speaker, VT Low Low High High
3D Speaker (mp3) Low High High High
Table 3-4-2. Speaker Phone Mode GPIO Control State
3. Technical Brief
- 61 -
B. Voice call Uplink Mode(Receiver, Speaker, Headset)
This section provides a detailed description of the Voice Call TX functions.
The Uplink supports two microphones and two auxiliary inputs to the speech encoder blocks.Both microphone inputs are compatible with an electric microphone.The VINCENNE internal voltage source (CCO) provides the necessary drive current for the electricmicrophone. The voltage source is via I2C programmable to supply 2.2V or 2.4V.But the voltage source of our Model is to supply 2.4V.The auxiliary audio inputs can be used as an alternative source of speech, a source from an externalmicrophone or as an analog loop connection. Figure 3.4.4.2 shows that the audio inputs are fed to thetransmit PGAs, which enables to adjust the total gain in the product for different sensitivities of themicrophones and spread in the transmit paths. The ADCs are followed by the transmit band passfilters, which accept the maximum output swing that the microphone preamplifiers can deliver withoutclipping, and maintain a good signal-to-noise ratio. The high pass filter in the TX-paths can be disabledvia I2C; still removing the DC offset from the signal.For one of the two transmit paths, a transmit gain control amplifier precedes the final encoding of thePCM output.
Linear EchoCanceller
NoiseReduction
AcousticCompensation
ResidualEcho
Controller
Band PassFilter
Soft LimiterTX
HR SpeechEncoder
AMR SpeechEncoder
FR SpeechEncoder
EFR SpeechEncoder
Speech CodedData to Host
Interdependency
Audio Mixer
Voice Call TX
BluetoothModule
LoudspeakerSignal from
Voice Call RX
1
A
B
C
28 40 41 2 3 28 48 D E 56 57 F33
Microphone Input 1
ADC1
Auxiliary Input 1
Audio Codec (TX-path)
MIC1N
MIC1P
AUXI1
EncoderPCM 8/16
TX PGA1
SidetoneLoop
AnalogLoop
MIC1 toAUXO1 Loop
TX GC
ADC2
MIC2N
MIC2P
AUXI2Auxiliary Input 2
Microphone Input 2
TX1 LP
TX2 LP TX2 HP TX PGA2
3534
18
37
20
21
38
60
5962
55
584544
19
63
TX1 HP
EncoderPCM 8/16
584544
53
54
Hard LimiterTX
Figure 3-4-5. Voice Call Uplink Scheme
3. Technical Brief
- 62 -
3.4.5 MIDI (Ring Tone Play)
This section provides a detailed description of the MIDI and WAV-file functions.
In Figure 3-4-6, External MIDI path is the same as Voice Loudspeaker downlink Mode, except sourcein MARITA (DSP and Audio Mixer).
• MIDI : MARITA PCM Decoder → Auxiliary audio amplifier → AUXO1/2 Port → SURROUND AUDIOPROCESSOR(NJM2705) → TJATTE2 → Analog S/W (NLAS4684) → 2 Mono AUDIOAMP(TPA2005D1) → 2 Speaker(8Ω)
Figure 3-4-6. MIDI Scheme
Digital Baseband ASIC
Audio and PowerManagement ASIC
CODEC
Audio Mixer
VINCENNEMIDI or WAVE
FilterTJATTE2
AUDIO AMP
Speaker
3D IC
Analog S/W
Speaker
HEADSET
HEADSET AMP
3. Technical Brief
- 63 -
3.4.6 MP3 (Audio Player)
This section provides a detailed description of the MP3 file functions.
MP3 function supports PCM 44/48KHz sampling rate.The PCM44/48 RX-path is intended to be usedas a 3D surround music headphones and two speakers.Analog switch(NLAS4684) controls the audio path to the headset or two speakers.
Figure 3-4-7. MP3 Scheme
Digital Baseband ASIC
Audio and PowerManagement ASIC
CODEC
Audio Mixer
MARITA
VINCENNEMP3
FilterTJATTE2
SPEAKER AMP
Speaker
3D IC
Analog S/W
Speaker
3D effect
HEADSET
HEADSET AMP
3. Technical Brief
- 64 -
3.4.7 Video Telephony
This section provides a description of the Video Telephony functions.
Video Telephony Mode has same paths with Loud Speaker Mode.
Figure 3-4-8. Video Telephony Scheme
Digital Baseband ASIC
Audio and PowerManagement ASIC
CODEC
Audio Mixer
MARITA
VINCENNE
Videp Telephony TX
Videp Telephony RX
FilterTJATTE2
AUDIO AMP
Speaker
C-MIC
3D IC
Analog S/W
Speaker
By pass
HEADSET
HEADSET AMP
3. Technical Brief
- 65 -
3.4.8 Audio Part Main Components
There are 8 components in U8550 schematic Diagram. Part Number marked on U8550 SchematicDiagram.
A. TJATTE2 DescriptionThe TJATTE2 is a 6-channel RC low pass filter array that is designed to provide filtering of undesiredRF signals in the 800-2700 MHz frequency band.In addition, the TJATTE2 incorporates diodes to provide protection to downstream components fromElectrostatic Discharge (ESD) voltages as high as 8 kV.
N0 ITEM Part Name Part Number
1 Speaker EMS1514TLW1P
2 C-MIC OBG-415S44 X503
3 3D IC NJM2705 U507
4 Audio AMP TPA2005D1 U504, U505
5 Headset AMP LM4809LD U509
6 TJATTE2 IP4025CS20 N504
7 Ear-JACK C-1827541 CN502
8 Analog Switch NLAS4684 U508
PIN DESCRIPTION PIN DESCRIPTION PIN DESCRIPTION PIN DESCRIPTION
A1 MICN B1 GND C1 CCO D1 MICN-int
A2 MICP B2 GND C2 ATMS_AD D2 MICP-int
A3 ATMS B3 GND C3 GND D3 ATMS-int
A4 ATMS-cap B4 AFMS_R C4 GND D4 AFMS_R-int
A5 AFMS_L B5 VDD C5 GND D5 AFMS_L-int
Table 3-4-5 Audio Component List
Table 3-4-4. TJATTE2 Pin Description
3. Technical Brief
- 66 -
Figure 3-4-9. TJATTE2 Block Diagram
1450 Ω
20 pF
1450 Ω
50 Ω
50 pF
50 Ω
50 Ω
50 pF
50 Ω
13.4K Ω
200 pF
10 Ω
1K Ω
AFMS_R AFMS_R-int
MICN MICN-int
MICP
CCO
ATMS-int
ATMS ATMS_AD
D4 B4
D1A1
C1
A2
A4 D3
A3 C2
B1, B2, B3, C3, C4, C5
GROUND
2.7K Ω
1K Ω
MICP-int
D2
60K Ω
200 pF
10 Ω AFMS_L AFMS_L-int
D5 A5
60K Ω
VDDB5
ATMS-cap
R1 R2
R3 R4
R5
R6
R7 R8
R10
R11
R9
47K Ω
R12
R13
R14
R15
3. Technical Brief
- 67 -
3.4.9 GPADC(General Purpose ADC) and AUTOADC2
The GPADC consists of a 14 input MUX and an 8-bit ADC. The analog input signal is selected with theMUX and converted in the ADC.The GPADC has a built in controller, AUTOADC2, which is able to operate in the background withoutsoftware intervention. The AUTOADC2 periodically measures the battery voltage or current. (Fig.2)shows the schematic of GPADC part. The GPADC channel spec is as following (Table 2).
100K
R21
27
2012
2012 B4
MOD1
GPA1
J9GPA12GPA13
D9
GPA2K10
GPA3L11
GPA4K11
GPA6J11
GPA7J10
GPA0M10L10
ADSTRC7
2012
VBACKUP
WRFLOOPWPOWERSENSE
VLOOPRTEMP
JACK_DET
ADCSTR
Figure 3-4-10. Schematic of GPADC and AUTOADC2
MUX
AD
AUTOADC2Controller
ADSTROBE
Figure 3-4-11. GPADC and AUTOADC2 Block diagram
Table 3-4-5. GPADC channel spec
ADC 6 channels
Resource Name Description
GPA0 RTEMP Radio temperature sense
GPA2 VLOOP Loop voltage sense
GPA3 WPOWERSENSE Reference voltage for PAM
GPA4 WRFLOOP Lock inform
GPA6 GPA6 Headset detect
GPA7 VBACKUP Backup battery
3. Technical Brief
- 68 -
3.4.10 Charger control
A programmable charger in AB2000 is used for battery charging. It is possible to set limits for theoutput voltage at CHSENSE- and the output current from DCIO via the sense resistor to CHSENSE-.The voltage at CHSENSE- and the current feed to CHSENSE- cannot be measured directly by theGPADC. Instead, the two measuring amplifiers translate these inputs to a voltage proportional to theinput and within the range of the GPADC. Figure 3-4-12 shows the schematic of charging control part.This section provides a detailed description of the Voice Call RX functions.
Figure 3-4-13. Battery charging block diagram
Table 3-4-6. Charger Control channel spec
Name Type Unused Description
CHSENSE+ Analog VBAT Current sensing input positive
CHSENSE- Analog VBAT Current sensing input negative
0R
2126
0.05
R87
5 0R2236
0.05
R84
7
C532 1u
R21
910
VBATVBATI
C59910p
R22050
10pC548
R899
0.1H10
VSS_AVSS_B
G3C6
VSS_CE3
VSS_D
VSSBUCKB1
TEST
SUBD10
D4
J9GPA12GPA13
D9
E2DCIO
FGSENSE+F11
F12FGSENSE-
CHREGD1
CHSENSE+D3D2
CHSENSE-
D1
D2
D3
D4
D5
D6
D7
G
S1
S2
S3
Q501
SI7411DN-T1-E3
DCIN_3
DCIN_2
ChargerControl
CHSENSE-
CHSENSE+
VBAT
CHREG
DCIOPA Control
To GPADC
To GPADC
ASIC
Figure 3-4-12. Schematic of charging control part
3. Technical Brief
- 69 -
3.4.11 Fuel Gauge
AB2000(VINCENNE) supports the measurement of the current consumption/charging current in theU8550 with a fuel gauge block. By constantly integrating the current flowing into and out of the battery,the fuel gauge block is used to determine the remaining battery capacity.The function of the fuel gauge block is schematically described in Figure 3-4-15. A sense resistorR_FGSENSE is connected in series with the battery. The voltage across the resistor, equivalent to thecurrent entering/leaving the battery, is integrated using an ADC block.
ADC
FGSENSE-
FGSENSE+
Sign bit
Accumulated charge16 bit
Accumulators
LOAD
RFGSENSE
ASIC
0.05
R87
5 0R2236
0.05
R84
7
VBAT
C59910p
R22050
10pC548
H10VSS_AVSS_B
G3C6
VSS_CE3
VSS_D
VSSBUCKB1
SUBD10
FGSENSE+F11
F12FGSENSE-
Figure 3-4-14. The analog front-end of the fuel gauge block
Figure 3-4-15. Schematic of the fuel gauge block
Table 3-4-7. Fuel Gauge channel spec
Name Type Unused Description
FGSENSE+ Analog VBAT Fuel gauge current sensing input positive
FGSENSE- Analog VBAT Fuel gauge current sensing input negative
3. Technical Brief
- 70 -
3.4.12 Battery Temperature Measurement
The BDATA node, the constant current source, feed the battery data output while monitoring thevoltage at the battery data node with GPADC. This battery data is converted to the batterytemperature. Figure 3-4-16 shows the schematic of battery temperature measurement part.
Table 3-4-7. BDATA channel spec
Name Type Unused Description
BDATA Digital Input/Output Unconnected current output
1%
R5658.2K
R2138100K
R878
100K
PT50147K1%
1%180K
R2135
100K
R843
0R2194
VBATIVDIG
4.7R548 B3VIBR
E10VSSPA
C12VDDPA_DAC
G12
DACCLK
DACDATC9
DACSTRB10
BDATA
A10
MOTOR_BATT
DACCLKDACSTRDACDAT
Figure 3-4-16. Battery Temperature Measurement
3. Technical Brief
- 71 -
3.4.13 Charging Part
The charging block in AB2000 processes the charging operation by using VBAT voltage.It is enabled or disabled by the assertion/negation of the external signal DCIO. Part of the chargingblock are activated and deactivated depending on the level of VBAT. Figure 3-4-17 shows theschematic of charging part.
When VBAT is below a certain value, 3.2V, a current generator take care of initial charging of theCHSENSE+ node and internal trickle charge signal is active. This part of the charging block ispowered on and active when DCIO is asserted. The DCIO signal is asserted when its voltage is abovethe voltage at VBAT. As soon as generator is turned off and all parts of the charging block arefunctional and active.Battery block indication as shown in Figure 3-4-18
1%
R5658.2K
R2138100K
R878
100K
0R
2126
0.05
R87
5
PT50147K1%
0R2236
0.05
R84
7
C532 1u
R21
910
1%180K
R2135
VBAT
100K
R843
VBATI
0R2194
C59910p
VBATI
R22050
10pC548
VDIG
4.7R548
R899
0.1H10
VSS_AVSS_B
G3C6
VSS_CE3
VSS_D
B3VIBR
VSSBUCKB1
E10VSSPA
TEST
VDDBUFC12
VDDPA_DACG12
SUBD10
D4
PAREGD11
E12PASENSE+PASENSE-
E11
D12IOUT
DACCLK
DACDATC9
DACSTRB10
E2DCIO
FGSENSE+F11
F12FGSENSE-
BDATAB11
CHREGD1
CHSENSE+D3D2
CHSENSE-
A10
D1
D2
D3
D4
D5
D6
D7
G
S1
S2
S3
Q501
SI7411DN-T1-E3
DCIN_3
MOTOR_BATT
DCIN_2
IOUTPAREG
PASENSE-PASENSE+
DACCLKDACSTRDACDAT
Figure 3-4-17. Schematic of Charging Part
Figure 3-4-18. Battery Block Indication
4.2 ~3.88 (V)100~66 (%)
3.87 ~3.78 (V)65~44 (%)
3.77 ~3.73 (V)43~25 (%)
3.72 ~3.55 (V)24~4 (%)
3.54 ~3.23 (V)3~0 (%)
3. Technical Brief
- 72 -
A. Trickle charging
When the VBAT is below a certain value, 3.2V, a current generator take care of internal tricklecharge signal is active. The charging current is set to 50mA.
B. Normal charging
When the VBAT voltage is within limits or the internal regulators are turned on, the current source fortrickle charging is turned off and all parts of the charging block are active.The charging method is ‘CCCV’ (Constant Current Constant Voltage) This charging method is used forLithium chemistry battery packs. The CCCV method regulates the charge current and the VBATvoltage. This charging method prevents the battery voltage to go above the charge set in the CCCValgorithm. Figure 3-4-19 shows the charging voltage(a) and charging current change(b).
(a) Charging voltage
(b) Charging current
Table 3-4-8. Trickle charging spec
Figure 3-4-19. CCCV charging method
Parameter Min Typ Max Unit
Trickle current 30 50 60 mA
3. Technical Brief
- 73 -
• Charging Method : CCCV (Constant Current Constant Voltage)
• Maximum Charging Voltage : 4.2V
• Maximum Charging Current : 700mA
• Nominal Battery Capacity : 1400 mAh
• Charger Voltage : 4.6V
• Charging time : Max 3.5h
• Full charge indication current (icon stop current) : 80mA
• Low battery POP UP : Idle - 3.50V, Dedicated - 3.54V
• Low battery alarm interval : Idle - 3 min, Dedicated - 1 min
• Cut-off voltage : WCDMA call - 3.15V, ELSE - 3.23V
C. Charging of Extended Temperature
When the battery temperature is outside the normal charging specification, the battery voltage, VBATis maintained at 3.7V.
• Under 0°C : Extended temperature
• From 0°C to 45°C : Normal charging temperature
• Over 45°C : Extended temperature
3. Technical Brief
- 74 -
3.5 Voltage Regulation
3.5.1 Internal Regulation
There are LDO (Low Drop Output) regulators and BUCK converter in AB2000 (Vincenne) chip.LDO regulators and BUCK converter generate the following voltages : 1.5V, 1.8V and 2.75V.The output of these LDOs supply VDD-A, VDD-B and VDIG with 2.75V. BUCK converter steps downthe VBAT to 1.5V for VCORE and VRTC, and to 1.8V for VMEM voltage. The output of these LDOsand BUCK converter are as following (Table 1). (Fig.1) shows the power supply of each module inU8550.
3.5.2 External Regulation
• 1.5V LDO - supply 1.5V for Wanda core
• 1.5V LDO - supply 1.5V for Marita PLL
• 2.4V LDO - supply 2.4V for SPK_MIC_BIAS
• 2.8V LDO - supply 2.8V for Mega Camera
• 2.8V LDO - supply 2.8V for VGA Camera
• 2.85V LDO - supply 2.8V for Bluetooth and TransFlash
• 3.3V LDO - supply 3.3V for USB
• CHARGER PUMP : supply up to 400mA continuous output current for LCD back light and CameraFlash LED
3. Technical Brief
- 75 -
Figure 3-5-1. Power supply scheme
Table 3-5-1. LDO and BUCK
Pin Name Type Output voltage Description
B12 VDD_A Power Supply 2.75V Supply output
A11 VDD_B Power Supply 2.75V Supply output
M11 VDD_D Power Supply 2.75V Supply output
L12 VDD_E Power Supply 1.8V Supply output
L2 VDDLP Power Supply 1.5V Low Power supply output
A2 VDDBUCK Power Supply Unused: VBAT Buck converter switch supply
B1 VSSBUCK Power Supply GND Buck converter switch ground
3. Technical Brief
- 76 -
3.6 General Description of RF PartThe RF part includes a tri-band GSM/DCS/PCS part (900, 1800 and 1900MHz) and W-CDMA part forIMT-2000 (UL 1900MHz, dl 2100MHz). It also contains Antenna Switch, WCDMA duplexer, WCDMAPower Amplifier and GSM Power Amplifier.
The whole structure of Radio part is shown in Figure 3-6-1.
Starting at the antenna end, an antenna switch provides switching capability needed for four frequencybands (900, 1800, 1900 and 2100MHz). For the W-CDMA part, duplexer is included to facilitate thesimultaneous transmission and reception required for the FDD mode.The main components in the radio are Wopy (W-CDMA receiver ASIC), Wivi(W-CDMA transmitterASIC), Ingela(GSM/GPRS transceiver) and two power amplifiers.The mixed-signal circuit ASIC, Vincenne provides power supply for the main RF components.The control flow for the Radio is shown in Figure 3-6-2
Figure 3-6-1. Block diagram of RF part
3. Technical Brief
- 77 -
The MARITA(the main processor) controls the overall radio system. In the GSM/GPRS air interfacemode, this control is handled via direct interfaces to individual RF components.The MARITA(the main processor) also handles the antenna switch mechanism for selection of mode.In the W-CDMA mode, the RF system is managed via the Wanda (WCDMA digital base-bandcoprocessor ASIC) and its DSP processor.
Wivi
WCDMAPA
AntennaSwit ch
WANDA
Mari ta
Vincenne
GSMPA
Vincenne Ctrl
DAC Ctrl (Indirect GSM PA Pwr Ctrl)
DAC Ctrl (Indirect WCDMA PA Pwr Ctrl)
GSM RF ASIC Ctrl
VCXO Ctrl
WCDMA RF ASIC
Ctrl
Antenna Switch Ctrl
GSM/DCS Band selectGSM/DCS PA Ctrl
WCDMA PA Ctrl
Wopy
Ingela Herta
Figure 3-6-2. RF control signal flow diagram
3. Technical Brief
- 78 -
3.7 GSM Mode
3.7.1 Receiver
The received RF signal on the antenna connector arrives via antenna switch at external band passfilters for band selectivity. One filter is required per supported GSM band.The corresponding LNA amplifies the signal for optimum noise suppression.The LNA output signal is mixed with the on-channel LO generated by the proper VCO and transformedinto a Q and an I signal. The I and Q signals are low pass filtered with two parallel high dynamic rangefilters.Finally, the filtered I and Q signals are converted by a sigma-delta converter into two 13 Mbps digitalbit streams by Herta(A/D converter), then fed to the Marita baseband ASIC.
A. Front endRF Front end consists of antenna, antenna switch(FL101), three RF SAWs(FL402, FL403, Z401) andtriple band LNAs integrated in transceiver(N405). The Received RF signals (GSM 925MHz ~ 960MHz,DCS 1805MHz ~ 1880MHz, PCS 1930MHz ~ 1990MHz) are fed into the antenna or coaxial connector.An antenna matching circuit is between the antenna and the coaxial connector.The Antenna Switch(FL101) is used to select the signal path, which is one of WCDMA, GSM RX, GSMTX, DCS RX, DCS/PCS TX and PCS Rx. The control signals VC1, VC2 and VCG of antenna switch(FL101) are connected to Marita baseband ASIC(D601) to control the signal path.For example, when the GSM RX path is turned on, the received RF signal, which has passed throughthe antenna switch, is filtered by GSM RF SAW filter to suppress any unwanted signal except GSM RXband. The filtered RF signal is amplified by an LNA integrated in the transceiver IC(N405) and ispassed to a direct conversion demodulator. The process for DCS RX is also the same as GSM RXcase. The logic for antenna switch is given below Table 3-7-1.
Table 3-7-1. Antenna Switch logic
VC1 VC2 VCG
GSM TX 0V 0V 2.8V ~ 3.0V
GSM RX 0V 0V 0V
DCS/PCS TX 2.8V ~ 3.0V 2.8V ~ 3.0V 0V
DCS RX 0V 2.8V ~ 3.0V 0V
PCS RX 2.8V ~ 3.0V 0V 0V
WCDMA 0V 0V 0V
3. Technical Brief
- 79 -
B. Receiver Block
The circuit contains one frequency down-conversion section for each receive band and a commonbase band amplifier and filter section. The GSM900 RF part consists of a low noise amplifier followedby high dynamic range mixers.The DCS 1800 and PCS 1900 RF part also have low noise amplifier connected to the other mixers.The amplified RF signal is mixed with the quadrature local oscillator signal to create in-phase (I) andquadrature phase (Q) baseband signals. The I and Q signals are then buffered and low pass filtered.The same baseband circuitry is used for all bands.Balanced signals are used for minimizing cross talk due to package parasitics. An impedance level atRF of 150 ohms for the GSM 900 input and 50 ohms for the DCS 1800/PCS 1900 input is chosen tominimmize current consumption at best noise performance.The low gain mode in GSM 900 is used in high input signal mode. There is no gain switch in DCS1800/PCS 1900.Figure 3-7-1 shows a block diagram of the receiver block.
LNA
LNA
LNA
LNAL LNAH1 LNAH2 BB
BIAS CIRCUITS
850/900 MHz
1900 MHz
1800 MHz
RF1800p
RF1800n
RF1900p
RF1900n
RF850/900p
RF850/900n
IRA
IRB
QRA
QRB
MIXHI
MIXHQ
MIXLI
MIXLQ
LOHI
LOHQ
LOLI
LOLQ
GNDRF
Figure 3-7-1. Block diagram of receiver part
3. Technical Brief
- 80 -
C. LO Block
The LO signals from the receive VCO section drive the dividers for GSM 900, DCS 1800 and PCS1900 respectively to provide quadrature LO signals to the receive mixers. The LO signal is alsosupplied to the prescaler and transmit output buffer.Figure 3-7-2 shows a block diagram of the LO block.
.
Figure 3-7-2. Block diagram of the LO part
0 DIVIDER
/ 290
0 DIVIDER
/ 290
To MIXLI
To MIXLQ
LOLBUFI
LOLBUFQ
LOHBUFI
LOHBUFQ
To prescaler
GNDLO
VCCLO
From GSM 1800/1900 RX VCO
To MIXHI
To MIXHQ
LOL LOH
BIAS CIRCUITS
From GSM 850/900 RX VCO
3. Technical Brief
- 81 -
D. VCO Block
The VCOs are fully integrated balanced LC oscillators with on-chip resonators.The receive VCOs run on double frequency.Different frequency ranges can be selected in the VCOs for GSM, DCS and PCS band operation.The VCOs are supplied from a separated external voltage regulator to avoid frequency pushing and upconversion of low frequency noise. A separate ground pin is also used as varactor ground reference toprevent DC voltage drop changes from affecting the VCO frequency.Figure 3-7-3 shows a block diagram of the VCO block.
Figure 3-7-3. Block diagram of the VCO part
3. Technical Brief
- 82 -
E. PLL Block
The PLL consists of a programmable prescaler with multiple division ratios and a phase and frequencydetector with a charge pump with programmable output current. Channel frequency selection andtransmitter modulation is controlled via the prescaler modulus inputs MODA ~ MODD and theprescaler offset value N offset. The MODA ~ MODD signals could be delayed 0, 5, 10 or 15 ns withMD bits to be synchronized with the XO signal.Figure 3-7-4 shows a block diagram of the PLL block.
CHARGEPUMP
PHASEDETECTOR
PULSESKIP
DETECTOR
PRESCALER
DELAY
DELAY PHD/CP PREBIAS CIRCUITS
I PHD
6
MD
PHDOUT
From XO
PS
VCCPHD
GNDPHD
TBLNPS
7
N offsetGNDPRE
VCCPRE
From VCO
MODD
MODC
MODB
MODA
2
Figure 3-7-4. Block diagram of the PLL part
3. Technical Brief
- 83 -
3.7.2 Transmitter
A 4-bit sigma-delta bit stream comes from the Marita ASIC including both channel information and theGMSK phase information. Via the 3-wire control bus also driven from Marita, the selection oftransmitter band is made. The 4bits from the bit stream provides the fine-tuning of the division ratiobefore going to the divider of the used VCO (low band, 900MHz or high band, 1800/1900MHz).The modulated VCO signal is fed to the output buffer. One buffer is available for each of the low andhigh bands. Trimming capability is included for best match versus the PA used.The GSM/GPRS transceiver, Ingela, output is passed to the dual-band PA that after amplificationfeeds the signal via a low pass filter to the antenna switch and further to the antenna.The transmit block consists of two differential high power transmit output buffers with controllableoutput power. The modulated transmit signal from the VCO buffer is amplified to a level suitable todrive the external power amplifier. The buffer outputs are of open collector type and must beterminated into a suitable load.Figure 3-7-5 shows a block diagram of the transmitter block.
MUX
TXBUFL TXBUFH
BIAS CIRCUITS
To prescaler
TXOHA
TXOHB
PCTL
TXOLA
TXOLBTXBUFL
TXBUFH
GNDBUF
VCCBUF
From GSM 800/900 TX VCO
From GSM 1800/1900 TX VCO
Figure 3-7-5. Block diagram for the transmitter
3. Technical Brief
- 84 -
A. Power Amplifier
The Power Amplifier (N401) is intended for use in EGSM and DCS/PCS mobile equipment.It is a module with two parallel amplifier chains, with one chain for the EGSM transmitter section andone for the DCS/PCS transmitter section. Each chain amplifies the RF signal from the respectivetransmitter to the antenna. The power amplifier supports class 10.Band selection and the output power level of the RF amplifier are controlled by discrete signals Vband
and Vapc respectively from the digital baseband controller ASIC(Marita).
Figure 3-7-6. Block diagram of the Power Amplifier with Two Parallel chains
33pF
Vband Vapc
Vcc
GND
GND Vcc
GND
DCS/PCS Pin
GND
EGSM Pin
GND
GND DCS/PCS Pout
GND
EGSM Pout
GND
100pF 100pF
10pF
3. Technical Brief
- 85 -
3.8 WCDMA Mode
3.8.1 Receiver
The received RF signal on the antenna connector arrives via the antenna switch to the duplexer. Theduplexer directs the signal to the LNA, which resides in Wopy (W-CDMA Receive ASIC) as every otheractive part of the radio receiver. The LNA has two different gain settings.From the output of the LNA, the signal is fed to the input of a RF SAW filter, and then appears at thedifferential output of the filter. The differential output of the RF SAW filter is connected to thedifferential mixer input, and the received signal is down-converted to a 190MHz IF frequency (with theRFLO signal) by the mixer.At 190MHz, the signal is filtered in a differential (input and output) IF SAW filter, with the approximatebandwidth of 4MHz, and then again the signal is fed to Wopy (W-CDMA Receive ASIC), this time tothe differential IF input, which also has a LNA.From the 190MHz, the signal is mixed down to base-band I and Q which represented signals (usingthe IFLO signal). Finally the signals are filtered in low pass filters and amplified in baseband VGAs.The I and Q represented signals appear at the output of Wopy (W-CDMA Receive ASIC) as differentialvoltages.The large signal gain provided by the processing steps from the antenna down to base-band gives aDC offset at the outputs of Wopy (W-CDMA Receive ASIC). To eliminate this, there are DC-offsetcompensation loops included, one in the VGA of each of the I and the Q signals.
A. IFLO Section
The balanced IFLO signal from an external IFVCO drives the divider to provide qaudrature LO signalsto the RxIF mixers. The LO buffers amplifies the signal to a suitable amplitude and DC level to drivethe RxIF mixers.
DIVIDER0
90
From IFLO
IFLOBUFI
IFLOBUFQ
IFLOBIAS CIRCUITS
To IFLOI
To IFLOQ4
Figure 3-8-1. Block diagram of the IFLO section
3. Technical Brief
- 86 -
B. RFLO Section
The VCO is a fully integrated balanced LC oscillator with on-chip resonator. An on-chip varactor isused to control the frequency over the desired tuning range.A separate external voltage regulator supplies the VCO with power to avoid frequency pushing and upconversion of low frequency noise. A separate ground pin is also used as varactor ground reference toprevent DC voltage drop changes from affecting the VCO frequency. Via the serial interface, theVTUNE voltage can be set to VCC/2 to check the center frequency of the VCO. The PLL consists of aprogrammable prescaler with multiple division ratios and a phase and frequency detector with acharge pump with programmable output current.Channel frequency selection is set via the serial interface.
Figure 3-8-2. Block diagram of the RFLO section
CHARGEPUMP
vco
Cvc
o
IPHD
BIAS CIRCUITS
VCO PLL RFLO
$DIVIDER
PHASE DET.
RDIVIDER
From XO
Ndiv
VCCVCO
GNDVCO
VTUNE
GNDTUNE
VCCPHD
GNDPHD
PHDOUT
VCCPLL
GNDPLL
RFVCO
RFLOO
Rdiv
N
3. Technical Brief
- 87 -
C. Reference SectionThe reference block consists of a balanced oscillator and a buffer amplifier. The crystal unit and thefeedback capacitors are external. The current consumption when only the reference oscillator and theoutput buffer are activated must be kept to an absolute minimum.
BIAS CIRCUITS
XOOON REFON
XO
XOOON
XOOON
REFON
To PLL
MCLK
XOOA
XOOB
XOIA
XOIB
Figure 3-8-3. Block diagram of the Reference section
3. Technical Brief
- 88 -
3.8.2 Transmitter
Analogue differential signals (currents), representing I and Q, are sent to the radio ASCI Wivi (W-CDMA Transmitter ASIC) from the D/A converter in Wanda (W-CDMA digital base-band coprocessorASIC). The signals are filtered in a reconstruction filter and then modulated up to 380MHz (using theIFLO signal). The signal is then amplified in a VGA and filtered in an external filter (an LC filter). Afterfiltering, the signal is mixed to its final frequency (using the RFLO) and amplified in a differential outputRF buffer with two different gain settings (high gain or low gain).The differential RF signal is fed into a SAW filter with a single ended output, and is then amplified in astand-alone RF buffer. After the RF buffer, the signal is filtered again in a SAW filter before it is fed tothe PA (Power Amplifier).In the PA the signal is amplified for the last time before leaving the radio. After the PA, the signal issent through an isolator and through the duplexer, which directs the transmit signal to the antennaconnector via the antenna switch.The PA has variable supply voltage, which adapts itself by means of a control loop so that the linearityof the PA is kept constant. The variable supply voltage is provided from the battery through a DC/DCconverter and a signal linearity detector sits at the PA output. The detected signal at the PA output iscompared with a reference (supplied by the Vincenne, the mixedsignalcircuit ASIC), and the errorsignal is used in a loop filter, which provides the control signal to the DC/DC converter.
A. Reconstruction FiltersThe reconstruction filters consist of input buffers that provide the correct DC biasing for the precedingDAC in the digital baseband controller, and a low-pass filter for removing the unwanted high frequencycomponents from the baseband input waveform.The filter inputs are adapted for use with a current-source type of input signal.
B. IQ-modulatorThe IQ-modulator receives the incoming I and Q analog baseband signals at baseband frequency andconverts them to an intermediate frequency of 380MHz.
3. Technical Brief
- 89 -
C. Variable Gain Amplifier(VGA)Comprising two cascaded variable gain amplifiers, the VGA-together with the RF mixer-controls thepower of the transmitter.The first of these two amplifiers, the so-called QVGA, enables fine-tuning of the transmitter by varyingthe gain in 0.25dB steps, that is 0/0.25/0.5/0.75dB. The second amplifier provides a 54dB gain rangein 1 dB steps (54steps = 55 levels).
D. IF Band Bass Filter (IFBP)The IF filter suppresses spurious signals and eliminates unwanted frequency components generatedin the IQ modulator and subsequently amplified in the VGA. The filter is tuned using an external RLCload as shown in Figure 3-8-4.
Off chip
On chip
Vb,casc
Externaltuned load
Vb
Figure 3-8-4. Principle Schematic of the IFBP
3. Technical Brief
- 90 -
E. RF Mixer and BufferThe RF mixer converts the signal output from the IF BP filter from an intermediate frequency (IF) to thefinal radio frequency (RF). The mixer can be switched between three different gain levels: high gain(HG), medium gain (MG), and low gain (LG).The LO buffer provides the buffering for either an internal LO signal generated within the internalRFPLL, or an external LO signal applied to the RFLO/RFLOBAR pins.External DC blocking is necessary for the external LO signal.The RF buffer is used to drive an external PA stage. The buffer is of an open-collector design.The gain switching together with the VGA amplifier at IF will enable an output power control in 0.25 dBsteps over no less than 80dB.The programmable bias in the high and mid-gain settings is specified as a reduction of bias currentfrom the maximum bias condition. It should achieve a reduction of bias current from the nominal valueof 17mA to 3mA (signal ended) in 7 steps.
Figure 3-8-5. Block Diagram of RF Mixer and Buffer
Bias &Logic
3
RF-mixer & RF buffer
IN
INBAR
GN
DR
F
VC
CR
F
OUT
OUTBAR
RF
BIA
S
EN
AB
LE
GA
INM
ET
H
RF
LO
RF
LOB
AR
LOINTEXT
BUFFGAIN &BUFFGAIN2
2
3. Technical Brief
- 91 -
F. Power AmplifierThe N302(RF9266) is a high-power, high-efficiency linear amplifier module targeting W-CDMAtransmitter ASIC. The module is fully matched to 50ߟ for easy system integration and utilizesadvanced GaAs HBT process technology. The PA features an integrated RF power output detectionnetwork and is compatible with DC-DC converter operation in DC power management applications.Additionally, a variable bias-current allows the idle current to be adjusted for optimum performance ata given RF output power.
10 128
22 21 20
181
716
1519
23
45
1
BIAS
Vctrl
Vctrl
GND
Vcc_bias
Vcc_bias
Vde
t
GN
D
RF
out
Vcc1
GND
Vcc2
Vcc2
GND
Vcc1
RFinGND
9 11
67
141
3
GND
Vccdet
GN
D
GN
D
Detectornetwork
GND
GND
IMN
OM
N
Figure 3-8-6. Block Diagram of W-CDMA power amplifier
3. Technical Brief
- 92 -
3.8.3 Frequency Generation
The Wopy (W-CDMA Receive ASIC) contains the active elements for a 13MHz VCXO, which isdesigned to be the reference frequency of the UE.There are two synthesizers in the W-CDMA part of the radio, an intermediate frequency (IF)synthesizer and a radio frequency (RF) synthesizer. They generate the Intermediate Frequency LocalOscillator (IFLO) and Radio Frequency Local Oscillator (RFLO) signals. Both synthesizers are used inboth the transmitter and the receiver, which gives the radio a fixed duplex distance of 190MHz.The RF synthesizer is in the Wopy (W-CDMA Receive ASIC), except for the loop filter, which isexternal. The 13MHz clock is used as the reference, and the phase detector frequency is 200kHz. Theprogrammable divider makes the RF synthesizer cover the 2300~2360MHz band.The IF synthesizer is in the Wivi (W-CDMA Transmitter ASIC), except for the loop filter.The 13MHz is used as the reference, and the phase detector frequency is 1MHz. The IF VCO runs at1520MHz given that the (programmable) reference divider is set to 13.The synthesizers are controlled by Wanda (W-CDMA digital base-band coprocessor ASIC) via theserial bus to Wivi (W-CDMA Transmitter ASIC) and Wopy (W-CDMA Receive ASIC).
3. Technical Brief
- 93 -
A. IF PLLThe IF LO frequency synthesis comprises the four following par is:
- Input buffer: A 13MHz input buffer with DC-biasing provided at source.- VCO: Operating on 1.52GHz which is 4times the TX-IF frequency (380MHz) and 8 times the RX-IF
(190MHz), this is a fully integrated balanced LC oscillator with on-chip resonator. On-chipvaractor are used to tune the VCO frequency.
- Prescaler- Phase-detector with charge pump
For maintaining check on the VCO center frequency, the tuning voltage is set to Vcc/2.External DC blocking capacitors must be used on the IFLO/IFLOBAR signals.
ChargePump
Div 2
R
Bias
IF PLL
IFLO
TX
BA
R
IFLO
TX
IFPLLON
TBIFVCO
TBIFSI
TBIFSO
XO / R
XOBAR / R
XO
OA
XO
OB
VC
CIF
PH
D
GN
DIF
PH
D
VC
CIF
PH
D
GN
DIF
PLL
PHDIFOUT
GNDTUIF
VTUNEIF
IFLOBAR
IFLO
GNDIFVCO
VCCIFVCO
PHD
Figure 3-8-7. Block Diagram of Frequency Synthesizer Part (IF PLL)
4. TROUBLE SHOOTING
- 94 -
4.1 Power ON Trouble
4. TROUBLE SHOOTING
START
No
Change main board
Charge or changemain battery
Yes
No Follow theKeypad backlight
Trouble shooting guide
Yes
Yes
No
No
The voltage of main batteryis higher than 3.2V ?
END key operates well?
ONSWAn(C597) level is low
when END key pressed.
Press END key.
Keypad LED ON?
Follow thekeypad Troubleshooting guide
Check the voltage.
VCORE (R600) 1.5V
VDIG (R560) 2.8V
VMEM (R563) 1.8V
VRTC (R551) 1.5V
VEXT15_M (N502 Pin#5) 1.5V
VEXT15_W (N702 Pin#5) 1.5V
VDD_A (R2250) 2.8V
VDD_B (R2251) 2.8V
4. TROUBLE SHOOTING
- 95 -
R2251
N201
R600
R551R563
R560
C597
N503
N702
D601
N502
R2250
N405
<Top view>
<Bottom view>
4. TROUBLE SHOOTING
- 96 -
4.2 USB Trouble
D601
C623
N501R513
R514
START(Measure during the state of
USB module running)
Input power(N501, Pin#1) is 5V?No
Change main board
Check host USB portor USB cable
Yes
Output power(N501, Pin#5) is 3.3V?No
Resolder or change N501
Yes
USBSENSE level is 2.8V?No
Resolder R513or R514
Yes
VUSB(C623) is 3.3V?No
Resolder C623
Yes
<Top view>
4. TROUBLE SHOOTING
- 97 -
4.3 SIM Detect Trouble
•• SIM control path- MARITA generates SIM interface signals(2.75V level) to VINCENNE.- Vincenne converts SIM interface signals to 3V/5V.
SIM work well? Finish
START
Yes
Reconnect SIM card
Resolder X502 on main PCBand check the contact
between X502 and SIM card
Change main board
SIM work well? FinishYes
N o
N o
N o
N o
N o
SIM work well? FinishYes
Change SIM card
<Bottom view>
X502
4. TROUBLE SHOOTING
- 98 -
4.4 TransFlash Trouble
TransFlash work well?
START
Yes
Re-insert TransFlash
Check operation of TransFlashusing other notebook or PDA
Change main board
TransFlash work well? FinishYes
N o
N o
TransFlash work well? Change the TransFlashNo
Yes
Re-insert TransFlash
Check output of U510Resolder C636
No
Yes
Resolder R653No
VTF(C636) is 2.85V?
Yes
TF_DETECT(R653) is 2.85V?
Finish
S601
C636
R653
<Top view>
4. TROUBLE SHOOTING
- 99 -
4-5 Keypad Trouble
Keypad singals to MARITA and VINCENNE through board-to-board connector.
START
YES
NO
1
Press the Keypad
Keypad operates well?
Change Main Board
Check B to B connector short?CN703(Main Bíd), CN1(Keypad)
Change Keypad
NO
YES Resolder B to B connectorCN703(Main Bíd) or CN1(Keypad)
Keypad operates well?
Keypad operates well?
NO
NO
Finish
YES
YES
4. TROUBLE SHOOTING
- 100 -
Keypad signals to MARITA and VINCENNE through board-to-boardconnector.
1
CN703
CN1
KEYOUT5
KEYOUT4
KEYOUT3
KEYOUT2
KEYOUT1
KEYOUT0
Pin #4 ~ #9
Pin #16 ~ #21
KEYIN0
KEYIN1
KEYIN2
KEYIN3
KEYIN4
OMSWAn
1
1213
24
1
12 13
24
KEYOUT5
KEYOUT4
KEYOUT3
KEYOUT2
KEYOUT1
KEYOUT0
Pin #4 ~ #9
Pin #16 ~ #21
KEYIN0
KEYIN1
KEYIN2
KEYIN3
KEYIN4
OMSWAn
4. TROUBLE SHOOTING
- 101 -
4-6 1.3M Camera Trouble
Camera control signals are generated by Marita
START
Press END Keyto turn on the power
Is the circuit powered?
Reconnect the 26pin B to B connector CN702 and 1.3M Camera Connector
1.3M Camera Operation OK?
Pin 5 of U502 or C504 = 1.8V?Pin 5 of U503 or C523 = 2.8V?
Change 1.3M Camera
1.3M Camera Operation OK?
Follow the Power On Trouble Shooting
Change U502 or U503
YES
NO
YES
YES
NO
Change the Camera & LCD FPCB
YES
1.3M Camera Works
NO
Change the Main Board
NO
NO
1
2
NO
4. TROUBLE SHOOTING
- 102 -
2
C523
U503U502
C504
5
4
1
CN702 CN2
4. TROUBLE SHOOTING
- 103 -
4-7 VGA Camera Trouble
Camera control signals are generated by Marita
START
Press END Keyto turn on the power
Is the circuit powered?
Reconnect the 50pin B to B connectorCN701 and VGA Camera Connector
VGA Camera Operation OK?
Pin 5 of U501 or R721 = 2.8V?
Change VGA Camera
VGA Camera Operation OK?
Follow the Power On Trouble Shooting
Change U501
YES
NO
YES
YES
NOChange the Camera&LCD FPCB
YES
VGA Camera Works
NO
Change the Main Board
NO
NO
1
2
NO
4. TROUBLE SHOOTING
- 104 -
1
2
R721
U501
4
CN701
4. TROUBLE SHOOTING
- 105 -
4-8 Main LCD Trouble
LCD control signals are generated by Marita
START
Press END Keyto turn on the power
Is the circuit powered?
Disconnect and Reconnect the 50pin B to B connector (FPCB and Main)
LCD Display OK?
Follow the Power On Trouble Shooting
Change Camera&LCD FPCB
YES
NO
YES
YES
NO
1
NO
Disconnect and Reconnect the 40pin B to B connector (LCD and FPCB)
LCD Display OK?
The LCD Works
Follow the Power On Trouble Shooting
Change LCD Module
LCD Display OK?
Change the Main Board
NO
YES
2
4. TROUBLE SHOOTING
- 106 -
1
Main Board 50 pin B to B Connector FPCB Board 50 pin B to B Connector
CN701
CN2
2
LCD Module 40 pin BtoB Connector
FPCB Board 40 pin BtoB Connector
CN1
4. TROUBLE SHOOTING
- 107 -
4-9 Sub LCD Trouble
START
Press END Keyto turn on the power
Is the circuit powered?
Disconnect and Reconnect the 50pin B to B connector (FPCB and Main)
Sub LCD Display OK?
Follow the Power On Trouble Shooting
Change Camera & LCD FPCB
YES
NO
YES
YES
NO
1
NO
Disconnect and Reconnect the 40pin B to B connector (LCD and FPCB)
Sub LCD Display OK?
The LCD Works
Follow the Power On Trouble Shooting
Change LCD Module
Sub LCD Display OK?
Change the Main Board
NO
YES
2
4. TROUBLE SHOOTING
- 108 -
1
Main Board 50 pin B to B Connector FPCB Board 50 pin B to B Connector
CN701
CN2
2
LCD Module 40 pin BtoB Connector
FPCB Board 40 pin BtoB Connector
CN1
4. TROUBLE SHOOTING
- 109 -
4-10 Keypad Backlight Trouble
START
Press END Keyto turn on the power
Keypad Backlight Works?
YES
NO
Backlight Control Signalis 2.8V at R741?
Resolder or Change Q701
YES
NO
Change Main Board
YES
NO
Keypad Backlight Works?
Change Keypad
Keypad Backlight Works?
Finish
YES
NO
1
2
4. TROUBLE SHOOTING
- 110 -
Q701R741
21
R741 2.7K
12
R742
EMX18Q701
Keypad Backlight Control
2
56
31
4
12
R727
KEY_LED_ONOFF
KEY_LED-
150
R15
150
R4
LD
11L
EB
B-S
14H
R23
150
LD
10L
EB
B-S
14H
LE
BB
-S14
HL
D9
R29
150
LE
BB
-S14
HL
D5
LE
BB
-S14
HL
D13 LD
2L
EB
B-S
14H
150
R31
LD
4L
EB
B-S
14H
LE
BB
-S14
HL
D7
150
R3
VBATI
0.1uC3
PG05DBTFC
R32 100K
R5
150
150
R10R2
150
R26
150
R14
150
LE
BB
-S14
HL
D12
150
R30
LD
8L
EB
B-S
14H
LD
6L
EB
B-S
14H
LE
BB
-S14
HL
D1
LE
BB
-S14
HL
D3
R6
150
PG05DBTFC
R34 100K
100KR33
PG05DBTFC
KEY_LED-
4. TROUBLE SHOOTING
- 111 -
4-11 Camera Flash Trouble
START
Change Flash LED
NO
Press END Key
to turn on the power
Is the circuit powered?
Disconnect and Reconnect the 26pin BtoB connector (FPCB and Main)
Follow the Power On Trouble Shooting
YES
NO
Camera Flash Works?
Pin16,Pin17,Pin18 of U701over 3.5V??
YES
Change the Main Board
NO
NO
Change the U701
YES
Flash LED Works?
Resolder Flash LEDs or
Change Camera&LCD FPCB
YES
Finish
Camera Flash Works?
NO
Camera Flash Works?
YES
NO
2
4
1
NO
Pin10 of U701 is High?
Check Flash LEDs
(4.0V Direct Power Supply)
YES
3
4. TROUBLE SHOOTING
- 112 -
3
U701
Pin18
2
Over 3.5V?
Pin16
Pin17
1
CN702 CN2
4. TROUBLE SHOOTING
- 113 -
4.12 Audio Trouble
4.12.1 Receiver
• Signals to the receiver
- Receiver signals are generated at Vincenne• BEARP, BEARM
- Receiver path :• Vincenne (BEARP, BEARM) →• CN701 on main board →• LCD Module →• Receiver
♣ Note : It is recommanded that engineer should check the soldering of R, L, Calong the corresponding path before every step.
4. TROUBLE SHOOTING
- 114 -
START
Connect the phone to networkEquipment and setup call
Setup 1KHz tone out
Does the sine wave appearat L501,L502 ?
Change the main board
Does the sine wave appearat Number 47, 48 pin
in the main Bíd CN701?
Check R510,R511
Does the sine wave appearat EAR(+) PAD in LCD Module? Change the LCD module
Is the soldering ot the receiver OK? Resolder Receiver
Can you hear sine waveout of the receiver ? Change the Receiver
END
YES
YES
YES
YES
YES
NO
NO
NO
NO
NO
The sine wave not appear
4. TROUBLE SHOOTING
- 115 -
CN
701
1
50 26
25
Pin 47,48L501,L502
B SIDE
4. TROUBLE SHOOTING
- 116 -
Measured 1khz Sine Wave Signal
Measured 1khz Sine Wave Signal
4. TROUBLE SHOOTING
- 117 -
4.12.2 Speaker (Voice Loud Speaker,Midi, MP3,Key Tone)
Signals to the speaker
• AUXO1/Right, AUXO2/Left
- AUXO1/Right, AUXO2/Left
• Speaker path :
- Vincenne (AUXO1/Right, AUXO2/Left) →
- U507(Surround Audio Processor) on the main board →
- C584,C585 on the main board →
- N504(ADG) on the main board →
- U508(Analog Switch) on the main board →
- U504,U505(Speaker Amp) on the main board →
- CN703 on the main board →
- CN3, CN4 on the Key PCB →
- Speaker
♣ Note : It is recommanded that engineer should check the soldering of R, L, Calong the corresponding path before every step.
4. TROUBLE SHOOTING
- 118 -
START
Connect the phone to networkEquipment and setup call
Setup 1KHz tone out
Does the sine wave appearat C572,C573 ?
Change the main board
Does the sine wave appearat C584,C585 ? Change U507
Does the sine wave appearat R582,R584 ?
Can you hear sine waveout of each speakers ? Change each Speaker
END
YES
YES
YES
YES
YES
NO
NO
NO
NO
NO
Change the main board
Does the sine wave appearat R533,R539 ?
Change U508
YES
Does the sine wave appearat CN703 num22,23 ?
Change U504,U505 each
The sine wave not appear
The sine wave not appear
The sine wave not appear
Resolder CN703 num 22,23
The sine wave appear
The sine wave not appear
The sine wave appearYES
Does the sine wave appearat CN3,CN4 ?
Change the Key PCBNO
4. TROUBLE SHOOTING
- 119 -
C572,C573
R582,R584
CN703 #22,23
C584,C585
1 24
R533,R539
CN3, CN4
4. TROUBLE SHOOTING
- 120 -
Measured 1khz Sine Wave Signal
4. TROUBLE SHOOTING
- 121 -
4.12.3 Microphone (Voice call, Voice Recorder, Video Recorder)
•• Microphone Signal Flow- MIC is enable by MIC Bias
- MICBAS, MICIP, MICIN signals to ABB (Vincenne)
•• Check Points- Microphone bias- Audio signal level of the microphone- Soldering of components
•• Signal from the MIC :- MIC →- N504(TJATTE2) on main board →- C567,C568 on main board →- Vincenne
4. TROUBLE SHOOTING
- 122 -
START
Is the level of MIC+ AND MIC-2.4Volt ?
Check the signal level at C568 at the puttingAudio signal in MIC
Does it work properly ?
END
Yes
Yes
YES
No
A few hundred of mV of the signal measured ?
Change the main B,d
Check the MIC bias level at the pad of MIC+(X503)
Resolder C566,C567, C568and try again.If fail again,
change the main Bíd
No
Yes
Yes
No
4. TROUBLE SHOOTING
- 123 -
C566
C568
C567
4. TROUBLE SHOOTING
- 124 -
Measured Some Noise Signal
4. TROUBLE SHOOTING
- 125 -
4.12.4 Headset - Receiver(Voice call, Video Telephony,MP3)
START
Connect the phone to networkEquipment and setup call
Setup 1KHz tone out
Insert Headset.Does the Headset icon display
on the main LCD?
Can you hear sine waveout of the receiver ? Change the main Bíd
END
YES
YES
YES
YES
NO
NO
NO
Change the U507
Does the level of R2252under 0.5Volt ?
YES
Change the main B,dDoes the sine wave appearat C572,C573 ?
NO
Does the sine wave appearat C584,C585 ?
Resolder CN502 Pinsor change the Headset
YES
NO Change the U509Does the sine wave appearat C592,C593 ?
If the sine wave doesnít appear
4. TROUBLE SHOOTING
- 126 -
4.12.5 Headset - MIC(Voice call, Video Telephony)
START
Insert Headset.Does the Headset icon display
on the main LCD?
Does it work properly ?? Try again from the start
END
YES
YES
YES
NO
NO
NO
Change the main B'd
Does the level of R2252under 0.5Volt ?
YES
Change the main B,d
Check the signal level
at R569 at the putting
Audio signal in MIC
Resolder C554,R569 and try again.
If fail again,Change the main Bíd
A few hundred of mV of the signal measured
at C575?
4. TROUBLE SHOOTING
- 127 -
4.12.6 Headset
R2252
R569
CN502
C572,C573 C584,C585 C592,C593
C575C554
4. TROUBLE SHOOTING
- 128 -
4.13 Charger Trouble
•• Charging Procedure- Connecting TA and Charger Detection- Control the charging current by AB2000(Vincenne)- Charging current flows into the battery
•• Check Point- Connection of TA- Charging current path- Battery
•• Trouble shooting setup- Connect TA and battery to the phone
•• Trouble Shooting Procedure- Check the charger connecter- Check the Charging current Path- Check the battery
0R
2126
0.05
R87
5 0R2236
0.05
R84
7
C532 1u
R21
910
VBATVBATI
C59910p
R22050
10pC548
R899
0.1H10
VSS_AVSS_B
G3C6
VSS_CE3
VSS_D
VSSBUCKB1
TEST
SUBD10
D4
J9GPA12GPA13
D9
E2DCIO
FGSENSE+F11
F12FGSENSE-
CHREGD1
CHSENSE+D3D2
CHSENSE-
D1
D2
D3
D4
D5
D6
D7
G
S1
S2
S3
Q501
SI7411DN-T1-E3
DCIN_3
DCIN_2
Figure 4-13-1. Main Battery Charging Path
4. TROUBLE SHOOTING
- 129 -
start
Check the pin and batteryconnect terminals of I/O
connector
Connection OK? Change I/O connectorNO
YES
Is the TA voltage 4.6V? Change TANO
YES
Is it charging properlyafter changing Q501?
ENDYES
NO
Change the board
start
Check the pin and batteryconnect terminals of I/O
connector
Connection OK? Change I/O connectorNO
YES
Change TANO
YES
Is it charging properly ENDYES
NO
Change the board
Q501
L702 IO Connector
4. TROUBLE SHOOTING
- 130 -
4.14 RF Component
N402 N302 N303 B301 FL102N301
N403N404
Z401
FL403
FL402
N405
Figure 4-14-1. RF component (Top)
Reference Description Reference Description
N301 VOLTAGE_REGULATOR N403 DCS_TX_BALUN
N402 HERTA (GSM ADC) N404 GSM_TX_BALUN
N302 WCDMA PAM FL402 DCS_RX_SAW
N303 ISOLATOR FL403 PCS_RX_SAW
B301 TEMP_SENSOR Z401 GSM_RX_SAW
FL102 DUPLEXER N405 GSM TRANSCEIVER
4. TROUBLE SHOOTING
- 131 -
Reference Description Reference Description
W101 TEST CONNECTOR Z201 WCDMA RX IF SAW
N401 GSM PAM V201 DIODE/VARIABLE CAP
FL401 EMI FILTER B201 CRYSTAL
FL301 WCDMA TX RF SAW N201 WCDMA RX IC (WOPY)
N304 WCDMA TX IC (WIVI) FL201 WCDA RX RF SAW
N101 REGULATOR FL101 ANT SW MODULE
Figure 4-14-2. RF component (Bottom)
W101
FL101
N401
FL201
N201
B201
V201 Z201
FL401 FL301
N304
N101
4. TROUBLE SHOOTING
- 132 -
4.15 Procedure to check
start
Oscilloscope setting
1. CheckPower Source Block
2. CheckVCXO Block
Agillent 8960 : Test mode(WCDMA)Ch. 9750 (Uplink)Ch. 10700 (Downlink)
4. CheckWCDMA Block
Agillent 8960 : Test mode(GSM)Ch. 62, P.L. 7 level settingCh. 62, -60dBm setting
5. CheckGSM Block
Redownload SW, Cal
3. CheckAnt. SW Module
4. TROUBLE SHOOTING
- 133 -
4.16 Checking Common Power Source Block
(Bottom) (Top)
Step 3WCDMA PAM Block
Step 1Regulator Block
Step 2GSM PAM Block
Vincenne
Power Source Block
➄
➃
➂
➁
➀
Figure 4-16-1. Common Source Block
4. TROUBLE SHOOTING
- 134 -
4.16 Checking Common Power Source Block Diagram
VBATVincenne
VDDRTC
VDD_D(2.75V/200mA)
VDDBUCK
VCORE(1.5V)
SWBUCK
R
L
VSSBUCK
PBUCK
NBUCK
VBUCK
VBAT_C
VDD_E(1.8V/100mA)
VDD_IO
VBAT_A
VDD_AVDD_B
VBATI
RF
VDDPA
PASENSE+VDDBUF
DCIO
Herta
VCCBIASVCC
VCC
VCCA
VCCB
WIVI
VDIG
Ingela
Wopy
REGN101
VDD_D
DCDCN301
2.75V
2.75V
2.75V
2.8V
GSM PAM
UMTS PAM
VBATI0.1ohm
V_wivi_AV_wivi_B
4. TROUBLE SHOOTING
- 135 -
4.16.1 Step 1
Figure 4-16-2. Step 1 : Regulator Block ➀
Check VBATI(R105) LP3981ILD-2.8
R875R847
Check point(C740)
3.7V OK?
Step 1Check Point (C740) in Power Source Block
To Check Power source to Check if main power source input or not
Yes
No
See The Step 2
3.7V OK?
No
Yes
Check The PowerSupply
Short? No
Yes
Soldering Check Component(R847 & R875)
In Power Source Block
Check Point (R847)
in Power Source BlockTo Check Power source
Change Board
Check (C740 & R847)
in Blockto check inner line connectionFrom C740 to R847
➄
➄
➄
➄
➀
Figure 4-16-3. Power Source Block ➄
4. TROUBLE SHOOTING
- 136 -
4.16.2 Step 2
Figure 4-16-4. Step 2 :GSM PAM Block ➁
3.7V OK?
Step 2Check VBATI (R407)in GSM PAM Blockto Check if main powersource input or not Yes
No
See The Step 3
3.7V OK?
Check FL401 to check if powersource input or not
Yes
No
Short ?No
Change BoardCheck FL401 & R407inner Line connection
Change FL401
Yes
3.7V OK? No
Yes
Check The PowerSupply
Short? No
Yes
Soldering Check Component(R847 & R875)
In Power Source Block
Check (C740 & R105)
in Blockto check inner line connectionFrom C740 to R105
Check Point (C740)
in Power Source BlockTo Check Power source
Change Board
➁
➄
➀➄
➄
GSM PAM
VBATI(R407)
(Top)
FL401
➁
4. TROUBLE SHOOTING
- 137 -
4.16.3 Step 3
Figure 4-16-5. Step 3 :WCDMA PAM Block ➂
WCDMA PAM
VBATI(R307)
R875R847
Check point(C740)
3.7V OK?
Step 3Check VBATI (R307)in WCDMA PAM Block Yes
No
See The Next Page
3.7V OK?
No
Yes
Check The PowerSupply
Short ?
No
Yes
Soldering Check Component(R847 & R875)
In Power Source Block
Check Point (C740)
in Power Source BlockTo Check Power source
Change Board
Check (C740 & R105)in Block ,to check inner line connectionFrom R307 to R105
➂
➄
➂ ➄
➄
Figure 4-16-6. PAM Power Source ➄
4. TROUBLE SHOOTING
- 138 -
Figure 4-16-7. Power for Radio ASIC
2.75V OK?
NoYes
2.75V OK?
Yes
No
Check the Vincenne
Check the VincenneCheck Point
(VDDB)
Common Input Power is OKSee The Next Part
VDDA(R2250)
VDDB(R2251)
TopBottom
20122012 2012
C11710u
R2250
0
C11610u 10u
R2251
0
C115
Vincenne(N503)
Ingela(N405)
Wopy (N201)
4. TROUBLE SHOOTING
- 139 -
4.16.5 Checking Regulator Part
Figure 4-16-8. Regulator Block
Figure 4-16-9. Regulator Circuit Diagram
LP3981ILD-2.8Regulator
EXTLDO(R103)
V_ wivi_B(R104)
V_ wivi_A(R106)
➁
➃
➂
2012
C1130.1u 10u
R104
0
C114
BYPASS5
GND14
7G
ND
2
6VEN
2VIN
VOUT1
VOUT_SE3
LP3981ILD-2.8N101
0
R106
0
R105
C1120.033u
R103
0
Check Point or(R106) (R108)
To Check RegulatorOutput Voltage
No
Yes Yes
Poin t High?No
Check EXTLODPoint To Check regulator enable
signal
Change the Board
Change the Regula torRegula tor Circuit is OK, See the next Page
2.8V OK? ➃
➃
➂➁
>> V_wivi_A
>> V_wivi_BTXTLDO >>
VBATI >>
➂
➁➃
4. TROUBLE SHOOTING
- 140 -
4.17 Checking VCXO Block
The reference frequency (13MHz) from B201 (Crystal) is used WCDMA TX part and BB part.Therefore you have to check below 3 point.
Figure 4-17-1. Bottom Place
Check 2
Check 1
Check 3
4. TROUBLE SHOOTING
- 141 -
Check 1. Crystal part
If you already check this crystal part, you can skip check 1.
Figure 4-17-2. Test Point (Crystal Part)
Figure 4-17-3. Schematic of the Crystal Part
Figure 4-17-4. 13MHz at B201.3
B201.3
47p
C231
R214
NA
56p
C233
NA
R21
3
V201
BBY58-02W
3
13MHz
B201TSX-8A
2 GND1
GND24
1HOT1
HOT2
2.7pC234
R21
1
NA
4.7pC232
R21710K
R216
10K
R212
1KC2240.01u
C230
330pVCXOCONT
B201.3
4. TROUBLE SHOOTING
- 142 -
Check 2. 13MHz at TX part
Figure 4-17-6. Schematic of the Tx Part
Figure 4-17-7. 13MHz at N304.B1,C1
N304.B1N304.C1
TP305
TP302
TP303TP304
0.01uC332
A2QIN
A1QINBAR
INA4
INBARA3
TP301C33122p
TP306
TXIATXIBTXQATXQB
XOOBXOOA
Figure 4-17-5. Test point (13MHz at TX part)
N304.B1N304.C1
4. TROUBLE SHOOTING
- 143 -
Check 3. 13MHz at BB part
N201.C1
Figure 4-17-8. Test point (13MHz at BB part)
Figure 4-17-9. Schematic (13MHz at BB Part)
Figure 4-17-10. 13MHz at N201.C1
47p
C231
C2230.01u
82pC221
VCCREFB10
XOIAC10D10
C7
MC
LK
C6
GN
DL
F
2.7pC234
0
R210
R215
10
R216
10K
R212
1K
1uHL208
C230
330p
22pC225
0.01uC219
VCXOCONT
VDD_B
MCLK
N201.C1
4. TROUBLE SHOOTING
- 144 -
Check B201.3 No
Refer to graph 4-17-4
Yes
Check N304.B1 & C1 NoRefer to graph 4-17-7
Yes
Check N304.C1 No
Refer to graph 4-17-10
VCXO part has a problem.Changing B201
Checking 113MHz at VCXO
Checking 213MH z at TX part
Checking 313MHz at BB part
N304 has any problem.Changing RF board
N304 has any problem.Changing RF board
VCXO part is O.K.Check next stage
4. TROUBLE SHOOTING
- 145 -
4.18 Checking Ant. SW Module Block
Figure 4-18-1. Antenna Switch Block(Bottom)
Figure 4-18-2. Schematic of Antenna Switch Block(Bottom)
ANTSW2ANTSW1
ANTSW3
ANTSW0
LMSP43MA-288
C1100.01u
C10610p
C10710p
L104
L105
C1080.01u
C10510p0.01u
C109 C10410p
0
R102
L103
AN
T7
6G
ND
1G
ND
21114
GN
D3
GN
D4
1516G
ND
5
12GSM18001900_TX
2GSM1800_RXGSM1900_RX
3
GSM900_RX1
GSM900_TX13
VC198
VC2VCG
5
10VDD
4WCDMA
FL101LMSP43MA-288
0.01uC102
ANTSW2
ANTSW1
ANTSW0
ANTSW3
4. TROUBLE SHOOTING
- 146 -
4.19 Checking Antenna Switch Block input logic
4.19.1 Mode Logic by TP Command
EGSM Tx
ANTSW1
ANTSW2
ANTSW3
WCDMA & EGSM Rx
DCS Tx
ANTSW1
ANTSW2
ANTSW3
DCS Rx
Low
Low
Low
Low
Low
Low
Low
Low
High
High High
High
PCS Rx
ANTSW1
ANTSW2
ANTSW3
High
Low
Low
4. TROUBLE SHOOTING
- 147 -
Figure 4-19-1. Antenna Switch Module Logic
Band ANTSW0 ANTSW1 ANTSW2 ANTSW3
EGSM Tx H L L H
EGSM Rx H L L L
DCS Tx H H H L
DCS Rx H L H L
PCS RX H H L L
WCDMA H L L L
4. TROUBLE SHOOTING
- 148 -
4.19.2 Checking Switch Block power source
* Before Checking this part, must check common power source(throughVincenne) part
TP Command
MODE=0
SWRX=64,1024,2
Open?
High? OK? Resoldering
Check each modeBy TP command Change the Board
No
No No
Yes
Yes Yes
Check soldering(L105)
Check Soldering
It is necessary to check short condition.
Using Tester. Check 4 resistor
ANTSW0(L105),ANTSW1(L104)
ANTSW2(L103),ANTSW3(R102)
Check ANTSW0(L105)
To check Switch input power source
A. EGSM Rx mode
B. EGSM Tx mode
4. TROUBLE SHOOTING
- 149 -
EGSM Rx
MODE=0
SWRX=64,1024,2
ANTSW1
ANTSW2
ANTSW3 High
LOW
LOW
Figure 4-19-2. EGSM Rx Mode
EGSM Tx
MODE=0
SWTX=1,64,7,1024,1
ANTSW1
ANTSW2
ANTSW3 High
LOW
LOW
Figure 4-19-3. EGSM Tx Mode
C. DCS Rx mode
D. PCS Rx mode
4. TROUBLE SHOOTING
- 150 -
Figure 4-19-4. DCS Rx Mode
DCS Rx
MODE=2SWRX=699,1024,2
ANTSW1
ANTSW2
ANTSW3
High
LOW
LOW
Figure 4-19-5. PCS Rx Mode
PCS Rx
MODE=1
SWRX=661,1024,2
ANTSW1
ANTSW2
ANTSW3
High
LOW
LOW
4. TROUBLE SHOOTING
- 151 -
E. DCS / PCS Tx mode
Figure 4-19-6. DCS / PCS Tx Mode
DCS / PCS Tx
MODE=2
SWTX=1,699,0,1024,1
ANTSW1
ANTSW2
ANTSW3
High
High
LOW
4. TROUBLE SHOOTING
- 152 -
F. WCDMA mode
Figure 4-19-7. WCDMA Mode
Each ModeLogic OK?
Input Signal and Power toAntenna Switch Block is OK.
See the Next Page
No
Yes
Check MARITA(D601)
WCDMA Mode
MODE=4WTXC=9750,1,1,43,0,0,255,68
ANTSW1
ANTSW2
ANTSW3
LOW
LOW
LOW
4. TROUBLE SHOOTING
- 153 -
4.20 Checking WCDMA Block
Bottom View
start
1. CheckVCXO Block
4. CheckRF TX Level
3. CheckControl Signal
Redownload SW, Cal
2. CheckAnt. SW Module
6. CheckRX IQ
7. CheckRF RX Level
5. CheckPAM Block
➀
➁
➂
➆
Top View
➃
➄
4. TROUBLE SHOOTING
- 154 -
4.20.1 Checking VCXO Block
Refer to 4.17
4.20.2 Checking Ant. SW module
Refer to 4.18
4.20.3 Checking Control Signal
First of all, you have to check control signal. (data, clk, strobe)
TP203(CLK) TP202(DATA)TP201(STROBE)
Figure 4-20-1. Test point (Control Signal)
Figure 4-20-2. Schematic (Control Signal)
FROM MARITA SIDE FOR POWER SAVING
3.3pC210
R208
100
R205
0
C216390p
C211
22p
C213NA
XO
OO
NH
3
K3
RX
ON
H4
F3STROBE
C1VCCMIX
VC
CP
HD
K5
K4
VC
CP
LL
VCCRFK1
K9
VC
CR
FL
O
K8
VC
CV
CO
K7
VT
UN
E
B1IFOUTB
IND
BY
PK
2
D1MIXINA
E1MIXINB
PH
DO
UT
K6
H1RFIN
RF
LO
OB
K10
RF
OU
T
GNDBIAS
GNDBYPJ1
G1GNDEME
GNDIFC3
GN
DP
LL
H5
E3CLK
D3DATA
G3GLNA
F1
5.6nH
L203
LZT-108-5323N201
TP202
L205NA
TP201
C2093.3p
2.2nH
L204
NAL206
R2065.6K
TP203
C21222p
CLKREQ
WSTR
WDAT
GPRFCTRL
WCLK
WCDMA_RX
4. TROUBLE SHOOTING
- 155 -
TP201(STROBE)
TP203(CLK)
TP202(DATA)
TP201(STROBE)
TP203(CLK)
TP202(DATA)
Similar ?
Control Signal is O.K.Check next stage
Download the SW
Check TP2011,TP202TP203. Check shape and pk-pk level Refer to Graph 4-30
Yes
No
After downloadingIf signal is not OKChange the D701
Figure 4-20-3. Control Signal
4. TROUBLE SHOOTING
- 156 -
4.20.4 Checking RF TX Level
Fig. 4-20-5 Output Level at RF test connector( W101 )
Fig. 4-20-6 Output Level at Switch Output(FL101 , C103)
Figure 4-20-4. Test point (RF TX Level)
Check 1W101
Check 3FL102.C111
Check 6N302.C307PAM Input
Check 4N303. Isolator Output
Check 5N303.Isolator Input
Check 2FL101.C103Switch Output
4. TROUBLE SHOOTING
- 157 -
Fig. 4-20-7 Output Level at FL102.C111 Fig. 4-20-8 Output Level at Isolator Output(N303.Out )
Fig. 4-20-9 Output Level at Isolator Input( N303. In)
Fig. 4-20-10 Output Level at PAM Input( N302,C307)
Fig. 4-20-11 Output Level at Wivi Output( N304.C320)
4. TROUBLE SHOOTING
- 158 -
To verify that the phone fulfils requirments on maximum output power.
Check 1About 23dBm?
RF TX Level is OKCheck next stage.
Check output power at the W101 with antenna Cable. Refer to Graph 4-20-5
No
Yes
Set the FDD Test of the Agillent 8960Set the Maximum Power
YesThe W101 has any problem.Change the W101
Check 2About 15dBm?
Check the power at the FL101.C103 with probe. Refer to Graph 4-20-6
No
YesThe FL101 will be broken.Change the FL101
Check 3About 19dBm?
Check the power at the FL102.C111 with probe. Refer to Graph 4-20-7
No
YesThe FL102 has any problem.Change the FL102
Check 4About 19dBm?
Check the power at the N303.out with probe. Refer to Graph 4-20-8
No
YesThe N303 has any problem.Change the N303
Check 5About 17dBm?
Check the power at the N303.In with probe. Refer to Graph 4-20-9
No
YesThe N302 has any problem.You have to check PAM block.
Check 6About -6dBm?
Check the power at the N302.C307 with probe. Refer to Graph 4-20-10
The N304 will be not operated.Change the board
No
4. TROUBLE SHOOTING
- 159 -
4.20.5 Checking PAM Block
Figure 4-20-12. Test point
Rosaili
Duplexer Output(C111)
WCDMA PAM
Wivi input(C307)
WPAREF(R306)
VCCWPA(C310) from RosailiWDCDCREF (C302)
Comp(R301)
(Top)
4. TROUBLE SHOOTING
- 160 -
Figure 4-20-13. Schematic(PAM)
Figure 4-20-14. Schematic(DC-DC convertor:Rosaili)
C3080.01u
ESI-3EAR1.950G01-T
GN
D1
GN
D2
GN
D3
GN
D4
GN
D5
INO
UT
N303
VBATI
0.1uC310
0
R307
C31110p
R306
0
C30922p
13GND6
GND714
17GND8
GN
D9
20 21R
FIN
RF
OU
T10
VCC1118
19VCC12
15VCC21
16VCC22 VCC_BIAS1
4
5VCC_BIAS2
7VCC_DET
VCTRL11
VCTRL22
8VDETECT
N302
RF9266
3GND1
22G
ND
10G
ND
1123
GND26
9G
ND
3
GN
D4
11
12GND5
WCDMA_TX
VCCWPA
WPAREF
2012
3838
20122012
33KR301
SYNC
_SHDNC1
A1_SKIP
C2BATT
COMPA2
B4GND
C3LX
A3OUT
PGNDC4
A4REF
B1
N301MAX1820ZEBC
C3061000p100K
R302C30410u
L302
C30222p
39K
R303
10uC303
VBATI
L301
10uC305
4.7uH
L304
L303
C301330p
WPOWERSENSE
WDCDCREF
VCCWPA
4. TROUBLE SHOOTING
- 161 -
Yes
No
TP Command-mode =4-wtxc = 9750,1,1,43,0,0,255,68
23dBm ?Check Duplex output
(C111)To Check PAM
output
WCDMA PAM is OKSee the Next page
Level< -
10dBm?
NoDownload the SW
& Calibrate
Level>2dBm
Check C307 To Check PAM Input level
Check the WCDMA RF Tx Chip(Wivi)
Yes
Yes
2.5V ?
Check R306 To Check PAM control signal from Vincenne(WPAREF)
Check the Vincenne to WCDMA PAM Signal line
3.4V ?Check C310To Check PAM VCC BIASfrom DC/DC convertor(VCCWPA)
No
No
No2.5V ? Change
the Rosaili
Yes
Yes
Change The PAM
No
Check R301To Check DC/DC convertor COMP
4.20.6 Checking RX I,Q
To verify the RX path you have to check the pk-pk level and the shape of the RX I,Q.
- 162 -
Figure 4-20-15. WCDMA RF RX IC (Bottom)
Figure 4-20-16. RX I,Q signal (CW:2142MHz)
Figure 4-20-17. RX I,Q signal (CW:2141MHz)
N201.A7 (RXQA) C227N201.A8 (RXQB) C229N201.A9 (RXIA) C228N201.A10 (RXIB) C226
Feed a CW signal at 2142MHz with a power level of ñ60dBm.
About 2 MHz
Feed a CW signal at 2141MHz with a power level of ñ60dBm.
About 1 MHz
- 163 -
Figure 4-20-18. RX I, Q signal
N201.A7 (RXQA) C227
N201.A8 (RXQB) C229
N201.A9 (RXIA) C228
N201.A10 (RXIB) C226
About 120mVp-p? Change Wopy (N201)
Check the pk-pk level at N201.A7~A10 with Oscilloscope.Refer to
Yes
No
Set the CW Mode of the Agillent8960Feed a CW signal at 2141MHzSet the RX Continuous mode
Check the Mean level at N201.A7~A10 with Oscilloscope.Refer to
Yes
No
Check the frequency at N201.A7~A10 with Oscilloscope.Refer to
Yes
No
Verify whether the signal was similar as Graphat N201.A7~A10 with
Oscilloscope.
Yes
No
About 160mV?
About 1MHz?
Similar?
Check Next Stage
Change Wopy (N201)
Change Wopy (N201)
Change Wopy (N201)
4.21 Checking GSM Block
4. TROUBLE SHOOTING
- 164 -
➀➁
➂
➃
➄ ➅
start
2. CheckVCXO Block
5. CheckRF TX Path
4. CheckControl Signal
Redownload SW, Cal
3. CheckAnt. SW Module
6. CheckRF RX Path
1. CheckRegulator Circuit
4. TROUBLE SHOOTING
- 165 -
4.21.1 Checking Regulator Circuit
Refer to 4.16 Checking Power Source blockIF you already check this point while checking power source block , You can skip this test.
4.21.2 Checking VCXO Block
Refer to 4.17 Checking VCXO blockIF you already check this point while checking VCXO block , You can skip this test.
4.21.3 Checking Ant. SW Module
Refer to 4.18 Checking Ant. SW ModuleIF you already check this point while checking Ant. SW module , You can skip this test.
4. TROUBLE SHOOTING
- 166 -
4.21.4 Checking Control Signal
Test Program Script
MODE=0
SWTX=1,64,7,1024,1
RADSTR (TP407)
RADDAT (TP408)
RADCLK(TP406)
TXON (R421)
VDD_A (C426)
VDD_A (L411)
VDD_A (L416)
Vtune(C448)
LPF block
➀
➁
➂
2012
R412
R421
0
TP408
C45022p
R427
390
R425
560
C4390.01u
TP406
TX
OL
A
F1
TX
OL
B
D3
TX
ON
H1
VC
CB
UF
K7VCCPLL VCCRF
A6
VC
CV
CO
G10
VT
UN
EH
10
K8XOOB
K9XOOC
H7XOOLA
PC
TL
PH
DO
UT
J10
PSH5
QRAA8
QRBA7
C4REON
C1
RF
HA
D1
RF
HB
RFHCA2
RFHDA1
RFLAA5
RFLBA4
E3
RX
ON
C7STROBE
TX
OH
AK
1T
XO
HB
J1 G1
GN
DV
CO
3E
8G
ND
VC
O4
F8
GN
DV
CO
5
GN
DV
CO
6F
10
A10IRAIRB
A9
MODAK3K4
MODBMODC
K5
MODDK6
NC
1C
10
NC
2D
10
NC3H4
H8
NC
4
NC5K2
NC6K10
G3
F3
BS
EL
CLKC5C6
DATA
GNDBUFH3
GN
DP
LA
NE
C3
H6GNDPLL
GNDRFA3
B1
GN
DR
F1
E1
GN
DR
F2
GN
DS
ILE
NT
E10G
8G
ND
VA
R
GN
DV
CO
1B
10C8
GN
DV
CO
2D
8
LZT-108-5325N405
C444
1800p
330pC448
22p
C427
1200pC445
C433
22p
TP407
R426
120
L413
100uH
L414
C447560p
C4490.01u
RXON
BSEL0
TXON
➀
➁
➂
4. TROUBLE SHOOTING
- 167 -
Similar?
Check TP406,TP408,TP407.
Check if there is any Major difference.Refer to left side of Figure 4-21-1
Check R421,C448.
Check if there is any Major difference.
Refer to right side of Figure 4-21-1
Yes
NoRedownload SWShort?
Yes
No
Change the board
Similar?
Yes
No Resoldering VDD_A block(L416, L411, L414, R409)Short?
Yes
No
Resoldering LPF blockControl signal is OK.See next page to check
Figure 4-21-1. GSM RF Control signal
4. TROUBLE SHOOTING
- 168 -
4.21.5 Checking RF Tx Path
A. GSM Tx path Level
Figure 4-21-2. GSM/DCS/PCS Tx Path Level
4. TROUBLE SHOOTING
- 169 -
Figure 4-21-3. Test Point of GSM/DCS/PCS Tx Path
N405
N403N404
N401
➃' ➃
➂➂'
➁
➀
➄
➄'
ANTPAD101
KMS-507W101
ANTG1
G2RF
33p
C103
1.8nH
L101
1.2p
0
C101
R101
8.2nHL102
AN
T7
6G
ND
1G
ND
21114
GN
D3
GN
D4
1516G
ND
5
12GSM18001900_TX
2GSM1800_RXGSM1900_RX
3
GSM900_RX1
GSM900_TX13
VC198
VC2VCG
5
10VDD
4WCDMA
FL101LMSP43MA-288
GSM_TX
GSM_RX
PCS_RX
DCS_RX
DCS_TX
➀
4. TROUBLE SHOOTING
- 170 -
B. GSM Tx Output Level Check
Figure 4-21-4. GSM/DCS/PCS Tx Level at ➀
Test Program Script
1. GSM TxMODE=0SWTX=1,64,5,1024,1
2. DCS TxMODE=2SWTX=1,699,0,1024,1
3. PCS TxMODE=1SWTX=1,661,0,1024,1
Check GSM/DCS/PCS output power at .
Check if there is any Major difference.
Refer to Figure 4-21-4.GSM>32dBm
DCS>29dBm
PCS>29dBm
NoSee Next page to check Tx pathSimilar?
Yes
GSM/DCS/PCS Tx path OK. See Chapter 4.21.6 to check Rx path
v Agilent 8960 Setting: GSM BCH+TCH Mode
v Oscilloscope Setting
➀
4. TROUBLE SHOOTING
- 171 -
C. GSM RF Transceiver IN/OUT Signal Check
MODA (R410)
MODB (R411)
MODC (R424)
MODD (R423)
DCS/PCS Tx(R414)
GSM Tx(R418)
N404
N403
GSM Tx(L406)
DCS/PCS Tx(L405)
➁
➃
➂
BLM15BB750SN1J
270R415
33p
C429
R410
100
R414
18
L403
100
R423
R416270
12pC428
100
R424
22pC425
3B1
4B2
2G
ND
15
GN
D2
NC
6
1UB
LDB21897M15CN404
0
R418
R4170
R411
100
TX
OL
A
F1
TX
OL
B
D3
TX
ON
H1
VC
CB
UF
K7VCCPLL VCCRF
A6
VC
CV
CO
G10
VT
UN
EH
10
K8XOOB
K9XOOC
H7XOOLA
PC
TL
PH
DO
UT
J10
PSH5
QRAA8
QRBA7
C4REON
C1
RF
HA
D1
RF
HB
RFHCA2
RFHDA1
RFLAA5
RFLBA4
E3
RX
ON
C7STROBE
TX
OH
AK
1T
XO
HB
J1 G1
GN
DV
CO
3E
8G
ND
VC
O4
F8
GN
DV
CO
5
GN
DV
CO
6F
10
A10IRAIRB
A9
MODAK3K4
MODBMODC
K5
MODDK6
NC
1C
10
NC
2D
10
NC3H4
H8
NC
4
NC5K2
NC6K10
G3
F3
BS
EL
CLKC5C6
DATA
GNDBUFH3
GN
DP
LA
NE
C3
H6GNDPLL
GNDRFA3
B1
GN
DR
F1
E1
GN
DR
F2
GN
DS
ILE
NT
E10G
8G
ND
VA
R
GN
DV
CO
1B
10C8
GN
DV
CO
2D
8
LZT-108-5325N405
75L404
L40522nH
NAR419
B13
B24
GN
D1
2
GN
D2
5 6N
C
UB1
N403LDB211G8020C
33nHL406
MODB
MODC
MODD
MODA
➁
➃ ➂
4. TROUBLE SHOOTING
- 172 -
Check Mode(A/B/C/D)signal at .
Check if there is any Major difference.
Refer to Figure 4-21-5 Yes
NoResoldering MODE block
(R423, R424, R411, R410)Similar?
GSM/DCS/PCS>5dBm
See Next page to check Tx path
Check GSM RF Transceiver Output power at .
Resoldering Tx BalunGSM : N404
DCS/PCS : N403
No
GSM/DCS/PCS>5dBm
No
Yes
Check GSM/DCS Tx Balunoutput power at .
Yes
Redownload SW
➁
➂
➃
MODA
MODB
Figure 4-21-5. GSM/DCS/PCS Tx MODE signal
4. TROUBLE SHOOTING
- 173 -
D. GSM PAM Check
DCS Tx(C409)
GSM Tx(C410)
Vapc(C406)
➄
BLM15AB601SN1J
11G
ND
4G
ND
51416
GN
D6
17G
ND
7
19P
GN
D
13RSVD
TX_ENABLE1
VA
PC
2 6V
CC
1
VC
C2
12
VS
UP
PL
Y18
SKY77321N401 5
BS
3DCS_PCS_IN
15DCS_PCS_OUT EGSM_IN
4
EGSM_OUT10
7G
ND
1
8G
ND
2
9G
ND
3
33pC406
33p
C410
R4023K
C409NA
C411
2.2nH
C405100p
L401
NAC407
1KR401
150p
C401100pC402
0
R403
GSM_TX
DCS_TX
PAREG
IOUT
➄
4. TROUBLE SHOOTING
- 174 -
Figure 4-21-6. GSM Tx control signal Figure 4-21-7. DCS/PCS Tx control signal
TXON
Vapc (GSM)
TXON
Vapc (DCS/PCS)
GSM:33.5dBmDCS: 31.0dBm
Yes
Changing GSM PAM(N401)
Check GSM/DCS PAM output power at .
GSM Tx path OK. See Next page to check
Check Vapc level.
Check if there is any Major difference.
Refer to Graph 4-21-6/7Yes
NoRedownload SW, CalVapc>1.5 V?
No
➄
4. TROUBLE SHOOTING
- 175 -
4.21.5 Checking RF Tx Path
A. GSM Tx path Level
Loop
filte
rP
D
Pre
-sc
aler
AD
C
Clk
AD
C
GS
M H
erta
G
SM
Ing
ela
DC
S R
X S
AW
FL4
02
Mo
bile
Sw
itch
KM
S-5
07
An
ten
na
An
ten
na
SW
mo
du
leLM
SP
43M
A-2
88
GS
M R
X S
AW
Z40
1
GS
M R
x :
Ch
64, -
50d
Bm
, CW
DC
S/P
CS
Rx
: C
h69
9, -
50d
Bm
, CW
GS
M :
-50d
Bm
DC
S :
-50
dBm
GS
M/D
CS
/PC
S I/
Q L
evel
I+/I-
/Q+
/Q-
: 200
mV
pp
GS
M :
-.51
.5dB
m
DC
S/P
CS
: -
51.5
dBm
GS
M/D
CS
/PC
S I/
Q L
evel
I/Q :
2.5V
pp
PC
S R
X S
AW
SA
FE
C1G
96F
A0F
00
➀
➁
➂➂'
Figure 4-21-2. GSM/DCS/PCS Tx Path Level
4. TROUBLE SHOOTING
- 176 -
N405Z401
FL402
FL403➀
➁
➂
➂'
v Agilent 8960 SettingCW ModeGSM : -50dBm@Ch65(948MHz)DCS : -50dBm@Ch700(1842.8MHz)PCS : -50dBm@ch700(1889.0MHz)
v Oscilloscope Setting
Test Program Script
1. GSM TxMODE=0SWTX=1,64,5,1024,1
2. DCS/PCS TxMODE=2(DCS),1(PCS)SWTX=1,699,0,1024,1
4. TROUBLE SHOOTING
- 177 -
B. GSM I/Q Signal Check
Idata(TP402)
Qdata(TP404)
DCLK (TP403)
QRB (R428)
QRA (R429)
IRB (R431)
IRA (R430)
➀
➁
R4280
R405100K
R429
TP402
0
R431
0
TX
OL
A
F1
TX
OL
B
D3
TX
ON
H1
VC
CB
UF
K7VCCPLL VCCRF
A6
VC
CV
CO
G10
VT
UN
EH
10
K8XOOB
K9XOOC
H7XOOLA
PC
TL
PH
DO
UT
J10
PSH5
QRAA8
QRBA7
C4REON
C1
RF
HA
D1
RF
HB
RFHCA2
RFHDA1
RFLAA5
RFLBA4
E3
RX
ON
C7STROBE
TX
OH
AK
1T
XO
HB
J1 G1
GN
DV
CO
3E
8G
ND
VC
O4
F8
GN
DV
CO
5
GN
DV
CO
6F
10
A10IRAIRB
A9
MODAK3K4
MODBMODC
K5
MODDK6
NC
1C
10
NC
2D
10
NC3H4
H8
NC
4
NC5K2
NC6K10
G3
F3
BS
EL
CLKC5C6
DATA
GNDBUFH3
GN
DP
LA
NE
C3
H6GNDPLL
GNDRFA3
B1
GN
DR
F1
E1
GN
DR
F2
GN
DS
ILE
NT
E10G
8G
ND
VA
R
GN
DV
CO
1B
10C8
GN
DV
CO
2D
8
LZT-108-5325N405
TP403
VSS3E8
VSS4VSS5
F4
VSS6F7G3
VSS7G4
VSS8VSS9
H8
G7
D5QDAT
A6QRA
A5QRB
RESETON_RESETBD2
E3REXT
B4RXSTR
G8SYSCLK2_MCLK
A2VDD1
B5VDD2
B7VDD3
F5VDD4VDD5
F8
VDD6H6
A1VSS1VSS2
B1C4
GPA6D7
GPA7
GPCLKE5
GPDATE6
I2CCLKD1
I2CDATD3
A4IDAT
IRAA8
IRBA7
MICING1
MICIPF3
G2NC1
H1NC2
F6PCMCLK
H7PCMDL
G6PCMSYN
PCMUL
DAC03
C2DACCLKDACDAT
C1
DACSTRD4
C5DCLK
DEC1E2
DEC2H2H3
DEC3DEC4
B2E1
DEC5
GPA0B8
GPA1B6C6
GPA2C7
GPA3GPA4
C8D6
GPA5D8
N402 LZN-901-0536-R1A
ADSTRE7
AUXI1E4
H4AUXO2
F1AVDD
BEARNH5G5
BEARP
CCOF2
DAC01C3B3
DAC02A3
0
R430
TP404
IDATADCLK
QDATA
➁
➀
- 178 -
Figure 4-21-9. Herta IQ data and DCLK Figure 4-21-10. Ingela IQ signal
I Data
Q Data
DCLK
QRB
QRA
IRB
IRA
Figure 4-21-11. Ingela IQ signal
QRB
QRA
- 179 -
Check GSM/DCS/PCS Rx IQ data at .
Check if there is any Major difference.
Refer to Graph 4-21-9. Yes
GSM Rx path OK.See Next page to check
NoRedownload SW, Cal
Check GSM/DCS/PCS Rx IQ signal level at
Refer to Graph 4-21-10.
Similar?
v Agilent 8960 SettingCW ModeGSM : -50dBm@Ch65(948MHz)DCS : -50dBm@Ch700(1842.8MHz)PCS : -50dBm@ch700(1889.0MHz)
v Oscilloscope Setting
Yes
IQ signal: 200mV?
Redownload SW, Cal
See Next page to check Rx pathNo
➀
➁
- 180 -
C. GSM RF Level Check
FL402
Z401
➂'
➂'
➂
FL403
Figure 4-21-12. GSM/DCS/PCS Rx path
C412
33pO2
SAFEC1G84FA0F00FL402
2G1
5
G2
1IN
3O1
4
1IN
3O1
4
O2
SAFEC1G96FA0F00FL403
2G1
5
G233p
C431
1.5nH
C437 O1
4
O2
Z401SAFEC942MFL0F00
2G1
5
G2
1IN
3
PCS_RXDCS_RX GSM_RX
GSM Rx path OK.
Check GSM/DCS/PCS Rx signal level at .
v Agilent 8960 SettingCW ModeGSM : -50dBm@Ch65(948MHz)DCS : -50dBm@Ch700(1842.8MHz)PCS : -50dBm@ch700(1889.0MHz)
Yes
GSM:-51.5dBmDCS/PCS:-51.5dBm
Change Ant. SW module(N1000)
No➂
- 181 -
4.22 Checking Bluetooth Block
<Bottom view>
** BT - Bluetooth
➁
➀
start
1. CheckBT Regulator Block
2. CheckBT Chip Block
- 182 -
➀
➁
<Bottom view>
C647 22p
120KR652120K
100pC642
22KR650
C6410.1u
0.1uC646
VBT
100pC643
R649 NA
ANT601
FEED
NC1
NC2
R651 0
33pL602
3G
ND
14
GN
D2
GN
D3
5G
ND
46
1IN OU
T 2
CN601
MM8430-2600B
10uC640
2012
27nHL601
20121R648
0.1uC645
39VDDIORFVDD_IOV
38
VREG1840
19XTAL1_LPO
29XTAL1_SYS
XTAL2_LPO18
XTAL2_SYS28
33GPIO7_FSC_IPGPIO8_DCLK_IP
36
GPIO9_DB_IP34
15GP_CLK
53PGND
27POR_DISABLE
REF_CLK30
45RESET_N TCK_JTAG
50
49TDI_JTAG
TDO_JTAG48
47TMS_JTAG
17VANLI
VANLO22
VBAT16
37VDD18
GND678
GND7GND8
910
GND9
21GPIO0GPIO1
20
25GPIO10
GPIO112431
GPIO1223
GPIO13GPIO14
32
GPIO2_CTS_UART4441
GPIO3_RTS_UART43
GPIO4_TXD_UARTGPIO5_RXD_UART
42
35GPIO6_DA_IP
Bluetooth (BGB202/S2)1_
8V_D
EC
OU
P1
26
1_8V
_DE
CO
UP
246
ANT2
1GND1
GND101112
GND11GND12
1314
GND13GND14
5152
GND15
GND234
GND3GND4
56
GND5
U604 BGB202_S2
R656 33p
UARTRX3UARTCTS3UARTRTS3
UARTTX3
PCMCLK
PCMDATB
CLKREQ
MCLK
RTCCLK
PCMSYN
PCMDATA
RESOUT2n
VBT
C594
NA
0
R2171
R217975
VBATI
R2177
NA
100K
R2192
75R2186
0R599 4
1VDD
5VOUT
BT and T-Flash Regulator-2.85V
R1131N281D5-TR-F
U510
CE3
GND2
NC
VDIG
C19154.7u
1608
C18994.7u
1608
VTF
BTF_REG_EN
MCLK C643
RTCCLK C642
VBT C646
Bluetooth chip OutputC647
Bluetooth AntennaANT601
BTF_REG_EN R599
VBT at Regulator outputR2186
- 183 -
Checking Bluetooth Regulator Block
About 2.85V?
Check voltage level atBTF_REG_EN . R599 with Oscilloscope
About 2.85V?Check voltage level
At VBT.R2186 with Oscilloscope
Check Next Stage
No
No
Yes
Yes
Check Marita (D601)
Change Regulator(U510)
TP Command-pctr = 3,4,1-pdin = 3,4-pdou = 3,4,1-brts =1-ltcx = 3-dacc =0,2 responsed value-Btfa=1,1-Btfa=1,2
BTF_REG_EN R599
VBT at Regulator outputR2186
- 184 -
Checking Bluetooth Block
TP Command-pctr = 3,4,1-pdin = 3,4-pdou = 3,4,1-brst =1-ltcx = 3
LTCX=response value,OK-dacc =0,2 response value-Btfa=1,1-Btfa=1,2-Btsr=2
E5515C 8960 setting-Center Frequency => 2441MHz-Span =500kHz
2.85V?
Check frequency atMCLK , C643with Oscilloscope
Check frequency atRTCCLK , C642with Oscilloscope
Check Next Stage
No
No
Yes
Yes
Check VCXO block
32.768k ?
No
Yes
Check Marita Block ( D601 )
13MHz ?
Check BT regulator BlockCheck voltage level atVBT . C646 with Oscilloscope
Check Power leverat Bluetooth chip OutputC647 with Oscilloscope
Over-40dBm ?
No
Yes
Change BT Chip (U604)
MCLK C643
RTCCLK C642
VBT C646
Bluetooth chip OutputC647
→
- 185 -
5.1 GSM & WCDMA RF Block
5. BLOCK DIAGRAM
Figure 5-1-1. RF Block Diagram
Tank
VCO
VCO
XO
Loopfilter
PD
Pre-scaler
ADC
Clk
ADCGSM ADC
N402
DCDCN301
GSM TransceiverN405(Ingela)
UMTS TransmitterN304(Wivi)
UMTS ReceiverN201(Wopy)Antenna
Test Conn.W101
SwitchFL101
DCS Rx FilterFL402
Z401GSM RX Filter
DCS/PCS BalunN403
GSM BalunN404
DuplexerFL102
IsolatorN303
UMTS PAMN302 UMTS TX Filter
FL301
UMTS RF FilterFL201
UMTS IF FilterZ201
Crystal -13MB201
VaractorV201
GSM PAMN401
D701Wanda
MaritaD601
GSM
UMTS
PCS Rx Filter
FL403
BluetoothAntenna
Test Conn.CN601
BluetoothU604
BGB202
5. BLOCK DIAGRAM
- 186 -
Block Ref. Name Part Name Function Comment
Common FL101 LMSP43MA-288 Switch Band select
W101 KMS-507 Test Connector Calibration, etc
B201 TSX-8A_13MHz Crystal Reference -13M
WCDMA FL102 DFYY61G95LBNBC-TT1 Duplexer TRX
N201 LZT-108-5323 Receiver RX
FL201 SAFEH2G14FA0F00R00 RX RF Filter RX
Z201 TMXU753 RX IF Filter RX
N301 MAX1820ZEBC DC/DC TX
N302 RF9266 PAM TX
N303 ESMI-3EAL1.95G01-T Isolator TX
N304 LZT-108-5322 Transmitter TX
FL301 SAFEH1G95FL0F00R00 TX RF Filter TX
D701 ROP-101-3033_1 Analog Baseband TRX
GSM FL402 SAFEB1G84FA0F00 DCS RX Filter Direct Conversion
Z401 SAFEB942MFL0F00 GSM RX Filter Direct Conversion
FL403 SAFEB1G96FA0F00 PCS RX Filter Direct Conversion
N405 LZT-108-5325 Transceiver TRX
N401 SKY77321 PAM GSM/DCS/PCS Tri
N404 LDB21897M15C-003 GSM Balun TX
N403 LDB211G8020C-001 DCS/PCS Balun TX
D601 ROP-101-3035-_1 Modem
Bluetooth U604 BGB202_S2 Bluetooth
5. BLOCK DIAGRAM
Table 5-1-1. RF Part Component List
5. BLOCK DIAGRAM
- 187 -
6. DOWNLOAD
6.1 The Purpose of Downloading Software
• To make a phone operate at the first manufacturing– A phone = Hardware + Software– A phone cannot operate with hardware alone.– The hardware with the suitable software can operate properly.
• To upgrade the software of the phone– The software of the phone may be changed to enhance the performance of the phone.– The older version software of the phone can be replaced to the newer version.
• Download Tools– FlashRW : Download tool for U8XX0 software
6.2 Download Environment Setup
U8550 UARTdata cable
USB cable
Figure 6-2-1. U8XX0 Download can be done via UART & USB
6.3 U8XXX Download
6.3.1. U8XXX Download(1) - FlashRW configuarationA. Execute FlashRW_V200_Red.exe
B. Press the “Global Settings” on the top menu to configure FlashRW environment.
6. DOWNLOAD
- 188 -
6. DOWNLOAD
6. DOWNLOAD
- 189 -
C. Select Loader File for Product.
You can use browse button to select Loader File.
You must select only cxc1325414_R3V_u8550R. fldr for U8550.
Loader File is provided with FlashRW.
D. Select Port configurations for both RS232 Port and USB Port.
Baudrate should be 115200bps.
You have to do FlashRW configuration only at the first time of installation
6.3.1. U8XXX Download(2) - Phone Model SelectionA. Press Button for Model.
B. Select Model U8120 for U8550.
6. DOWNLOAD
- 190 -
6. DOWNLOAD
- 191 -
6.3.1. U8XXX Download(3) - Download file selectionA. 1. Press “Add” button to select LGE SSW files to download.
B. Don’t Press “Add1” button to select LGE GDFS file to download.
If you download old released LGE GDFS file, The phone will break down.
This “Add1” button will be used for upgraded if needed. Only When LGE propose this action, you
must press this button.
<Before Select>
<After Select>
6.3.1. U8XXX Download(4) - Connect & DownloadA. Click on connector icon( ) to connect to the phone Check the Dialog Box that say
“Please,switch on the target”.
B. Connect the phone to PC via Cable for Downloading. Phone should be turned off.
C. Turn the phone on to connect to PC.
6. DOWNLOAD
- 192 -
A
6. DOWNLOAD
- 193 -
6.3.1. U8XXX Download(5) - USB Driver InstallA. If you use FlashRW Tool firstly, Error will happen because of USB Driver uninstalled.
You have to do FlashRW USB Driver Installation only at the first time of installation
B. Push “the Next Button” in Found New Hardware Wizard
C. Select “Search for a suitable driver for my device” in Found New Hardware Wizard
6. DOWNLOAD
- 194 -
6. DOWNLOAD
- 195 -
D. Select “Specify a location” in Found New Hardware Wizard
E. Push “the Browse Button” , and then select “USB driver Information file” This File is provided with
FlashRW.
F. Push “the Next Button” in Found New Hardware Wizard
G. Push “the Finish Button” in Found New Hardware Wizard
6. DOWNLOAD
- 196 -
6. DOWNLOAD
- 197 -
H. Close FlashRW.exe
I. Remove & Insert Main battery to reset the phone
This action for USB Driver Install is done only at the first time of installation If you want to
download Software, just do as same as U8XXX Download (4) - Connect & Download says
6.3.1. U8XXX Download(6) - Connect & Download
6. DOWNLOAD
- 198 -
<While Downloading>
< After Downloading finished >
6. DOWNLOAD
- 199 -
6.3.1. U8XXX Download(7) - Trouble shooting
Check these questions when trouble happens.A. Check if UART & USB Port configuration is right.
B. Do not change RS-232 baud rate(115200BPS). It is fixed and never changed.
C. Check if UART & USB Cable is connected.
D. You can’t select any GDFS File. If you do, Trouble will happen in the phone.
E. Don’t disconnect downloading cable while downloading LGE SSW images into phone.
7.1 General Description
This document describes the construction and the usage of the software used for the calibration ofLG’s GSM/GPRS/WCDMA Multimedia Mobile Phone (U8550). The calibration menu and their resultsare displayed in PC terminal by Mobile phone.This calibration software includes GSM, DCS, WCDMA Band RF parts calibration and Batterycalibration. This calibration software was called “XCALMON(eXtended CALibration and MONitorprogram )”. From now on, the calibration software will be called XCALMON in this document.
7.2 XCALMON Environment
7.2.1 H/W Environment
- PC with RS-232 Interface & GPIB card installed- GSM/GPRS/WCDMA Multimedia Mobile Set (U8550)- Agilent 8960 Series 10 E5515C Instrument (E1985B ver 04.08)- Tektronix PS2521G Power Supply- ETC (GPIB cable, Serial cable, RF cable, Power cable, Dummy battery)
7.2.2 S/W Environment
- National Instrument GPIB & VISA (ver 2.60 full) driver install- Agilent 8960 VXI driver(E1960) install- XCALMON EXE files- OS : Window98, Window2000, WindowXP- Serial port configuration :
Baud rate: 115200 / Char length: 8bit / No Parity/ No Flow control Stop bits: 1 bit
7.2.3 Configuration Diagram of Calibration Environment
6. DOWNLOAD
- 200 -
7. CALIBRATION
U8550
Figure 7-1. Calibration Configuration Figure
7. CALIBRATION
- 201 -
7.3 Calibration Explanation
7.3.1 Overview
In this section, it is explained each calibration item in the XCALMON. Also the explanation includestechnical information such as basic formula of calibration and settings for key parameters in eachcalibration procedure.At first, when any of calibration is done, the results are displayed in the XCALMON result window andthe result of calibration will be stored in GDFS(Global Data Flash Storage).
7.3.2 Calibration Items
A. EGSM 900 Band
- MODA-D(MD bit) Delay Calibration- RXVCO Varactor Operating Point Calibration- TXVCO Varactor Operating Point Calibration- TX Loop Bandwidth Calibration- VCXO Calibration- TX Power Calibration- RSSI and AGC Calibration
B. DCS 1800 Band
- RXVCO Varactor Operating Point Calibration- TXVCO Varactor Operating Point Calibration- TX Loop Bandwidth Calibration- TX Power Calibration- RSSI Calibration
C. WCDMA Band
- RF VCO Center Frequency Calibration- TX Carrier Suppression Calibration- TX LPF Bandwidth Calibration- TX Maximum Output Power Calibration- TX Power Table Calibration- TX Open Loop Power Control Calibration- RX LPF Bandwidth Calibration- RX LNA Gain Switch and AGC Hysteresis Calibration- RX AGC Gain Max and Rx RSSI Calibration
7.3.3 EGSM 900 Calibration Items
A. MOD-A(MD bit) Delay Calibration
- PurposeThe procedure is designed to calibrate the timing alignment between the MODA-D signals and thereference signal (13 MHz). It also ensures that the MOD signals have stable values when they areclocked into the divider of the Phase-Locked Loop (PLL).- Procedure Proposal1. Set the ME to mid channel in the GSM TX band.2. Set the delay setting in default mode, that is, no delay.3. Wait approximately 300 us to 400 us to allow the PLL to lock.4. Measure the RMS phase error. A threshold value of > 20 deg indicates that the PLL is running in the
forbidden time region.5. Save the RMS phase error result locally.6. Step up the delay setting according to Table 10.1 below.7. Repeat from step 4.8. Choose delay setting that gives maximum distance to the consecutive field of corrupted RMS phase
error values in the vector.9. Store delay setting both to the GD_RF_Mod_Delay and to the GD_DirMod_Mod_Delay.10. Reset the radio.
7. CALIBRATION
- 202 -
Index DIMC MD
[0] 0 00(0)
[1] 0 01(1)
[2] 0 10(2)
[3] 0 11(3)
[4] 1 00(0)
[5] 1 01(1)
[6] 1 10(2)
[7] 1 11(3)
Table 7-1. Delay Settings for the MOD-A
7. CALIBRATION
- 203 -
B. RXVCO Varactor Operating Point Calibration
- PurposeTo adjust the varactor diode to a pre-determined operating point, so that the loop voltage of theRXVCO (measured with an ADC in AB 2000) is within the valid range. This is necessary to secure thatall RX channels can be reached.- Procedure Proposal1. Put the ME in static RX mode.2. Measure the loop voltage with the AB 2000 ADC for all CVCO settings, that is, 0 ~ 7. Find a CVCO
value that fulfills the requirements on loop voltage for low and high channel.3. If there are several CVCO values that fulfill the loop voltage requirements, then the optimum CVCO
value is the one that centers the loop voltage within the specified limits.4. Store the selected CVCO in the memory.
(GD_ RX_VCO_Centre_Frequency_Adjustment_Band)5 Reset the radio.
C. TXVCO Varactor Operating Point Calibration
- PurposeTo adjust the varactor diode to a pre-determined operating point, so that the loop voltage of theTXVCO (measured with an ADC in AB 2000) is within the valid range. This is necessary to secure thatall TX channels can be reached.
- Procedure Proposal1. Put the phone in static TX mode.2. Measure the loop voltage with the AB 2000 ADC for all CVCO settings, that is, 0 ~ 7. Find a CVCO
value that fulfills the requirements on loop voltage for low and high channel.3. If there are several CVCO values that fulfill the loop voltage requirements, then the optimum CVCO
value is the one that centers the loop voltage within the specified limits.4. Store the selected CVCO in the memory.
(GD_TX_VCO_Centre_Frequency_Adjustment_Band)5. Reset the radio.
D. TX Loop Bandwidth Calibration
- PurposeThe loop bandwidth is calibrated to match the pre-filtering of the modulation in DB 2000 by adjustingthe phase detector current.Note: This also indirectly adjusts the VCO gain that can otherwise not be calibrated.This will ensure a correct transfer function for the modulation and keep phase error to a minimum.
- Procedure Proposal1. Put the ME in switched TX mode on mid channel in frequency interval 11 for EGSM
(with random modulation).2. Measure the RMS phase error at the RF connector.3. Tune the phase detector current (IPHD) until the phase error is minimized. If two IPHD settings gave
the same RMS, choose the lowest value. Measure 10 bursts for each value.4. Calculate and store the IPHD values in GDFS
(GD_IPHD_8Temperature_and_24Channel_Compensation_Band)5. The offsets in the table are steps in the IPHD Table 10.2 and all offsets refer to the calibrated value
(Trim) at mid channel in room temperature.
E. VCXO Calibration
- PurposeThis procedure aims to calibrate the value of DAC3 to establish a VCXO-frequency that is sufficientlyclose to 13 MHz at room temperature. It also ensures that the VCXO tuning range is sufficient, andthat the temperature compensation table for VCXO is completed accordingly.Note: The frequencies in this section are related to the 13 MHz VCXO-frequency. Depending on thecalibration procedure, the 13 MHz VCXO frequency can be acquired by first measuring an EGSM,DCS, or W-CDMA RF frequency at the antenna and then translating the measured frequency to the 13MHz VCXO frequency.- Procedure Proposal1. Put the ME in switched low power TX mode with a modulated carrier on a mid channel. Use the
calibrated value of the cap array and phase detector current.2. Tune DAC3 in AB 2000 (VCXOCONT) to end and mid values, and check tuning range.
7. CALIBRATION
- 204 -
Frequency Interval
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
0 -2 -2 -2 -2 -1 -1 -1 -1 -1 0 0 0 0 0 1 1 1 1 1 1 2 2 2 2
1 -2 -2 -2 -2 -1 -1 -1 -1 -1 0 0 0 0 0 1 1 1 1 1 1 2 2 2 2
2 -2 -2 -2 -2 -1 -1 -1 -1 -1 0 0 0 0 0 1 1 1 1 1 1 2 2 2 2
3 -2 -2 -2 -2 -1 -1 -1 -1 -1 0 0 0 0 0 1 1 1 1 1 1 2 2 2 2
5 -2 -2 -2 -2 -1 -1 -1 -1 -1 0 0 0 0 0 1 1 1 1 1 1 2 2 2 2
4 -2 -2 -2 -2 -1 -1 -1 -1 -1 0 0 0 0 0 1 1 1 1 1 1 2 2 2 2
6 -2 -2 -2 -2 -1 -1 -1 -1 -1 0 0 0 0 0 1 1 1 1 1 1 2 2 2 2
7 -2 -2 -2 -2 -1 -1 -1 -1 -1 0 0 0 0 0 1 1 1 1 1 1 2 2 2 2
Table 10-2. IPHD Compensation for EGSM Band
7. CALIBRATION
- 205 -
Acquire the following VCXO (13 MHz) frequencies:fmin = 13 MHz VCXO-frequency @ DAC3=1fmid = 13 MHz VCXO-frequency @ DAC3=1024fmax = 13 MHz VCXO-frequency @ DAC3=2047
Note that it is necessary to translate the measured RF-frequency (EGSM, DCS, or W-CDMA) to the 13MHz VCXO-frequency.3. Acquire the ME temperature, TCal, from the temperature sensor in ME.4. Store fmin, fmid, fmax and TCal for calculation.5. Calculate the DAC-value, VCXOCONTCal, that gives zero frequency error at the mid channel, using
piecewise linear interpolation, and store the value in the memory (GD_RF_SYNT_CONFIG_ID and GD_VCXO)
6. CalculateK_LO = (fmid - fmin)/1023K_HI = (fmax - fmid)/1023
Each value is then multiplied by 100 and rounded to nearest integer, with the results stored in thememory (GD_RF_SYNT_CONFIG_ID).
AFC_DAC_STEP_LO = ROUND(100*K_LO)AFC_DAC_STEP_HI = ROUND(100*K_HI)
where ROUND(x) = x rounded to the nearest integer.
F. TX Power Calibration
- PurposeThese procedures describe how to tune the different power levels of the power amplifier to outputpowers corresponding to values in GSM 05.05, and explain how to calculate intermediate power levelsthat will ensure a good power versus time performance.
- Procedure Proposal1. Reset the DIRMOD-block, and select a ‚mid channel using the trimmed value on the capacity array
for VCO tuning and a default IPHD value as phase detector current. Turn on dummy burstmodulation.
2. Use the Multi-burst method to characterize the relation between output power and the DACvalue.Then store the DAC values that give the closest approximations to the power targets defined inTable 10-3.
3. To avoid yield problems with the power template and switching transients spectrum a margin to thecompression point of the PA should be observed. However, the output power must be kept withinthe tolerances specified in Table 10-3.
4. Store DAC values in memory (GD_FullPower_Band).5. Initiate the intermediate value calculation, which calculates and store the values in memory
(GD_IntermediatePower_Up/Down_1..7_Band).6. The difference between the transmitter power at two adjacent power control levels, measured at the
same frequency, shall not be less than 0.5 dB and not more than 3.5 dB.
G. RSSI and AGC Calibration
- PurposeThis procedure satisfies the two following requirements:Calibrate an absolute power level on the antenna to a corresponding RSSI value. This value togetherwith a pre-defined slope figure is then used to calculate the RSSI value of an arbitrary receivedantenna power. The formula y=kx+m is used. (Where k is the slope value, x the RSSI value, y theactual level, and m is an offset value.)Calculate the attenuation when the Low Noise Amplifier is switched off in the receiver branch.The attenuation value is stored in the flash memory and used when very high input signals are fed intothe ME.- Procedure Proposal1. Select switched receiver on a mid EGSM Channel.2. Feed a modulated -68.5 dBm signal, on the same mid EGSM-Channel to the antenna input.
Measure the RSSI value, calculate the RSSI table and store the value in GDFS as parameter:GD_RXLEVS_DBM_BURST_M_BAND.
3. On the same channel, now feed a modulated -50 dBm signal and measure the RSSI value.4. Switch off the LNA, using the command FREC=3,0,1, and measure the RSSI value.
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Parameter Target Full Power (dBm) Tolerances (dB)
PL 5 33.0 +0.5 – 1.0 Vol
PL 6 31.0 ±0.3 Vol
PL 7 29.0 ±0.5 Vol
PL 8 27.0 ±0.5 Vol
PL 9 25.0 ±0.5 Vol
PL 10 23.0 ±0.5 Vol
PL 11 21.0 ±0.5 Vol
PL 12 19.0 ±0.5 Vol
PL 13 17.0 ±0.5 Vol
PL 14 15.0 ±0.5 Vol
PL 15 13.0 ±0.5 Vol
PL 16 11.0 ±0.5 Vol
PL 17 9.0 ±0.5 Vol
PL 18 7.0 ±0.5 Vol
PL 19 5.0 ±0.5 Vol
Table 10-3. Target Power Levels for EGSM
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5. Calculate the difference between on and off (converting the result to ‚real dB attenuation) and storethe result in GD_MPH_RX_AGC_Parameters_Band.
7.3.4 DCS 1800 Calibration Items
A. RXVCO Varactor Operating Point Calibration
- PurposeTo adjust the varactor diode to a pre-determined operating point, so that the loop voltage of theRXVCO (measured with an ADC in AB 2000) is within the valid range. This is necessary to secure thatall RX channels can be reached.- Procedure Proposal1. Put the ME in static RX mode.2. Measure the loop voltage with the AB 2000 ADC for all CVCO settings, that is, 0 ~ 7. Find a CVCO
value that fulfills the requirements on loop voltage for low and high channel.3. If there are several CVCO values that fulfill the loop voltage requirements, then the optimum CVCO
value is the one that centers the loop voltage within the specified limits.4. Store the selected CVCO in the memory.
(GD_BAND_RX_VCO_Centre_Frequency_Adjustment)5 Reset the radio.
B. TXVCO Varactor Operating Point Calibration
- PurposeTo adjust the varactor diode to a pre-determined operating point, so that the loop voltage of theTXVCO (measured with an ADC in AB 2000) is within the valid range. This is necessary to secure thatall TX channels can be reached.- Procedure Proposal1. Put the phone in static TX mode.2. Measure the loop voltage with the AB 2000 ADC for all CVCO settings, that is, 0 ~ 7. Find a CVCO
value that fulfills the requirements on loop voltage for low and high channel.3. If there are several CVCO values that fulfill the loop voltage requirements, then the optimum CVCO
value is the one that centers the loop voltage within the specified limits.4. Store the selected CVCO in the memory.
(GD_BAND_TX_VCO_Centre_Frequency_Adjustment)5. Reset the radio.
C. TX Loop Bandwidth Calibration
- PurposeThe loop bandwidth is calibrated to match the pre-filtering of the modulation in DB 2000 by adjustingthe phase detector current.Note: This also indirectly adjusts the VCO gain that can otherwise not be calibrated. This will ensure acorrect transfer function for the modulation and keep phase error to a minimum.
- Procedure Proposal1. Put the ME in switched TX mode on mid channel in frequency interval 11 for DCS (with random
modulation).2. Measure the RMS phase error at the RF connector.3. Tune the phase detector current (IPHD) until the phase error is minimized. If two IPHD settings gave
the same RMS, choose the lowest value. Measure 10 bursts for each value.4. Calculate and store the IPHD values in GDFS
(GD_IPHD_8Temperature_and_24Channel_Compensation_Band)5. The offsets in the table are steps in the IPHD Table 10.4 and all offsets refer to the calibrated value
(Trim) at mid channel in room temperature.
D. TX Power Calibration
- PurposeTo tune the different DCS power levels of the power amplifier to output powers corresponding tovalues in GSM 05.05 and calculate the intermediate levels that ensure a good power versus timeperformance.- Procedure Proposal1. Reset the DIRMOD-block, and select a ‚mid channel using the trimmed value on the capacity array
for VCO tuning and a default IPHD value as phase detector current. Turn on dummy burstmodulation.
2. Use the Multi-burst method to characterize the relation between output power and the DACvalue.Then store the DAC values that give the closest approximations to the power targets defined inTable 10-5.
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Frequency Interval
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
0 -6 -6 -5 -4 -4 -3 -3 -2 -2 -1 -1 0 0 1 1 2 2 3 3 4 4 5 5 5
1 -6 -6 -5 -4 -4 -3 -3 -2 -2 -1 -1 0 0 1 1 2 2 3 3 4 4 5 5 5
2 -6 -6 -5 -4 -4 -3 -3 -2 -2 -1 -1 0 0 1 1 2 2 3 3 4 4 5 5 5
3 -6 -6 -5 -4 -4 -3 -3 -2 -2 -1 -1 0 0 1 1 2 2 3 3 4 4 5 5 5
4 -6 -6 -5 -4 -4 -3 -3 -2 -2 -1 -1 0 0 1 1 2 2 3 3 4 4 5 5 5
5 -6 -6 -5 -4 -4 -3 -3 -2 -2 -1 -1 0 0 1 1 2 2 3 3 4 4 5 5 5
6 -6 -6 -5 -4 -4 -3 -3 -2 -2 -1 -1 0 0 1 1 2 2 3 3 4 4 5 5 5
7 -6 -6 -5 -4 -4 -3 -3 -2 -2 -1 -1 0 0 1 1 2 2 3 3 4 4 5 5 5
Table 10-4. IPHD Compensation for DCS Band
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3. To avoid yield problems with the power template and switching transients spectrum a margin to thecompression point of the PA should be observed. However, the output power must be kept withinthe tolerances specified in Table 10-5.
4. Store DAC values in memory (GD_FullPower_Band).5. Initiate the intermediate value calculation, which calculates and store the values in memory
(GD_IntermediatePower_Up/Down_1..7_Band).6. The difference between the transmitter power at two adjacent power control levels, measured at the
same frequency, shall not be less than 0.5 dB and not more than 3.5 dB.
Parameter Target Full Power (dBm) Tolerances (dB)
PL 0 30.0 +0.5 – 1 Vol
PL 1 28.0 ±0.3 Vol
PL 2 26.0 ±0.5 Vol
PL 3 24.0 ±0.5 Vol
PL 4 22.0 ±0.5 Vol
PL 5 20.0 ±0.5 Vol
PL 6 18.0 ±0.5 Vol
PL 7 16.0 ±0.5 Vol
PL 8 14.0 ±0.5 Vol
PL 9 12.0 ±0.5 Vol
PL 10 10.0 ±0.5 Vol
PL 11 8.0 ±0.5 Vol
PL 12 6.0 ±0.5 Vol
PL 13 4.0 ±0.5 Vol
PL 14 2.0 ±0.5 Vol
PL 15 0.0 ±1 Vol
Table 10-5.Target Power Levels for DCS
E. RSSI Calibration
- PurposeThis procedure calibrates an absolute power level on the antenna against a corresponding RSSIvalue. This value together with a pre-defined slope figure is then used to calculate the RSSI value ofan arbitrary received antenna power. The formula y=kx+m is used. (Where k is the slope value, x theRSSI value, y the actual level, and m is an offset value).
- Procedure Proposal1. Select switched receiver on a mid DCS-Channel.2. Feed a modulated -68.5 dBm signal, on the same mid DCS Channel to the antenna input.
Measure the RSSI value, calculate the RSSI table, and store it to the memory(GD_BAND_RXLEVS_DBM_BURST_M[2])-1 byte.
7.3.5 WCDMA Calibration Items
A. RF VCO Center Frequency Calibration
- PurposeThis procedure is designed to calibrate the RFVCO (Radio Frequency Voltage Controlled Oscillator)center frequency of the Ericsson RF 2110 (hereafter referred to as the RF 2100) and ensure that allchannels can be reached with sufficient margin.The objective of the calibration is to determine a CVCO (Center VCO) value that guarantees thefunctionality of the RFLO (Radio Frequency Local Oscillator).
- Procedure Proposal1. Start the VCXO and RFVCO. VCXOCONT is set to its calibrated value, Ericsson AB 2000 DAC3.2. Measure the loop voltage (WRFLOOP), with the AB 2000 ADC (GPA4), for all CVCO settings, that
is, 0-7. Find a CVCO value that fulfills the requirements on loop voltage for low and high channel. Ifthere are several CVCO values that fulfill the loop voltage requirements, then the optimum CVCOvalue is that that centers the loop voltage within the specified limits.
3. Store the calibrated CVCO value in GD_RF_SYNT_CONFIG_ID.
B. TX Carrier Suppression Calibration
- PurposeDC offset compensation the carrier, to the wanted signal at the IQ-modulator output. The leakage iscaused by imperfections in the baseband IQ-path and inside the IQ-modulator. It impairs themodulation accuracy and results in a high vector magnitude (EVM). The outcome of the calibration isvalues for RECDCI and RECDCQ that minimize the carrier.
- Procedure Proposal1. Set the ME in TX mode on mid-channel. Use typical TX settings. Generate 960 kHz squarewave on
both I and Q with amplitude = 8 (sine-wave could be used instead). Start with the best value fromearlier calibrated units on RECDCI on RECDCQ.
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2. Measure the relative power between the 1950 MHz carrier and 1949.04 MHz at the antenna output.Jump to step 6 if the requirement is met.
3. Step RECDCI from 0 to 3. Set TXON = 0 and wait 1 ms before changing RECDCI from 3 to 5. SetTXON = 1, wait 1 ms and continue with stepping from 5 to 7.
4. Set RECDCI to the value that minimizes the 1950 MHz carrier. If this involves a change of sign theTXON switching and delay sequence in point 3 must be executed. Jump to 6 if the requirement ismet.
5. Find and set RECDCQ to the value that minimizes the 1950 MHz carrier. This can be made bystepping RECDCQ from 0 to 7 with the TXON switching and delay sequence in step 3.
6. If the requirements are not met, repeat steps 3, 4 and, if necessary, 5 once with the new RECDCIand RECDCQ (found in 4 and 5) as initial values. Otherwise proceed with step 6.
7. Save the final dBc value (for statistics), RECDCI and RECDCQ. Store the calibrated parameters inGD_RF_TX_CONFIG_ID.
C. TX LPF Bandwidth Calibration
- PurposeThe low pass filters within the Ericsson DB 2100 (hereafter referred to as DB 2100) are designed toprevent spurious emissions output from the TX IQ-D/A (Digital-Analog) converters ®´ withoutadversely affecting the signal or causing a deterioration of the modulation accuracy.The objective of this calibration is to determine the values for LPQ and LPBW that offer the best tradeoff against the system-related requirements. These settings determine the cut-off frequency andshould always have the same value.- Procedure Proposal1. Use typical TX settings. Generate a 960 kHz square-wave at baseband without phase shift between
I and Q. The amplitude should be about 50% of full scale.2. Measure the relative power between 1952.88 MHz (fc + 3*960 kHz) and 1949.04 MHz (fc ®´ 960
kHz) in dB at the antenna output. Find the setting of LPQ = LPBW between 3 and 15 that obtainsthe dBc value closest to the typical value. Start with the best value from earlier calibrated units.Spectrum analyzer settings (example):RBW = 300 kHz, Span = 8 MHz.
3. Set LPQ=LPBW to the found value in 2. Also save the dBc and the decided LPQ = LPBW value forstatistics. Store the calibrated parameters in GD_RF_TX_CONFIG_ID.
D. TX Maximum Output Power Calibration
- PurposeThese procedures verify that the ME can meet the requirements on maximum output power. Thecalibration aims to establish WPABias, VGA and QVGA settings that fulfill ACLR requirements formaximum output power, both in high, medium, and low gain mode.These calibrations are designed to conform to the ME maximum output power and ACLR requirementsspecified in 3GPP Spec TS34.121.- Procedure Proposal1. Use typical TX settings, mid channel.2. Set gain to the best value based upon previous calibrated units.
3. Measure output power as broadband power.4. If the ACLR requirements, described in Table 11 are not met, calculate the test step necessary to
achieve the correct power. Use correlation from earlier calibrated units to calculate the new gainsetting (default correlation between VGA and output power is 1 dB and for QVGA 0.25dB).
5. Measure ACLR at this power level.6. If the ACLR requirement is not met, reduce VGA and QVGA.7. Measure and store the temperature at this point. This provides the value for TPmax.8. This power and gain setting is to be used in calibration of TX power table.9. Set gain to maximum power in medium gain mode and measure ACLR at this power level. RFBias
should be set to 1 and WPABias should be set to the same value as for maximum output power.10. If the requirements are not met, step the gain down and measure ACLR until the requirements are
met. The correlation between ACLR and output power is that 1 dB in power equals typical 3 dB inACLR. Use correlation from earlier calibrated units to calculate the new gain setting.
11. This power, Pmax meas MG, is input to the calibration of TX power table.12. Set gain to maximum power in low gain mode and measure ACLR at this power level. RFBias
should be set to 1 and WPABias should be set to the same value as for maximum output power.13. If the requirements are not met, step the gain down and measure ACLR until the requirements are
met. Use known correlation from earlier calibrated units to calculate the new gain setting.14. This power, Pmax meas LG, and gain setting provides input to the calibration of TX power table.
E. TX Power Table Calibration
- PurposeThe calibration data contained within the TX Power Table controls the gain for all types of powerchange; including, the inner-loop power control and maximum output power of the platform.The purpose of this calibration is to complete the TX Power gain table with values for VGA, QVGA,RFBIAS, WPABias, and WDCDCREF that meet the specified requirements for innerloop power-controland Maximum output power. The size of hysteresis area must also be found.These calibrations are designed to conform to the ME maximum output power, inner loop powercontrol, change of TFC and (PRACH preamble tolerances) requirements specified in 3GPP SpecTS34.121.- Procedure ProposalThis calibration consists of two parts: first measurements and then an off-line calculation. Themeasurement results are used for characterizing the hardware so that proper settings can becalculated for all tables. Settings and limitations are also used from maximum output calibration.1. Perform measurements(1) VGA behavior in LG (Low Gain) mode. PABias should not be offset and RFBIAS should be 1.(2) VGA behavior in MG (Medium Gain mode). PABias should not be offset and RFBIAS should be 1.(3) QVGA behavior in LG mode(4) IQ-Gain behavior in LG mode.(5) WPABias gain step size. Every eighth setting is measured twice. For better accuracy take the
average of each step pair. Interpolate the gain steps in between the averaged measured values.(6) WDCDCREF gain step size. Every fifth setting is measured twice. For better accuracy take the
average of each step pair. Interpolate the gain steps in between the averaged measured values.
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(7) Size of step between LG/MG and MG/HG and between each setting of RFBIAS (1-7). The mainpurpose is to find the relative difference at different frequencies. Distribute with equal frequencyoffset except if there are known ‚worst-case frequencies. Measured at 5 channels, maximum andminimum steps reported. Average value of minimum and maximum should be used in followingcalculations.
(8) Measure properties: Measure the following properties using a modulated signal: WPA-gainexpansion versus output power on mid channel.Compensation needed for maximum output power over the band (13 channels).
2. Perform offline calculations(1) Calculate the compensation values for Table 10-6. Store these values in
GD_RF_TXGAIN_TB_SEL_ID.(2) Extract the range of needed compensation tables (minimum and maximum).(3) Calculate the expected compensation for each table in dB (use ‚table 0 for the table that is ‚0 dB or
closest to ‚0 dB) and spread out the rest to achieve equidistant compensations.(4) Calculate and store the 24 sets of tables, GD_RF_TX_GAIN_TB0_ID to
GD_RF_TX_GAIN_TB23_ID. Each set of tables shall include:One High-gain table: 44 bytes.One Low-gain table: 44 bytes.One RFBias table: 22 bytes.One WDCDCRef table: 44 bytes.One WPABias table: 44 bytes.One value for IQ-Gain: 1 bit (will occupy 1 byte).One value for TABLE_OVERLAP: 1 byte.One value for UPPER_LIMIT: 1 byte.
(5) Calculate the actual compensation (for maximum output power) that each of these 24 tables willgive. Store this in GD_RF_TX_FREC_INT_ID.
3. Store data in GDFS
Temp.UARFCN
9612 9637 9662 9687 9712 9737 9763 9788 9813 9838 9863 9888
-15
0
15
30
45
60
75
90
Table 10-6.The Complete Gain Compensation Table
E. TX Open Loop Power Control Calibration
- PurposeThe purpose of the calibration of open loop power control is to store parameters for the Open LoopPower Control algorithm. This is a pure off-line calculation. Use data (positions and output power, indBm) from table 0. Curve fitting should be done preferably with minimum square method.System related requirements:
Open loop power controlMaximum allowed UL TX PowerUE Transmitted power
- Procedure proposal1. Create a curve fitting for the low-gain region, use positions with a power greater than -50 dBm:
Position = B3 * Pout + A32. Extract A3 and B3.3. The power level (output power) at the highest position in the low-gain region sets the parameter P2.4. Divide the high-gain region into two regions at the split between mid-gain and high-gain. The output
power at this position sets the parameter P1.5. Do a curve fitting for the mid-gain region (where RFBias > 0) of the highgain region, use power-
levels from P2: Position = B2 * Pout + A26. Extract A2 and B27. Do a curve fitting for the high-gain region (where RFBias = 0) of the highgain region: Position = B1 *
Pout + A18. Extract A1 and B19. Save A1, A2, A3, B1, B2, B3, P1 and P2 in GD_RF_TX_GAIN_PARAM_ID.
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Figure 7-2. Example of Position versus Power and Calculated Equations
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F. RX LPF Bandwidth Calibration
- PurposeThis procedure calibrates the LPF bandwidth. The bandwidth of the channel filters will affect systemparameters as reception sensitivity and adjacent channel selectivity. The procedure also verifies thatthe IF-filter is properly matched.
- Procedure Proposal1. Feed a CW carrier at 2140 MHz with a power of -60dBm into the antenna connector.2. Set UE in RX-mode on 10695ch.3. Set the AGC_UL and AGC_LL to minimum. GLNA is forced to high gain mode.4. Set RF 2110 LPQ and LPBW to 8, that is, LPQ=LPBW=8.5. Get Ak (output2) from N slots. Calculate Average_Ak (Ak_IB) according to the equation below. N
should be as large as possible, with respect to time consumption.
6. Set UE on 10705ch and get Ak (output2). Calculate Average_Ak (Ak_LB) according to the Equation 1.7. Calculate IF-filter symmetry using the following equation.
IF_SYM = Ak_IB - Ak_LB8. Set UE on 10685ch and get Ak (output2). Calculate Ak (Ak_OB) according to the Equation 1.9. Calculate selectivity level using following equation.
Ak_SE = Ak_OB - Ak_IB10. If the requirement is not met, decrease LPBW and LPQ one step and repeat from 8.11. Store the resulting LPBW and LPQ in GD_RF_RX_CONFIG_ID.
Figure 7-3. AGC Block Diagram (Parameter Ak, Output1, and Pref)
F. RX LNA Gain Switch and AGC Hysteresis Calibration
- PurposeThis procedure calibrates the gain correction parameter of Ak in the AGC algorithm between GLNA=0and GLNA=1; that is, it establishes the gain difference in the LNA between high gain mode and lowgain mode. It also calibrates AGC_UL and AGC_LL, the upper and lower Ak values where the AGCshould switch between high and low LNA gain (AGC hysteresis).
1. Set the UE in RX-mode on 10695ch.2. Feed a CW carrier at 2140 MHz with a power level of -65dBm.3. Set the AGC_UL and AGC_LL to maximum. GLNA is forced to low gain mode.4. Get average Ak from Equation 1 and save it. (Ak_LG)5. Set the AGC_UL and AGC_LL to minimum. GLNA is forced to high gain mode.6. Get average Ak. (Ak_HG)7. (Ak_LG) - (Ak_HG) = (Correction).8. Round off (Correction) to integer (AGC_CR) and store it in GDFS (GD_RF_RX_CONFIG_ID).
AGC_CR is an AGC algorithm parameter and is set to DB 2100 RFIF.9. Calculate AGC_LL=8+AGC_CR and AGC_UL=18+AGC_CR and store them in GDFS
(GD_RF_RX_CONFIG_ID). AGC_LL and AGC_UL are AGC algorithm parameters and are set toDB 2100 RFIF.
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GVGA (DEC)
RF Input Lev el (dBm/3.84 MHz)0
72
6
Ak=GVGA+(GLNA*AGC_CR)
RF Input Level (dB m/3.84 MHz)
Ak (DEC)
72+ AGC_CR
GLNA=0GLNA=1
AGC_UL
AGC_LL
AGC_ GMAX
0
AGC_ GMIN
AGC_CR
Figure 10-4. LNA Gain Switch and AGC Hysteresis Parameters
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G. RX AGC Gain Max and RX RSSI Calibration
- PurposeTo prevent wind up in AGC algorithm, this procedure calibrates the absolute power levels at theantenna connector against RSSI values and the maximum gain setting for AGC. Reference [6]specifies that the reporting range of the RSSI should be between -100 dBm to -25 dBm.The specified accuracy requirement is applied to the received power from -94 through -50 dBm. This isthe last RX calibration. LPBW, LPQ, AGC_CR, AGC_LL and AGC_UL must be calibrated according toabove calibrations respectively and applied to this calibration. Initially, the AGC anti-wind up is turnedon using AGC_GMAX=127. Use the calibrated value after step 2, otherwise the AGC wind up mayoccur at the beginning of the RSSI calibration.- Procedure Proposal1. Set the ME in RX-mode on channel 10695.2. Feed a CW carrier at 2140 MHz with a power level of -105 dBm. Get average_Ak (output2), add 6 to
the value and store it in GDFS as AGC_GMAX (GD_RF_RX_CONFIG_ID), rounded off to aninteger. Set the AGC parameter AGC_GMAX to the calibrated value.
3. Clear Ak ‚table 0.4. Change the CW carrier power level to -95 dBm.5. Read Ak value (output2) and calculate Average_Ak (Equation 1). Store Pin_Corrected (Equation 2)
at Ak=round(Average_Ak). N in Equation 1 should be as large as possible. Pin_Corrected = Pin-round(Average_Ak)+Average_Ak Equation 2
6. Then increase the output level of the signal generator to -80, -60, -40 and -25 dBm and store thecorrected RF input level and Ak to the memory respectively.
7. Use the average Ak values and Pin_Corrected from the two lowest power levels (-95 and - 80 dBm)to extrapolate Ak and Pin_Corrected for -110 dBm according to:
Average_Ak_110 = 2*Average_Ak_95 - Average_Ak_80Pin_Corrected_110 = Pin_Corrected_95 - Pin_Corrected_80
8. Store Average_Ak_110 and Pin_Corrected_110 according to step 4.9. Perform the interpolation. AK_BANK_SEL in DB 2100 shall be set to 0.10. Measure the ME temperature (T) and save for offline calculations.11. Store the result to GDFS. (GD_RF_RX_AK_TB0_ID). When stored in GDFS, the first position in
the table (Ak=0) should be replaced with the table number (0-23) in bcd format and the secondposition (Ak=1) set to 0xffff to flag that the table is calibrated. Position 2 to 5 should be set to zero.
12. Perform the offline calculations and check the requirements.
7.3.6 Baseband Calibration Item
A. Battery Voltage Calibration
- PurposeCalibrates the voltage table for the power management functionality. Some voltage measurements inthe remaining test will be done with calculated voltage levels from this test.
- Procedure Proposal1. Send the command LVBA=0 to reset local values in Test Program.2. Set voltage on VBATT to 3.20 V.3. Send the command LVBA=5,0x140 to read the low voltage level from ADC.4. Set voltage on VBATT to 4.10 V.5. Send the command LVBA=5,0x19A to read the high voltage level from ADC.6. Send the command LVBA=1 to store local values into global data.7. Send the command LVBA=3 to view and record values stored in global data.
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Voltage Level on VBATT (V) Min. Typ. Max. Unit
3.2 19 2E 3C HEX
25 42 60 DEC
4.1 64 7E 96 HEX
100 125 150 DEC
Table 10-7. Battery Voltage Calibration Limits
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7.4 Program Operation
7.4.1 XCALMON Program Overview
When you try to calibrate the U8550 mobile phone, you should make a configuration of calibrationenvironment like Figure7-1. And if you finish making configuration, please execute the XCALMONprogram. Running the XCALMON program, you should show XCALMON program window likeFigure7-5.If XCALMON program would be executed, it checks the connection of instruments and initializes themautomatically. The result of checking and initializing instruments was shown like Figure7-6.
XCALMON supports three functions.- Calibration of EGSM 900, DCS 1800, and WCDMA band- Instrument (Agilent8960, Tektronix PS2521G) control- UART communication with U8550 mobile phone
XCALMON has three windows and each window support different function.- ITP(Integrated Test Program) starting window using production loader- Calibration tree window- Command window which supports interactive ITP commands like Hyper terminal
Figure 7-5. XCALMON Window
7.4.2 XCALMON Icon Description
A. DOS Window Icon
When you click the DOS window icon, then you should see the ITP command window like DOSwindow of DOS-operating system. In ITP command window, you should communicate with U8550mobile phone which is running in ITP mode.For example, if you will enter command “VERS” and enter the return key, you should get the responseof the present running ITP version information from U8550 mobile phone.
B. Calibration Tree Window Icon
When you click the calibration window icon “C”, then you should see the calibration tree window. Thatwill be shown all calibration items. If you want to calibrate U8550 mobile phone for all calibration items,you should select “Calibration” and push “F4” button in your keyboard.
Also there are four tap view in calibration window.- OUTPUT : All results of calibration- STATUS : Summary of calibration result- INSTRUMENT : Control and view instrument connection status- UART : Control and view UART connection status
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Figure 7-6. XCALMON ITP Command Window
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Figure 7-7. XCALMON Calibration Tree Window (OUTPUT Tab)
Figure 7-8. XCALMON Calibration Tree Window (INSTRUMENT Tab)
C. ITP Starting Window Using Production Loader
When you click the ITP starting window icon”L”, then you should see the ITP starting window.That dialog window just wait for power-on of U8550 mobile phone. When it will occur power-on, itautomatically start ITP running.If you want to change the start address of ITP, you could change that address directly.To change ITP start address is possible when we download “Production loader” previously.
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Figure 7-9. XCALMON Calibration Tree Window (UART Tab)
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7.4.3 Calibration Procedure
Calibration procedure of XCALMON was the same as below procedure.- Configuration of calibration- Running ITP using production loader- Calibration start using XCALMON- Verification of calibration result
A. Configuration of Calibration
Configure to calibrated U8550 mobile phone like Figure7-1. If configuration will be accomplished, startXCALMON program.
B. Running ITP Using Production Loader
If XCALMON will be executed, you should run ITP using “L” ITP starting icon at first.Click the “L” icon, then you will see the ITP start window like Figure7-10.When you will turn on the U8550 mobile phone, the production loader will be downloadedautomatically like Figure7-11 and then it will execute the ITP at once.If the ITP will operate normally, you should see the characters “TP, OK” in ITP command window likeFigure7-12.
Figure 7-10. XCALMON ITP Starting Window (Using Production Loader)
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Figure 7-11. Production Loader Downloading
Figure 7-12. ITP Start Complete Window
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C. Calibration Start Using XCALMON
If you want to calibrate U8550 mobile phone, click the calibration icon “C”.And then you will see the calibration tree window like Figure7-6.To start calibration, you should select “Calibration” item and push “F4” button in your keyboard.
D. Verification of calibration result
If the calibration will be ended, you will see several message window and the result of calibrationthrough OUTPUT & STATUS tab view.The detail explanation of those will be described in chapter 7.4.4
7.4.4 Calibration Result Message
If the calibration is over without error, “PASS” message window will show up like Figure7-13.On the contrary, if the calibration is over with some error, “FAIL” message window will show up likeFigure7-14. Additionally, in all of the cases, it is possible to check the calibration result with OUTPUT &STATUS tab view.
Figure 7-13. Calibration PASS Message Window
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Figure 7-14. Calibration FAIL Message Window
Figure 7-15. Calibration Result from OUTPUT Tab View
7. CALIBRATION
- 227 -
Figure 7-16. Calibration Result from STATUS Tab View
- 228 -
229
2
4
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Date Changed:
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Engineer:
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Date Changed: Drawing Number:
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U8550-spfy0106301-1.1
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Drawn by: Mobile Handsets R&D Center
A
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R&D CHK:
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2
2012
R&D CHK:
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MFG ENGR CHK:
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DOC CTRL CHK:
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TITLE:
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12
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ANT SW to ANT
8
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Size:
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Engineer:
Time Changed: REV:2004, May 16 1
12 1 8 A
A2
JS Joo
JS Joo
5:01:55 pmSG Kang
G3
G4
G5
G6
RXTX
ANTPAD101
FL102 DFYY61G95LBNBC-TT1
AN
T
G1
G2
C11710u
KMS-507W101
ANTG1
G2RF
C1130.1u
C1100.01u
R2250
0
L199100nH
C111
C10610p
22p
10u
R104
0
C114
C10710p
C11610u
L104
L105
33p
C103
C1080.01u
BYPASS5
GND14
7G
ND
2
6VEN
2VIN
VOUT1
VOUT_SE3
LP3981ILD-2.8N101
C10510p
1.8nH
VBATI
0.01u
L101
C109 C10410p
0
R106
0
R102
L103
0
R105
10u
R2251
0
C115
1.2p
0
C101
R101
8.2nHL102
AN
T7
6G
ND
1G
ND
21114
GN
D3
GN
D4
1516G
ND
5
12GSM18001900_TX
2GSM1800_RXGSM1900_RX
3
GSM900_RX1
GSM900_TX13
VC198
VC2VCG
5
10VDD
4WCDMA
FL101LMSP43MA-288
C1120.033u
0.01u
R103
0
C102
GSM_TX
VDD_A
VDD_B
EXTLDO
VDD_A
WCDMA_RX
ANTSW2
ANTSW1
ANTSW0
ANTSW3
GSM_RX
PCS_RX
DCS_RX
DCS_TX
V_wivi_B
V_wivi_A
WCDMA_TX
VDD_B
8. CIRCUIT DIAGRAM
230
7 11
Mobilehandsets R&D Center
B
U8550-spfy0106301-1.1
6
FROM MARITA SIDE FOR POWER SAVING
C
5
2 9
H
D
9
D
12
DOC CTRL CHK:
HW Group, Development Lab 6
TITLE:
G
Drawing Number:
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12
Changed by:
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MFG ENGR CHK:
A
Page:
E
1
F
Time Changed:
2
53
10
B
4
H
G
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Engineer:
Page 2 of 7(RF Part 2 of 4)
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1
Drawn by:
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JS Joo
JS Joo
2
A2
12 1 8 A
R&D CHK: Size:
4
Date Changed:
3
UMTS RX (WOPY)
REV:
8
LG ELECTRONICS INC.
E
11
2004, May 16QA CHK:
C
8
A
1608
3.3pC210
NA
C205
C201C22627p
0.01u
R208
100
C23622p
R207
0
0.01uC237
L20282nH
R205
0
C240 22p
C216
L207
390p
0.01u
100nH
C238
47p
C204
C231
2200p
5600p
R214
NA
C217
C211
22p
22pC208
56p
C233
C213NA
C2222200p
NA
C2230.01u
R21
3
82pC221
C220
0.01u
1.2p
V201
C227
XOOAD8
XOOB
XO
OO
NH
3
BBY58-02W
K3
RX
ON
H4
F3STROBE
VCCBUSE10
VC
CIF
A3
VC
CL
FA
6
C1VCCMIX
VC
CP
HD
K5
K4
VC
CP
LL
VCCREFB10
VCCRFK1
K9
VC
CR
FL
O
K8
VC
CV
CO
K7
VT
UN
E
XOIAC10
XOIBD10
C8
G10
IFO
UT
A1
B1IFOUTB
IND
BY
PK
2
IRA
A9
A10
IRB
C7
MC
LK
D1MIXINA
E1MIXINB
PH
DO
UT
K6
QR
AA
7
QR
BA
8
G8REFON
H1RFIN
RFLOOAJ10
RF
LO
OB
K10
RF
OU
T
GNDBIAS
F8GNDBUS
GNDBYPJ1
G1GNDEME
GNDIFC3
C6
GN
DL
F
GN
DM
IXA
2
H6
GN
DP
HD
GN
DP
LL
H5
E8GNDREF
GNDRFLOH10
H7
GN
DT
UN
E
H8GNDVCO
IFIN
AA
4
IFIN
BA
5
IFLOAF10
IFLOB
CD
IC
5C
4C
DQ
E3CLK
D3DATA
G3GLNA
F1
5.6nH
L203
LZT-108-5323N201
3.3KR202
TP202
NAR218
3
C2140.1u
13MHz
B201TSX-8A
2 GND1
GND24
1HOT1
HOT2
C235
2.7pC234
22p
22pC207
R21
1
NA
4.7pC232
0
L205NA
R210
R215
10
TP201
R21710K
C2093.3p
L20182nH
C21522p
R216
10K
2.2nH
27p
L204
C203
2200pC218
R221
10
NAL206
75R203
R2065.6K
C229
0.01u
10
R220
R209
0
R212
1K
1uHL208
C2240.01u
0
R201
C230
330p
0.01u
C228
22pC225
22pC239
R20475
TP203
5
0.01uC219
TMXU753Z201
GND2
1IN+
6IN-
4OUT+
3OUT-
SHIELD
0.01uC202
22pC206
C212
VCXOCONT
22p
XOOA
IFLOBAR
IFLO
WRFLOOP
RFLO
RFLOBAR
VDD_B
MCLK
CLKREQ
RXQA
RXQB
RXIA
RXIB
WSTR
WDAT
GPRFCTRL
VDD_B
WCLK
XOOB
WCDMA_RX
VDD_B
8. CIRCUIT DIAGRAM
231
Drawing Number:
D
G
E
2012
Date Changed:
9
HW Group, Development Lab 6
3838
Page 3 of 7(RF Part 3 of 4)
BLM15BB750SN1J
LG ELECTRONICS INC.
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MFG ENGR CHK:
2
10
H
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U8550-spfy0106301-1.1
63
QA CHK: REV:
1 10
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Mobile Handsets R&D Center
11
Size:
7
A
TITLE:
Time Changed:
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D
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5 84
7
A
H
2012
DOC CTRL CHK:
2012
5
UMTS TX (WIVI) to ISOLATOR
6
JS Joo
JS Joo
5:04:02 pmSG Kang 2004, May 16 3
12 1 8 A
A2
11 12
Engineer:
3
F
8
G
B
4
Page:Changed by:
R312
0
4.7p
C319
22p
TP305
C330
C31722p
C3080.01u
R309
10
33KR301
C335
22p
22p
C316
R32010
10pC324
R313
0
0
R319
47pC328
C3220.01u
SYNC
_SHDNC1
A1_SKIP
R314
680
C2BATT
COMPA2
B4GND
C3LX
A3OUT
PGNDC4
A4REF
B1
TP302
N301MAX1820ZEBC
B301
LM20BIM7X-NOPB
GND12
5GND2 NC
1
4V+ VO
3
R308
0
C306
TP303
1000p
0R310
ESI-3EAR1.950G01-T
GN
D1
GN
D2
GN
D3
GN
D4
GN
D5
INO
UT
N303
C32610p
22pC312
C3140.01u
R305NA
L311
15nH
NAR304
TP304
VBATI
100KR302
100pC318
C30410u
0.1uC310
150pC334
R317
L302
0
L30810nH
C30222p
0.01uC332
C3130.01u
G10
VC
CR
FV
CO
H10
VT
UN
EIF
B10
VTUNERFJ10
C7WON
B1
XO
OB
XO
OC
C1
39K
R303
F10
A2QIN
A1QINBAR
H1
RF
LO
I1R
FL
OB
AR
G8
ST
RO
BE
TX
ON
E8
VCCBBA5
D1
VC
CB
US
J7VCCIF
G1
VC
CIF
LO
VCCIFPHDA6
VCCIFPLLA8
A10VCCIFVCO
J1V
CC
RF
VC
CR
FP
HD
E10
VC
CR
FP
LL
F8
C8
GN
DR
FV
CO
1
GN
DR
FV
CO
2H
8
GN
DT
UIF
C10I1
0G
ND
TU
NE
RF
J8IFBP
J9IFBPBAR
E1
IFL
OIF
LO
BA
RF
1
INA4
INBARA3
MIXOUTJ5
MIXOUTBARJ6
J2OUTOUTBAR
J3
PHDIFOUTA7
PH
DR
FO
UT
E3
GN
DB
BC
3
GN
DB
US
D3
H7GNDIF
GN
DIF
LO
F3
GNDIFPHDC5C6
GNDIFPLL
GNDIFVCO1A9
D10
GN
DIF
VC
O2
J4GNDRF
H4GNDRF1GNDRF2
H5
GNDRF3H6
G3
GN
DR
FL
O1
GNDRFLO2H3
D8
GN
DR
FP
HD
GN
DR
FP
LL
LZT-108-5322
N304
C4CLK
DA
TA
4.7K
R318
C320
G1
1
G2
3
G3
5
I14
I26
O2
33p
FL301SAFEH1G95FL0F00R05
100pC333
C3370.01u
0
R307
TP301
10uC303
L3075.6nH
VBATI
L301
5.6nHL309
R31
6
0
3300pC336
10pC323
10uC305
0.01uC325C315
C311
10p
10p
680
R315
C33122p
C321
33p
4.7uH
L304
L306
NA
C329NA
R306
0
75L305
L303
R3110
C30733p
C301330p
C3274p
C30922p
13GND6
GND714
17GND8
GN
D9
20 21R
FIN
RF
OU
T10
VCC1118
19VCC12
15VCC21
16VCC22 VCC_BIAS1
4
5VCC_BIAS2
7VCC_DET
VCTRL11
VCTRL22
8VDETECT
N302
RF9266
3GND1
22G
ND
10G
ND
1123
GND26
9G
ND
3
GN
D4
11
12GND5
TP306
15nH
L310
WPOWERSENSE
WCDMA_TX
VCCWPA
V_wivi_B
WPAREF
V_wivi_A RTEMP
WDCDCREF
V_wivi_A
V_wivi_A
VCCWPA
RFLO
RFLOBAR
V_wivi_A
V_wivi_B
IFLOBAR
IFLO
V_wivi_B
WCLK
WDAT
TXIATXIBTXQATXQB
WSTR
XOOBXOOA
8. CIRCUIT DIAGRAM
232
H
Drawn by:
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1608
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2012
F
HW Group, Development Lab 6
C
QA CHK:
A
R&D CHK:
C
MFG ENGR CHK:
D
Drawing Number:
4 5
5
H
91 10
98
LG ELECTRONICS INC.
DOC CTRL CHK:
Time Changed:
8
11
REV:
BLM15AB601SN1J
11
2012
43
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TITLE:
Mobile Handsets R&D Center
E
JS Joo 7:25:06 pm
JS Joo
JS Joo
2004, May 16 4
A2
12 1 8 A
6
BLM15BB750SN1J
GSM/DCS (INGELA)
7
D
E
Size:
12
F
Date Changed:
2.7p
C436
11G
ND
4G
ND
51416
GN
D6
17G
ND
7
19P
GN
D
13RSVD
TX_ENABLE1
VA
PC
2 6V
CC
1
VC
C2
12
VS
UP
PL
Y18
SKY77321N401 5
BS
3DCS_PCS_IN
15DCS_PCS_OUT EGSM_IN
4
EGSM_OUT10
7G
ND
1
8G
ND
2
9G
ND
3
270R415
R412
33p
C429
R410
100
L411
R421
0
6.8n
H
R42
2
TP408
C4170.068uR414
18
C418
10p
0.068u
C438
NAC446
C450
R408
0
22p
L403
2.2p
C432
C434
10p
18nH
R427
390
L415
33pC406
R4060
C453
33p
33p
C410
L402
75
R425
560
C408
TP405
C412
100p
33p
100
R423
L4074.7nH
R416270
R4023K
12pC428
C409NA
1000p
C441
2.2p
C424
C430
0.01u
100
R424
R4280
0.068u
C4520.01u
C415
C426
C411
22p
2.2nH
22pC425
3B1
4B2
2G
ND
15
GN
D2
NC
6
1UB
R405100K
LDB21897M15CN404
G13 4
G2
1IN
2OUT
FL401 NFM21PC105B1A3
4.7nHL409
R429
TP402
O2
0
SAFEC1G84FA0F00FL402
2G1
5
G2
1IN
3O1
4
0
R418
R431
0
10u
R4170
C420
0.068uC413
C405100p
C439
0.05
0.01u
R407
L401
C45122p
0.068uC416
2.7p
TP406
C435
L416
R411
100
TX
OL
A
F1
TX
OL
B
D3
TX
ON
H1
VC
CB
UF
K7VCCPLL VCCRF
A6
VC
CV
CO
G10
VT
UN
EH
10
K8XOOB
K9XOOC
H7XOOLA
PC
TL
PH
DO
UT
J10
PSH5
QRAA8
QRBA7
C4REON
C1
RF
HA
D1
RF
HB
RFHCA2
RFHDA1
RFLAA5
RFLBA4
E3
RX
ON
C7STROBE
TX
OH
AK
1T
XO
HB
J1 G1
GN
DV
CO
3E
8G
ND
VC
O4
F8
GN
DV
CO
5
GN
DV
CO
6F
10
A10IRAIRB
A9
MODAK3K4
MODBMODC
K5
MODDK6
NC
1C
10
NC
2D
10
NC3H4
H8
NC
4
NC5K2
NC6K10
G3
F3
BS
EL
CLKC5C6
DATA
GNDBUFH3
GN
DP
LA
NE
C3
H6GNDPLL
GNDRFA3
B1
GN
DR
F1
E1
GN
DR
F2
GN
DS
ILE
NT
E10G
8G
ND
VA
R
GN
DV
CO
1B
10C8
GN
DV
CO
2D
8
LZT-108-5325N405
NAC407
1KR401
C4190.01u
TP403
75L404
VSS3E8
VSS4VSS5
F4
VSS6F7G3
VSS7G4
VSS8VSS9
H8
VDIG
L4086.8nH
G7
D5QDAT
A6QRA
A5QRB
RESETON_RESETBD2
E3REXT
B4RXSTR
G8SYSCLK2_MCLK
A2VDD1
B5VDD2
B7VDD3
F5VDD4VDD5
F8
VDD6H6
A1VSS1VSS2
B1C4
GPA6D7
GPA7
GPCLKE5
GPDATE6
I2CCLKD1
I2CDATD3
A4IDAT
IRAA8
IRBA7
MICING1
MICIPF3
G2NC1
H1NC2
F6PCMCLK
H7PCMDL
G6PCMSYN
PCMUL
DAC03
C2DACCLKDACDAT
C1
DACSTRD4
C5DCLK
DEC1E2
DEC2H2H3
DEC3DEC4
B2E1
DEC5
GPA0B8
GPA1B6C6
GPA2C7
GPA3GPA4
C8D6
GPA5D8
N402 LZN-901-0536-R1A
ADSTRE7
AUXI1E4
H4AUXO2
F1AVDD
BEARNH5G5
BEARP
CCOF2
DAC01C3B3
DAC02A3
6.8n
H
R42
0
1IN
3O1
4
O2
SAFEC1G96FA0F00FL403
2G1
5
G2
C444
1800p
15nHL410
330pC448
10uC422
150p
C401
C454
33p
22pC423
C44022p
22p
C427
0
R430
1200pC445
L40522nH
NAR419
C433
22p
TP401
0
R413
TP407
R426
120
B13
B24
GN
D1
2
GN
D2
5 6N
C
UB1
L413
100uH
N403LDB211G8020C
R409
0
1000p
33nH
C442
L406
L414
0
R404
33p
C431
C447560p
C421NA
1.5nH
C443
VBATI
C437
O1
4
O2
0.01u
Z401SAFEC942MFL0F00
2G1
5
G2
1IN
3
22pC404
TP404
C403
5.6uH
22p
L412
100pC402
C4490.01u
0
R403
0.01uC414
PASENSE+
PASENSE-
PCS_RX
GSM_TX
VDIG_HERTA
PULSESKIPGPRFCTRL
PCTL
RXON
DCS_RX
VDD_A
SYSCLK2 IDATA
I2CDATI2CCLK
DCLK
VDIG
VDIG_HERTA
RXON
RESOUT3n
QDATA
DCS_TX
PAREG
IOUT
BSEL0
MODB
MODC
MODD
VDD_A
XOOA
XOOB
VDD_AVLOOP
VDD_A
RADCLK
RADDAT
RADSTR
TXON
GSM_RX
MODA
8 CIRCUIT DIAGRAM
233
B
7
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H
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D
HOOK
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TITLE:R&D CHK:
10
31 2
LG ELECTRONICS INC.
1608
2012
A
Drawing Number:
8
Changed by:
9
DOC CTRL CHK:
F
6
Date Changed:
2826
REV:
7
Drawn by:HW Group, Development Lab 6.
C
H
NA
11
12
3
QA CHK:
8
F
Engineer:
Page:
NA
5
C
Mobile Handsets R&D Center
D
Time Changed:
10
E
Vincenne, Regulators
G
2
5
9
GUIDE HOLE
11
6
MFG ENGR CHK:
G
B
A
Jeongseok Lee
Jeongseok Lee
7:25:29 pm2004, May 16J.S. Lee 5
U8550-spfy0106301-1.112 1 8 A
A2
4
C552 470p
C522
1608
TP502
1u
68pC529
R596 120K
C567
C59
60.
1u
0.068u
VRTC
C564
0R
2131
10u
10KR515
33nC528
C512
R555
1608 1u
R574 620
0
C538
0.1u
1uC574
0.068u
C518
1608
C507
47p
0.22R593
47pC537
R505 0
D2
3
D3
4 5D
4
D5
6
2G
ND
1%
R5658.2K
D70
2
SM
F05
C-T
CT
1D
1
201210u
C590
VBATI
RB521S-30
V502
R2256
NA
100K
R538
0R536
R2138100K
R878
100K
R2254
NA
C582
4700p1KR525
R589
100K
C509100p
10K
R514
0.1u
C5021u
C544
D50
1
RB
521S
-30
1608
VCAM_2.8V VCAM_1.8V
0R561
C549
0.1u
R594
4.7K
GN
D4
C2
C3
GN
D5
GN
D6
D2
D3
GN
D7
C1IN+
D1IN-
NCB1
B4VDD1VDD2
C4
VO+D4
A4VO-
_SDA1
TPA2005D1ZQYRU504
A2
GN
D1
GN
D2
A3
B3
GN
D3
100
R520
FB501
VBATI
0R569
0
0R
2126
R2197
R508
0
VDIG
VCORE
R21
300
OJ500
0R566
22p
C521
R539
0
R502
0
C513
16081u
16081uC533
C525
R503 0
68p
C56
1
VRTC
VBAT_C
0.1u
BA
501
R577 0
R507
100K
R549
100K
0
R530
0.05
R87
5
R572 620
R590
8.2K
NA
R2255
FB504
1.5V Regulator for Marita PLL
AAT3218IGV-1.5-T1
4BYPASS
3EN
GND2
1IN
5OUT
VBATI
N502
R567
100K
R2252
10K
R2253
10K
R527 0
PT50147K1%
0.47u
VBATI
1608
C523
0R517
0R2236
X503
U8360-MIC
12
NTJD4105CT1G
6D1
3 D2
G12 5G2
1 S1
S2 4
Q502
2012
C554
R2150 0.51
1u
R509 1K
0R570
R573 0
VDIG
OJ503
1608
VMEM
VBT
R571
NA
1uC573
100K
R557
VDD_A
C594
R513
51K
NA
C54
0N
A
KDS160E
FB503
D703
0.05
R84
7
0.1u
C53
4
22p
C54
1
C532 1u
10K
R595
4.7K
R598
0R522
1608
C5274.7u
33nR583
N702
BYPASS4
EN3
2GND
IN1
OUT5
R580 33n
AAT3218IGV-1.5-T1
1.5V Regulator for Wanda PLL
C5110.01u
0.1uC591
R2196
220
0
R2171
R217975
0
R540
7NFSPL
NFSPR5
PS
102
RIN
4R
OU
T
STBY13
SW
112 11
SW
2
14V+
16VREF
VBATI
U50
7N
JM27
05P
C1
GND15
LIN
1
9L
MO
NL
OU
T3
8NFHPL
6NFHPR
R21
910
22p
C54
3
R545 0
1%180K
R2135
R553
0
R554 0
FB502
VBATI
0.1u
C55
120
12
C597
VEXT15_M
10u
VBAT
R22
40 NA
R60
00
TP
504
22KR559
NA
0.068u
C586
C568
0R526
R550
100K
22p
R582 0
C514
2700pC578
100K
R547
0R
551
100K
R843
C557
22p
R584 0
47pC581
N501
LP2985IM5X-3.3
3.3V USB Regulator
4BYPASS
2GND
3ON_OFF
VIN1 5
VOUT
1K
R535
VDD_B
15K
R542
33nC524
R2134 NA
0
R2238
0R558
R529
100K
3300pC579
BLM15BB750SN1J
L502
C1916
R534
18K A4
A1_SD
0.01u
GN
D1
A2
A3
GN
D2
GN
D3
B3
C2
GN
D4
GN
D5
C3
D2
GN
D6
D3
GN
D7
IN+C1
IN-D1
B1NC
B4VDD1
C4VDD2
D4VO+
VO-
56789
U505 TPA2005D1ZQYR
1
101112
13
14
15
16
17
18
234
CN502
C-1827541
1
2
0R
563
CN501
1uC54
5
1u1608
C54
6
C553
10u
2012
C5171u
C539
0.1u
1uC
547
0R579
R2239 10K
10u
100K
R21
27 C55
020
12
R541 0
NAC583
L503 22uH
100K
R552
16080R564
100K
R528
R2177
NA
VBATI
470pC598
0R
587
R518 0
100KR586
VDIG
C584
100K
R2192
2527100u
R523
1K
18K
R531
C580
C520
47p
1u
1000p
C556
VBATI
R519 0
R2132
100K
0R511
C526
33n
0.47uC503
1608
U501
R1114N281D-TR-F
CE3
GND2
NC4
1VDD
5VOUT
47p
VGA_2.8V Camera Analog Power
C558
0R2194
R581 0
NA
C565
VCAM_VGA_2.8V
C59910p
VDIG
R556 0
R501
0
10K
R54
6
VDIG
VBATI
C5191u
C56
21u
0
R2237
1608
C1918
1u
1uC
536
C585 100u2527
VDIG
R516
100
4700p
75R2186
VBATI
C589
C5922527
2.2u1608
100u
C504
R22050
10u
VBATI
3300p
2012
C588
C587
10pC548
100K
R562
C60
010
u
C515
2012
R512
0
47p
2012
R22
25
0.22
VDIG
VBAT_C
VUSB
OJ501
RB521S-30
120KR597
V503
C560
0 R544
33n
B4
V+
0
R588
U508
C3COM1
A3COM2
B1
GN
D
C2IN1
A2IN2
C1NC1
A1NC2
C4NO1
NO2A4
U8360-MIC
X50112
NLAS4684FCT1
R1114N281D-TR-F
U503
3CE
2GND
4NC
VDD1
VOUT5
GND2
11GND3
12GND4
1P1P2
2
P33
P44
5P5
6P6P7
7
P88
MEGA_2.8V Camera Analog Power
KPD9D-8S-2.54SF
X502
9GND1
10
NA
C569
1uC501
1608
VEXT15_M
0R599
C530 NA
TP501
0
R578
C516
0.068u
C563
201210u
0
R576
1uC
542
C559
C575
1u
47p
16082.2uC576
1u1608
OJ504
C1917
C1931C1930
10p10p
C57168p
BLM15BB750SN1JL501
4
1VDD
5VOUT
22K
R521
BT and T-Flash Regulator-2.85V
R1131N281D5-TR-F
U510
CE3
GND2
NC
2
0R585
DALC208SC6V501
IO11
3IO2
4IO3
IO46
REF15
REF2
C572
1608
VDIG
1u
4.7
0
R506
R548
0
R533
NA
C1915
R575
4.7u1608
C18994.7u
1608
22p
C566
1KR524
10p10pC1932
VTF
C1933
R899
0.1
R592 120K
VCORE
U506
R1112N241B-TR-F
CE3
GND2
4NC
1VDD
5VOUT
SPK_MIC_BIAS
C593 100u2527
0R
560
BGND9
BYPASS2
GND3
VDD7
1VIN1
5VIN2
VOUT18
VOUT26
4_SHDN
LM4809LDU509
18K
R537
R21
2910
0K
VSSTH3
F4VSSTH30
E4VSSTH31
E5VSSTH4VSSTH5
E6E7
VSSTH6E8
VSSTH7VSSTH8
F8G8
VSSTH9
H10VSS_AVSS_B
G3C6
VSS_CE3
VSS_D
XTAL1M1
XTAL2M2
VSSTH15D5
VSSTH16
VSSTH17D6D7
VSSTH18
D8VSSTH19
VSSTH2G7
VSSTH20E9F9
VSSTH21
G9VSSTH22VSSTH23
H9J8
VSSTH24
J7VSSTH25VSSTH26
J6VSSTH27
J5H4
VSSTH28VSSTH29
G4
G6
M11
VDD_EL12
C3VDD_IO
B3VIBR
VREFJ12
K8VSSADC
VSSBEARK4
VSSBUCKB1
K5VSSCODEC
E10VSSPA
F7VSSTH1
H8VSSTH10
H7VSSTH11VSSTH12
H6H5
VSSTH13VSSTH14
G5F5
TEST
TXONA8
VBAT_AA12
M12VBAT_B
VBAT_CA3
VBAT_DE1
VBUCKB2
VDDADCM9
M3VDDBEAR
VDDBUCKA2
VDDBUFC12
M5VDDCODEC
L2VDDLP
VDDPA_DACG12
VDD_AB12
A11VDD_B
VDD_D
PCMSYN
B8PWRRST
A9RESETB
B9SCL
J3SCLK
SDAC8
SDATH1
G1SIMCLK
H3SIMDAT
C2SIMOFF
SIMRSTG2
F1SIMVCC
C10SLEEP
SRSTH2
SUBD10
A1SWBUCK
D4
MIC1N
MIC1PM8
MIC2NL7M7
MIC2P
B4MOD1
NBUCKA5
C4ONSWAONSWB
C5
ONSWCA7
PAREGD11
E12PASENSE+PASENSE-
E11
A4PBUCK
J1PCMCLK
PCMIJ2
PCMOK2
K1
GPA1
J9GPA12GPA13
D9
GPA2K10
GPA3L11
GPA4K11
K12GPA5
GPA6J11
GPA7J10
B7INTLCKB
D12IOUT
H12IREF
C1IRQ
A6LED1
LED2B6
K9MCLK
L8
DACCLK
DACDATC9
DACO1B5G11
DACO2H11
DACO3
DACSTRB10
E2DCIO
L5DEC0DEC1
K6
DEC2K7
G10EXPOUT
EXTLDOC11
FF_INF10
FGSENSE+F11
F12FGSENSE-
GPA0M10L10
32KHZ
ADSTRC7
AUXI1M6
L6AUXI2
AUXO1L4
J4AUXO2
BDATAB11
L3BEARN
BEARPM4
L9CCO
CDCDAF3
F2CDCDB
CHREGD1
CHSENSE+D3D2
CHSENSE-
CLK_REQK3
A10
N503
TWL93004CZQWR_VINCENNE
L1
120KR591
1608
C508
R1114N181D-TR-F
U502
CE32
GNDNC
4
1VDD VOUT
5
4.7u2.2u
1.8V Camera power1608
C510
1uC
531
1608
C555
R532
18K
10p
47R543
68pC570
VEXT15_W
OJ505
TP
505
VDIG
TP503
10u
2012
C59
5
D1
D2
D3
D4
D5
D6
D7
G
S1
S2
S3
Q501
SI7411DN-T1-E3
68R
2249
VBATI
R22
4868
0R510
0.068u
C535
FB505
R504
100K
1uC577
C1CCO
GND1B1B2
GND2GND3
B3
GND4C3C4
GND5GND6
C5
MICNA1
D1MICN_INT
MICPA2
MICP_INTD2
B5VDD
N504
A5AFMS_L
AFMS_L_INTD5
AFMS_RB4
D4AFMS_R_INT
A3ATMS
C2ATMS_AD
ATMS_CAPA4
ATMS_INTD3
JACK_DET
MOTOR_BATT
IP4025CX20-LF
TJATTE2
MIC2P
VBACKUP
CAM28_VGA_EN
MOTOR_BATT
SPK_RIGHT_P
SPK_RIGHT_M
AUDIO_AMP_EN
SPK_LEFT_M
SPK_LEFT_P
HS_AMP_EN
AUDIO_AMP_EN
MIC2N
DCIN_3
VCXOCONTWPAREFWDCDCREF
MIC2N
VBACKUP
MOTOR_BATT
WRFLOOPWPOWERSENSE
VLOOPRTEMP
CLKREQI2CCLKI2CDAT
PWRREQn
MCLK
SIMRST0SIMCLK0SIMDAT0
RTCCLK
ONSWCONSWBnONSWAn
TXON
PWRRSTn
IRQ0n
EXTLDO
IND_SINK
JACK_DET
MIC2P
DCIN_2
ADCSTR
EARM
EARP
PCMSYNPCMCLK
PCMDATBPCMDATA
IOUTPAREG
PASENSE-PASENSE+
DACCLKDACSTRDACDAT
USBSENSE
VBUS
PWRRSTn
HS_SPK_SEL
3D_CTRL13D_CTRL2
3D_OFF
CAM18_ENCAM28_EN
RESOUT0n
BTF_REG_EN
8. CIRCUIT DIAGRAM
234
G
B
H
2
U8550-spfy0106301-1.1
C
RF I/F
E
H
11
F
G
R&D CHK:
9
C
41 8
8
1
G
DOC CTRL CHK:
Changed by:
A
6
2
9
8
Drawing Number:
93
TITLE:
4
F
11
Must change to LCD_VSYNC_OUT
CAMERA I/F
5
F
10
HW Group, Development Lab 6.
C
5
Page:
A
11
For the Bluetooth
11
A
12
B
7
7
Page 6 of 7(Baseband Part 2 of 3)
Size:
Drawn by:
HSSL
QA CHK:
D
3
Engineer: LG ELECTRONICS INC.H
USB
MFG ENGR CHK:
6
122
12
Date Changed:
LCD I/F
JTAG I/F
F
32.768KHzC2100 and C2101 close to B2100
B
E
4 6
E
1
H
D
10
3
127
D
4
G
9
A
Tuesday, September 04, 2003mentor 6
12 1 8 A
A2
3 6
85
D
2
C
B
UART3
MARITA, MEMORY, BLUETOOTH
51 7
10
REV:Time Changed:
10
E
Mobile Handsets R&D Center
C647
Jeongseok Lee
Jeongseok Lee
9:42:54 am
2
31
22p
PMST3904Q601
0.1u
C63
1
R62
110
0K
120KR652120K
NA
R612
C606
C60
9
330p
0.1u
100K
R613
C63
50.
1u
0.1u
R602
100K
C62
4
C61
80.
1u
0R
629
0.1u
C63
7
VU
SB
NA
R2243
C62
00.
1u
3.3K
R608
R63
110
0
100pC642
VC
OR
E
VC
OR
E
1K
R626
100K
R618
TP601
VMEM
VM
EM
VDIG
NO
1C
4
NO
2A
4
V+B4
22KR650
CO
M1
C3
CO
M2
A3
GNDB1
IN1
C2
IN2
A2
NC
1C
1
NC
2A
1
C641
DG3516DB-T5-E1
U601
C61
20.
1u
0.1u
C62
70.
1u
0.1uC646
VDIG
0.1u
C63
4
C62
80.
1u
VBT
0.1u
VTF
C60
2
100pC643
0.1u
C62
3
VDIG
0.1uC616
R616 47
R649 NA
0.1u
C62
6
RTC_GND
100K
R61
9
R634
120K
0.1u
22p
C62
9
C607
C6170.1u
ANT601
FEED
NC1
NC2
VDIG
0.1u
C63
2
VT
F
R651 0
VTF
0R
627
0.1u
C62
2
0
V18
Y21
VS
SE
207
VS
SE
208
F18
A21
VS
SE
209
D16
VS
SE
210
VS
SE
211
L18
K18
VS
SM
C
VS
SR
TC
R11J1
8V
SS
US
B
C8WE_N
R60
4
VS
SE
00V
SS
E01
M7
VS
SE
02W
9
VS
SE
100
E4
VS
SE
102
D15
D13
VS
SE
104
VS
SE
106
G10
VS
SE
108
G9
H8
VS
SE
110
A2
VS
SE
112
VS
SE
200
G4
VS
SE
201
R4
U4
VS
SE
202
VS
SE
203
R9
V8
VS
SE
204
Y16
VS
SE
205
VS
SE
206
U1
VD
DE
202
AA
1A
A3
VD
DE
203
VD
DE
204
Y6
VD
DE
205
Y18
V20
VD
DE
206
N21
VD
DE
207
VD
DE
208
B21
A19
VD
DE
209
VD
DM
CK
20
VD
DR
TC
AA
11V
DD
US
BJ2
1
VS
SA
0V
12W
13V
SS
A1
V14
VS
SA
2
VS
SD
ME
3
L4
K2
VD
DC
16A
9B
6V
DD
C17
R20
VD
DC
18
E1
VD
DD
M
VD
DE
00M
2
VD
DE
01N
2Y
10V
DD
E02
VD
DE
101
C2
VD
DE
102
B16
A13
VD
DE
104
VD
DE
106
A11
B8
VD
DE
108
A5
VD
DE
110
VD
DE
112
A3
H2
VD
DE
200
VD
DE
201
R14
VD
DC
00A
A19
N1
VD
DC
01V
DD
C02
R12
VD
DC
03Y
14
VD
DC
04M
20
VD
DC
05D
20
VD
DC
06B
12R
1V
DD
C07
Y1
VD
DC
08V
DD
C09
AA
7
VD
DC
10H
20A
15V
DD
C11
VD
DC
12L
21A
17V
DD
C13
B1
VD
DC
14V
DD
C15
Y9
AA
9T
DO
P11
TE
MU
0_N
TE
MU
1_N
V10
TM
SR
10 V9
TR
ST
_N
Y13
TS
XM
TS
XP
W14
V13
TS
YM
TS
YP
R13
TX
ON
G3
J20USBDM
J15USBDP
USBPUENH19
Y12
VD
DA
0A
A13
VD
DA
1V
DD
A2
P12
RT
CIN
V11
Y8
RT
CK
W11
RT
CO
UT
G2
RX
ON
L3SERVICE_N
N20
SIM
CL
K0
SIM
CL
K1
M18
N18
SIM
DA
T0
M19
SIM
DA
T1
N19
SIM
RS
T0_
N
SIM
RS
T1_
NL
15
SYSCLK0R3T2
SYSCLK1SYSCLK2
T3
W8
TC
K
TD
I
G14B20
PDID7
PDIRES_ND19
T4PWRREQ_N
L7
QD
AT
A
F4RESOUT0_NRESOUT1_N
L1P8
RESOUT2_NRESOUT3_N
U2U3
RESOUT4_N
R2RESPOW_N
K8
RF
CL
K
G1
RF
DA
TR
FS
TR
H4
W10
RT
CB
DIS
_N
W12
RT
CC
LK
RT
CD
CO
N
PC
MC
LK
W2
PC
MD
AT
AV
4P
CM
DA
TB
PC
MS
YN
W1
PC
TL
L8
PDIC0C19D18
PDIC1PDIC2
C20C21
PDIC3PDIC4
E18
PDID0B18D17
PDID1C18
PDID2PDID3
B19A20
PDID4H13
PDID5PDID6
W18
P13MCLK
MEMADV_NB9
C1MEMBE0_NMEMBE1_N
D3
G8MEMCLK
D2MEMWAIT_N
MM
CC
LK
L19 J14
MM
CC
MD
MM
CD
AT
J19
K14
MS
BS
K19
MS
SC
LK
K15
MS
SD
IO
NCE5
L14NC0
OE_ND8
V3
M15
V2IRQ0_N
P20
IRR
XP
19IR
TX
ISEVENT_NM4
ISSYNC_NM3
KE
YIN
0_N
AA
15
KE
YIN
1_N
Y15
W15
KE
YIN
2_N
V15
KE
YIN
3_N
KE
YIN
4_N
W16
KE
YO
UT
0_N
P14
AA
17K
EY
OU
T1_
NK
EY
OU
T2_
NY
17W
17K
EY
OU
T3_
NK
EY
OU
T4_
NV
16
KE
YO
UT
5_N
T20
GPIO40R19R18
GPIO41GPIO42
V17
GPIO43AA21
GPIO44Y19
GPIO45AA20W19
GPIO46GPIO47
Y20
HSSLRXN8N3
HSSLRXCLK
N7HSSLTXHSSLTXCLK
N4
I2CSCLY2W3
I2CSDA
K3
IDA
TA
IRC
TR
L
V7W7
GPIO20Y7
GPIO21GPIO22
P10
GPIO23P15N14
GPIO24W20
GPIO25GPIO26
V19
GPIO27W21U18
GPIO30GPIO31
T18U19
GPIO32GPIO33
U20
GPIO34N15U21
GPIO35GPIO36
T19
GPIO37
DIR
MO
D3
GPIO00M14P18
GPIO01R21
GPIO02GPIO03
R8
GPIO04P9
GPIO05AA2
Y3GPIO06GPIO07
W4
GPIO10V5Y4
GPIO11GPIO12
V6W5
GPIO13Y5
GPIO14GPIO15
AA5W6
GPIO16GPIO17
A1
C7D2D3
D7C6
D4D5
B5C5
D6D6
D7D8
B4
D9C4
P3DACCLK
P2DACDATDACSTR
P4
DC
LK
K4
DIR
MO
D0
E2
DIR
MO
D1
J7 F3
DIR
MO
D2
F2
G21
H18CIPCLK
CIRES_NE19
CIVSYNCH15
CLKREQM8
J8CS0_NCS1_N
H7B10
CS2_NCS3_N
D9
A7D0D1
B7
D5D10D11
B3D4
D12D13
C3B2
D14D15
A9
ADCSTRP7
J2A
NT
SW
0A
NT
SW
1J4 J3
AN
TS
W2
J1A
NT
SW
3
H3
BA
ND
SE
L0
K7
BA
ND
SE
L1
E20CID0CID1
E21
CID2H14F19
CID3F20
CID4G18
CID5CID6
G19G20
CID7
CIHSYNC
A16G11
A17A18
D11C11
A19
A2B17
A20H10C10
A21A22
D10H9
A23C9
A24
A3G13C16
A4A5
C15
A6B15H12
A7A8
D14B14
D601
D751668A1ZZG_MARITA
MARITA
C17A1
A10C14G12
A11A12
B13
A13C13H11
A14A15
D12C12
NA
R2246 R2247
NA
R2242
NA
C61
5
33pL602
VMEM
0.1u
100K
R65
5
B
C
E
Q602RN1107
R63
2N
A
R60
5N
A
R630
3.3K
NAR603
VCORE
R61
447
0
0.1u
12 3
4
C62
1
32.7
68K
Hz
B60
1M
C-1
46_1
2.5p
F
C613
1000p
R607
NA
3.3K
R609
1.2K
R610
3G
ND
14
GN
D2
GN
D3
5G
ND
46
1IN OU
T 2
CN601
MM8430-2600B
NA
R633
0.1u
DAT1_RSV
DAT2_RSV
GND
GND
VDD
VSS
C61
9
Trans-Flash
500873-0802S601
CD_DAT3_CS
CLK_SCLK
CMD_DI
DAT0_DO
R653
470K
1uC
636
1608
R62
056
K
NA
R2245
0.1u
R2244
NA
C60
3
10uC640
2012
27nHL601
VR
TC
NAR611
C60
50.
1u
U602
DG3516DB-T5-E1
C3
CO
M1
A3
CO
M2
B1GND
C2
IN1
A2
IN2
C1
NC
1
A1
NC
2
C4
NO
1
A4
NO
2
B4V+
H1_R_OE
F3_R_UB
_R_WED5
_S_CS1J1
VSS5L1
VSS6C4
VSS7B4
WAITG7
_ADVE5
_F1_CEK1
_F1_OEJ2
G8_F2_CE
H8_F2_OE
K3_F3_CE
F4_F_RST
_F_WEF5
_F_WPE4
D6_P1_CS_P2_CS
K2
C2_R_LB
F1_VCC2L4
B6F2_VCC1F2_VCC2
K6
F_VPPD4
P_MODE_CREK8
K5P_VCC
C5S_CS2
K4S_VCC
L3VCCQ0VCCQ1
K7J8
VCCQ2
L8VSS0
L7VSS1
L6VSS2VSS3
L5L2
VSS4
D3H4
D4J5G5
D5
J6D6D7
H7G2
D8
J3D9
DU
0A
1
DU
1A
2A
7D
U2
DU
3A
8M
1D
U4
DU
5M
2
DU
6M
7
DU
7M
8
B5F1_VCC1
B1A4A5
C1F2
A6A7
E2A8
F6D7
A9
C6CLK
D0H2
D1H3
G4D10
J4D11D12
H5D13
G6D14
H6J7
D15
D2G3 C8
A12A13
D8F7
A14A15
E8F8
A16A17
D2A18
B2B3
A19
A2E1
E6A20A21
B7C7
A22
C3A23A24
D3E3
A25
A3D1
U603EUSY0211101
G1A0A1
F1
A10E7B8
A11
20121R648
100K
R628
0.1u
C63
3
R606
47
0.1u
C60
4
C62
5
TP621
0.1u
VD
IG
0.1uC645
VMEM
VDIG
VDIG
0.1u
C61
4
C63
80.
1u
R601
4.7K
0.1u
R61
756
K
C64
4
VDIG
0.1u
C63
0
RTC_GND
0.1u
C61
1
100K
R65
4
R615
130K
39VDDIORFVDD_IOV
38
VREG1840
19XTAL1_LPO
29XTAL1_SYS
XTAL2_LPO18
XTAL2_SYS28
33GPIO7_FSC_IPGPIO8_DCLK_IP
36
GPIO9_DB_IP34
15GP_CLK
53PGND
27POR_DISABLE
REF_CLK30
45RESET_N TCK_JTAG
50
49TDI_JTAG
TDO_JTAG48
47TMS_JTAG
17VANLI
VANLO22
VBAT16
37VDD18
GND678
GND7GND8
910
GND9
21GPIO0GPIO1
20
25GPIO10
GPIO112431
GPIO1223
GPIO13GPIO14
32
GPIO2_CTS_UART4441
GPIO3_RTS_UART43
GPIO4_TXD_UARTGPIO5_RXD_UART
42
35GPIO6_DA_IP
Bluetooth (BGB202/S2)
1_8V
_DE
CO
UP
126
1_8V
_DE
CO
UP
246
ANT2
1GND1
GND101112
GND11GND12
1314
GND13GND14
5152
GND15
GND234
GND3GND4
56
GND5
U604 BGB202_S2
R656 33p
R636 100K
R64
110
0K
0.1u
C60
1
0.1u
C61
0
VM
EM
VDIG
0.1u
C63
9
22p
VE
XT
15_M
VE
XT
15_M
C608
MARITATEMU0
RESOUT1nRESOUT0n
DAT(15)
DAT(0)
TF_DETECTTF_CMD
TF_CLK
TF_DAT
DAT(8)
DAT(9)
DAT(0:15)
ADR(1:24)
ADR(24)MEM_CS2_N
MEM_WAIT_NMEM_CLK
MEM_OE_N
MEM_WE_N
MEM_BE1_NMEM_BE0_N
VGA_IO_OFF
I2CDAT_MEGA
I2CCLK_MEGA
I2CDAT_VGA
I2CCLK_VGA
MEM_CS0_NMEM_CS1_N
MEM_CS3_N
MARITATEMU1
ADR(23)
MEM_ADV_N
DAT(1)
DAT(10)
DAT(11)
DAT(12)
DAT(13)
DAT(14)
DAT(2)
DAT(3)
DAT(4)
DAT(5)
DAT(6)
DAT(7)
ADR(8)
ADR(9)
ADR(10)
ADR(11)
ADR(12)
ADR(13)
ADR(14)
ADR(15)
ADR(16)
ADR(17)
ADR(18)
ADR(19)
ADR(20)
ADR(21)
ADR(24)
ADR(22)
I2C_VGA_EN
I2CCLK_DRIVER
MEM_CS0_NMEM_CS1_N
MEM_CS2_NMEM_CS3_N
RESOUT0n
ADR(1:24)
ADR(1)
ADR(2)
ADR(3)
ADR(4)
ADR(5)
ADR(6)
ADR(7)
I2C_VGA_ENCAM28_VGA_EN
MEM_WAIT_N
PULSESKIP
HSSLRXCLK
HS_AMP_EN
I2C_MEGA_EN
I2C_MEGA_EN
I2CCLK
I2CDAT
ADR(18)
ADR(17)
ADR(16)
ADR(15)
ADR(14)
ADR(13)
ADR(12)
ADR(11)
ADR(10)
ADR(9)
ADR(8)
ADR(7)
ADR(6)
ADR(5)
ADR(4)
ADR(3)
ADR(2)
ADR(1)
ADR(1:24)
UARTRX3UARTCTS3UARTRTS3
UARTTX3
CIRES_N_MEGA
ADR(24)
ADR(23)
DAT(15)
DAT(14)
DAT(13)
DAT(12)
DAT(11)
DAT(10)
DAT(9)
DAT(8)
DAT(7)
DAT(6)
DAT(5)
DAT(4)
DAT(3)
DAT(2)
DAT(1)
DAT(0) DAT(0:15)
ADR(22)
ADR(21)
ADR(20)
ADR(19)
MO
DC
MO
DB
MO
DA
DC
LK
DACSTRDACDATDACCLK
CLKREQ
CIVSYNC
CIRES_N_VGA
CIPCLK
CIHSYNC
CID7CID6CID5CID4CID3CID2CID1CID0
BS
EL
0
AN
TS
W3
AN
TS
W2
AN
TS
W1
AN
TS
W0
ADCSTR
KE
YIN
2K
EY
IN1
KE
YIN
0
ISSYNCnISEVENTn
IRQ0n
IDA
TA
HSSLTXCLKHSSLTX
HSSLRX
BL_SLEEP_EN
FOLDER_DET
3D_CTRL1USBSENSETF_DETECT3D_CTRL2
BTF_REG_EN
KEY_LED_ONOFFCAM18_EN
UARTRTS3UARTCTS3UARTTX3UARTRX3
3D_OFF
CAM28_EN
HS_SPK_SELAUDIO_AMP_EN
UARTTX0UARTRX0
MO
DD
LCDRSLCDWRXLCDCSX_SUB
PC
TL
PC
MS
YN
PC
MD
AT
B
PC
MC
LK
MEM_OE_N
TF
_DA
TT
F_C
MD
TF
_CL
K
MEM_CLK
MEM_BE1_NMEM_BE0_N
MEM_ADV_N
KE
YO
UT
5K
EY
OU
T4
KE
YO
UT
3K
EY
OU
T2
KE
YO
UT
1K
EY
OU
T0
KE
YIN
4K
EY
IN3
SYSCLK1
SIM
RS
T0
SIM
DA
T0
SIM
CL
K0
RX
ON
ONSWC
RA
DD
AT
RA
DC
LK
PWRRSTn
RESOUT3nRESOUT2n
QD
AT
A
PWRREQn
LCDRESX
PDID7PDID6PDID5PDID4PDID3PDID2PDID1PDID0LCDRDXLCDCSX_MAIN
SERVICE_N
RTCCLK
SYSCLK2
MCLK
MEM_WE_N
USBPUEN
USBDPUSBDM
PCMCLK
PCMDATB
GP
RF
CT
RL
PC
MD
AT
A
RA
DS
TR
TX
ON
CLKREQ
MCLK
RTCCLK
PCMSYN
PCMDATA
RESOUT2n
8. CIRCUIT DIAGRAM
235
VBATPWR
URXDUTXD
3G2.5G
GNDRXTX
UFLSON_SW
12
PWR_+4_2V_1
4 8
3
KEYPAD B to B Connector
VBAT_1
F
9
A
PCM_CLK
E
A
GND1
Size:
Drawn by:
11
Page 7 of 7(Baseband Part 3 of 3)
B
4
D
LG ELECTRONICS INC.
Changed by:
2
B
VBAT_GND
MFG ENGR CHK:
5
1.3M CAMERA CONNECTOR
6
DOC CTRL CHK:
PWR_GND_1
CTS
127
PCM_TXA_OUT
USB_TX
6
PWR_+4_2V_2
Drawing Number:
GND2
Time Changed:
E
C
TXD
BATT_ID
PWR_+5V_2
F
REV:
1
PCM_RXA_IN
PCM_SYNC
R&D CHK:
H
USB_RX
11
3
G
C
Date Changed:
Mobile Handsets R&D Center
ON_SW1
RXD
1
TITLE:
DTR
HW Group, Development Lab 6
PWR_+5V_1
HF_MODE
2 7
Engineer:
VBAT_2
J.S. Lee 7
U8550-spfy0106301-1.112 1 8 A
A2
H
Page:
DCDRI_TMS
QA CHK:
DSR
10
RFR_RTS
WANDA, Connector
LCD, VGA CAMERA CONNECTOR
USB_PWR
PWR_GND_2
D
5 10
G
8
Must change to LCD_VSYNC_OUT
9
Jeongseok Lee
Jeongseok Lee
7:25:29 pm2004, May 16
R731
2.2uC711
VPPFLASH_eVPPFLASH_iD5
0
A3CTMS_i
C3
B1CTS_ON_e
D1CTS_ON_i
B5DCIO_eDCIO_i
C5
DFMS_eA2D3
DFMS_iDTMS_e
A1D2DTMS_i
GN
D1
B2
B3
GN
D2
B4
GN
D3
C1
GN
D4
GN
D5
C2
VC
CC
4
A5
KNATTEIP4022CX20-LFN701
CFMS_eA4D4
CFMS_iCTMS_e
0R
721
R720
C732
NA
C1919
0.1u
NA
R74
810
0K
1uC
710
R719 NA
0.1uC719
VC
AM
_2.8
V
3_3V5
D11
D23 4
D3
D46
2GND
0R732
L701
NUF2221W1T2
USB FILTER
R741 2.7K
C705
20p
0
T11
N11
VS
SA
_CS
_AP
LL
VS
SA
_RX
T8
R8
VS
SA
_TX
R756
C12
B11
VS
S18
VS
S19
B10H3
VS
S2
B7
VS
S20
C5
VS
S21
VS
S22
C3
VS
S23
T6
T12
VS
S24
L2
VS
S3
N3
VS
S4
R3
VS
S5
VS
S6
R4
VS
S7
T4
U15
VS
S8
U17
VS
S9
VS
SA
_BG
K17
VD
DA
_BG
R11
VD
DA
_CS
_AP
LL
R12
U10
VD
DA
_RX
U6
VD
DA
_TX
VD
D_C
LK
32T
17
L15
VD
D_D
PL
LV
SS
0D
3
VS
S1
F3
P16
VS
S10
L16
VS
S11
VS
S12
J16
VS
S13
H16
F15
VS
S14
C16
VS
S15
VS
S16
B15
VS
S17
VD
D13
U5
VD
D14
VD
D15
T2
VD
D16
R1
M1
VD
D17
VD
D18
K2
G1
VD
D19
B8
VD
D2
D2
VD
D20
B1
VD
D21
VD
D3
A12
VD
D4
B14
A17
VD
D5
VD
D6
D16
F17
VD
D7
H17
VD
D8
VD
D9
G13
JTAG_TMSG15
G16JTAG_TRSTN
MCLKU13
R17RADIO_CLKRADIO_DAT
P15M13
RADIO_STR
N13RESET_N
D15
TE
ST
MO
DE
C13UART_RX
E12UART_TX
A3
VD
D0
VD
D1
A6
N17
VD
D10
VD
D11
R16
VD
D12
U16
R13
K15
GP
O3
K16
J15
GP
O4
J13
GP
O5
GP
O6
H15
H13
GP
O7
HCLKR15
C14HSSLRX_CLK
HSSLRX_DB16A16
HSSLTX_CLKHSSLTX_D
A15
D4ID_BALL
IS_EVENT_NB12A13
IS_SYNC_N
JTAG_TCKG17
F16JTAG_TDIJTAG_TDO
EMIF_D30EMIF_D31
U1
EMIF_D4G5E1
EMIF_D5F2
EMIF_D6EMIF_D7
F1
EMIF_D8G3G2
EMIF_D9
EMU0F13E15
EMU1
EXT_FRAME_STROBEE17
EXT_MEM_UBUS10N12T14
EXT_MEM_UBUS11EXT_MEM_UBUS12
R14
GP
O0
L17
GP
O1
K13
GP
O2
K3K5
EMIF_D17K1
EMIF_D18EMIF_D19
L1
EMIF_D2F5
L3EMIF_D20EMIF_D21
M2
EMIF_D22L5N1
EMIF_D23M3
EMIF_D24EMIF_D25
M5
EMIF_D26P2P3
EMIF_D27EMIF_D28
R2T1
EMIF_D29
E3EMIF_D3
N5
C9
EM
IF_A
6E
9C
8E
MIF
_A7
EM
IF_A
8E
8A
8E
MIF
_A9
U2EMIF_AREADY
T3EMIF_ARE_NEMIF_AWE_N
U3
C2EMIF_D0EMIF_D1
C1
H5EMIF_D10EMIF_D11
H1H2
EMIF_D12EMIF_D13
J2
EMIF_D14J3J5
EMIF_D15EMIF_D16
C7
EM
IF_A
12B
6E
7E
MIF
_A13
A5
EM
IF_A
14E
MIF
_A15
C6
E6
EM
IF_A
16E
MIF
_A17
B4
EM
IF_A
18C
4B
3E
MIF
_A19
A10
EM
IF_A
2
A2
EM
IF_A
20E
MIF
_A21
A1
EM
IF_A
22E
5B
2E
MIF
_A23
EM
IF_A
3C
10B9
EM
IF_A
4E
MIF
_A5
CPU_CLKOUT
N6CPU_IACK
CPU_IRQ0R6
CPU_IRQ1N7R5
CPU_XF
A11
CS
_BY
PA
SS
DAC_CLKN15L13
DAC_DAT
N8DAC_I_OUTDAC_I_OUT_INV
U8
DAC_Q_OUTU7
DAC_Q_OUT_INVR7
DAC_STRM15
T7DAC_TXEXTRES
EM
IF_A
1E
10A7
EM
IF_A
10E
MIF
_A11
ADC_I_IN_INVADC_Q_IN
R9T9
ADC_Q_IN_INV
N9ADC_RXEXTREF_NADC_RXEXTREF_P
T10
AD_STRM16
E11
AN
AL
OG
_EN
AB
LE
U12APLL_ATEST1
AP
LL
_BY
PA
SS
C11
BG
_RE
FU
11
BO
OT
MO
DE
0C
17
BO
OT
MO
DE
1B
17E
13B
OO
TM
OD
E2
C15
BO
OT
MO
DE
3
T16CLK32
T15CLKRQ
M17
D701
D751980C1ZPHR_WANDA
WANDA
ADC_I_INR10N10
100KR757
NC278
NC3
NC49
ON_SW5
RTS11
2RX
TX3
6VBAT
UART1
12CTS
10DSR
GND1
4NC1
VC
AM
_2.8
V
NAR705
12
R737 0
TP704
R742
R2241 0
TP705
0R726
20pC706
NAC1920
EMX18Q701
Keypad Backlight Control
2
56
31
4
NAR709
1u
10K
R730
C71
4
12
R74
9
R727
100K
R724
10K
R734 NA
TP
703
C736 0.1u
0.1uC731
R714 0
FB
702
R728
NA
10
GREEN17
11IM
S
12IR
GB
MAIN122
MAIN22120
MAIN319
MAIN4
PG
ND
25
RED16
SCL98
SDA
13S
GN
D
SUB112
SUB2
15VIN
U701LTC3206EUF
LCD BL and Cam Flash Driver LTC3206
23AUX1
AUX224
BLUE18
5C
1+
4C
1-6
C2+
3C
2-
CPO14
DVCC7
ENRGB
VDIGR704 0
0C737 0.1u
R701
0R715
R708
C74
032
16
0
33u
VBATI
NAR712
C74
21u
0R702
1608
R73
63K
R74
743
K1%
100KR755
NAR743
C739
0.1u
2.2u
VC
AM
_VG
A_2
.8V
C708
C721
NA
R746
0.1u
VCORE
NA
C70
3
FL703 5G
110
G2
1INOUT_A1
INOUT_A22
3INOUT_A3
INOUT_A44
INOUT_B19
8INOUT_B2
INOUT_B37
6INOUT_B4
VC
OR
E
C730
ICVE21184E150R101FR
0.1u
2.2u
C712
R758 0
R703 NA
C70
1N
A
3.3K
R74
4
R706 0
C709
2.2u
NA
C70
2
0R717
BLM18PG121SN1J
L702
R725 0
0.1uC734
R79
9
10
FL706NFA21SL207X1A45L
G1
5
G2
10
1IN1
IN22
3IN3
IN44
OUT19
8OUT2
OUT37
6OUT4
R722 NA
A8FILTER1_8
FILTER2_1C1C2
FILTER2_2C3
FILTER2_3C4
FILTER2_4FILTER2_5
C5C6
FILTER2_6C7
FILTER2_7FILTER2_8
C8
G1
B1
G2
B2
G3
B3
G4
B4
FL702A1
FILTER1_1FILTER1_2
A2
FILTER1_3A3
FILTER1_4A4
FILTER1_5A5
FILTER1_6A6A7
FILTER1_7
TP
707
VBATI
CSPEMI608
1D
1
D2
3
D3
45D
4
D5
6
2G
ND
VDIG
SMF05C-TCTV701
NFA21SL207X1A45L
5G
110
G2
IN11
2IN2
IN33
4IN4
9OUT1
OUT28
7OUT3
OUT46
474849
5
50
6789
FL705
313233343536373839
4
40414243444546
171819
2
202122232425 26
272829
3
30
CN70151 52
53 54
1
10111213141516
0R754
R752 0
0R739
0R753
VDIG
GND701
330pC729
R707 NA
VD
IG
0.1uC718
56789
171819
2
2021222324
25
26 2728
29
34
1
10111213141516
TP
706
IO Connector(24Pin)X701
NA
R729
VE
XT
15_W
NA
R72
3
51
0.01
u
VCORE
R718
C74
3
NAR711
C735 0.1u
NA
C74
10.
1u
C70
4
TP
708
C707
VC
AM
_2.8
V
NA
C727 0.1u
0.1uC724
1uC
713
0
R738
Q702 23 1
VC
AM
_1.8
V
0.1uC717
PMST3904
2.7K
R74
5
TP701
0.1uC720
1u
R73
512
K
C71
6C733 0.1u
51R716
47p
C72
6
21222324
3456789
1
101112 13
141516171819
2
20
CN703
0.1uC738C722 0.1u
VR
TC
VDIG
INOUT_B19
8INOUT_B2
INOUT_B37
6INOUT_B4
0R740
ICVE21184E150R101FR
FL7045G
110
G2
1INOUT_A1
INOUT_A22
3INOUT_A3
INOUT_A44
2526
3456789
G1 G2
G3 G4
10111213 14
1516171819
2
2021222324
CN702
1
1uC
715
TP
702
0.1uC723
R733 0
C725 0.1u
R710 NA
FL7015G
110
G2
1INOUT_A1
INOUT_A22
3INOUT_A3
4INOUT_A4
INOUT_B19
8INOUT_B2
INOUT_B37
6INOUT_B4
ICVE21184E150R101FR
C728 0.1u
R713
VBAT
VGA_IO_OFF
CIRES_N_MEGA
CIRES_N_VGA
NA
I2CDAT_VGA
I2CCLK_MEGAI2CDAT_MEGA
I2CCLK_DRIVERI2CCLK
CID0CID1CID2CID3
CID4CID5CID6CID7
DCIN_3
SERVICE_N
USBDM
USBDP
USBPUEN
DCIN_2
VBUS
EARP
CPO_LTC_LCDBL
KEYIN2
DCIN_3
IND_SINK
LCDCSX_SUB
RTCCLK
CLKREQRESOUT1n
DACCLKDACDATDACSTR
TXQB
HSSLTXHSSLRXCLK
HSSLRXHSSLTXCLK
ISSYNCnISEVENTn
MCLK
UARTRX0
RXIBVBACKUPUARTTX0
RXQARXQB
ONSWBn
ADCSTR
TXIATXIB
TXQA
WCLKWDAT
RXIA
WSTR
SYSCLK1
LCDCSX_MAIN
LCDRESXCIHSYNCLCDRDX
LCDRS
LCDWRX
LCDBL1LCDBL2KEYIN1LCDBL3LCDBL4KEYIN3LCDBL5
CIPCLK
FOLDER_DETKEY_LED-PDID5PDID4PDID3PDID2PDID1PDID0
EARM
I2CCLK_VGACIVSYNC
SPK_RIGHT_MSPK_LEFT_MKEYIN0KEYOUT0KEYIN1KEYOUT1KEYIN2KEYOUT2KEYIN3KEYOUT3KEYIN4KEYOUT4ONSWAnKEYOUT5
PDID7PDID6
LCDBL1LCDBL2LCDBL3LCDBL4LCDBL5
CIHSYNC
CIPCLK
SYSCLK1
BL_SLEEP_EN
CIVSYNC
FLASH1I2CDATFLASH2FLASH3
SPK_RIGHT_PSPK_LEFT_P
FLASH3KEY_LED_ONOFFFLASH2FLASH1
CPO_LTC_FLASH
CPO_LTC_FLASHCPO_LTC_LCDBL
KEY_LED-
8. CIRCUIT DIAGRAM
236
+-
LEFT SPEAKER
LG Electronics Inc.
1
Sign & Name
Approved
MODEL
DRAWING
LG Electronics Inc.
LGIC(42)-A-5505-10:01
Sheet/
Sheets
NAME
Section
2 4 5 6 7 8
3 42 5
A
9
C
D
7/272004 JS Lee
U8550 Keypad-1.0
enter draw_number
1/1U8550(GD32)
Notice No.Iss. Date
10
1
E
A
BB
Name
C
D
+-
Designer
Checked
RIGHT SPEAKER
DRAWING
NO.
3
Date
END1
0R22
END
EV
L14
K02
200
VA
1
VA
2E
VL
14K
0220
0
SIDE2
SIDE3
0R17
NA
GAME1
C4
150
R15
GAME
TP1
22
DOWNDOWN1
470
R28
2021222324
3456789
CN1
AXK6F24345
1
101112 13
141516171819
2
KEYPAD B to B Connector
BACKR13 0
C10
BACK1
47p
NAC5
OK1
OK
68
150
R4
LD
11L
EB
B-S
14H
R23
150
CN21234
SHARP1
#
SIDE KEY Keypad
R27 470
FB1
47pC9
9
8
R7 0
LD
10L
EB
B-S
14H
LE
BB
-S14
HL
D9
44
D1
VBATI
R24
470
VDIG
1SS388
100KR1
1
1
UC
LA
MP
0501
H
TV
S2
R29
150
INS
TP
AR
*
SEARCH1
STAR1
LE
BB
-S14
HL
D5
SEARCH
LE
BB
-S14
HL
D13
R18 0
MULTI1
0R11
MULTI
0R8R12 0
LD
2L
EB
B-S
14H
150
R31
LD
4L
EB
B-S
14H
LE
BB
-S14
HL
D7
0R19
TP4
C747p
150
R3
EV
L14
K02
200
VA
3
G1
G2
1
2
SIDE1
10
VBATI
CN4
0.1u
0
C3
PG05DBTFC
R32 100K
R5
150
150
R10R2
G1
G2
1
2
150
CN3
R26
150
R14
150
97
CAM
75
470
R25
CAM1
RIGHTRIGHT1
CLEAR
TV
S3
UC
LA
MP
0501
H
INS
TP
AR
0R20
CLEAR1
R21 0
6
5
VDIG
C20.1u
MENU1
MENU
LE
BB
-S14
HL
D12
3
3
R16 0LEFT
LEFT1
150
R30
TV
S1
UC
LA
MP
0501
HIN
ST
PA
R
SEND1
TP2
SEND
TP3
LD
8L
EB
B-S
14H
LD
6L
EB
B-S
14H
LE
BB
-S14
HL
D1
LE
BB
-S14
HL
D3
UP1
UP
R6
150
FB4
C6NA
FB3
7PGND
6VDD
0R9
U1A3212EEH-T
Folder Detect
3GND1
GND24
2NC1
5NC2
1OUTPUT
PG05DBTFC
R34 100K
100KR33
PG05DBTFC
FB2C847p
10pC1
KEYIN4
KEYIN1KEYIN0
ONSWAn
KEY_LED-
KEY_LED-
KEYOUT3KEYOUT4KEYOUT5
KEYOUT2KEYOUT1KEYOUT0
FOLDER_DET
KEYIN2KEYIN3
KE
YIN
0
KE
YIN
1
KE
YIN
2
KE
YIN
3
KE
YIN
4
KEYOUT2
KEYOUT4
KEYOUT3
KEYOUT1
KEYOUT5
FOLDER_DET
ON
SW
An
KEYOUT0
8. CIRCUIT DIAGRAM
237
Sheets
NAME
9
5
C
6
LGIC(42)-A-5505-10:01
Checked
2
4
4
LG Electronics Inc.
1
7 8
C
10
E
3
A
B
2 3
NO.
B
Iss. Notice No. Date
Sign & Name
Name
VC
AM
_1.8
V
JS Lee200503/28 U8550
1/1
enter draw_number
U8550 Mega Camera FPCB-1.0
A
Designer
DRAWING
LG Electronics Inc.
DRAWING
D D
Section Date
5
Sheet/
1
Approved
MODEL
222324
3456789
VC
AM
_2.8
_AV
DD
VC
AM
_2.8
_DV
DD
VC
AM
_2.8
_DV
DD
1
101112 13
141516171819
2
2021
FPCB-to-1.3M Connector
CN2
TP3 TP4TP1 TP2
89
G1
G2
VC
AM
_1.8
V
VC
AM
_2.8
_AV
DD
171819
2
20212223242526
34567
CN1
MAIN-to-FPCB Connector
1
1011121314
1516
EDLM0005801
LD1
R1
51
CID1CID0
CID0
CPO_LTC_FLASHFLASH1FLASH2FLASH3
CIPCLK
CIPCLK
CID7
CID7CID6
CID6CID5
CID5CID4
CID4CID3
CID3CID2
CID2CID1
I2C_CLK
I2C_CLKI2C_DAT
I2C_DAT
CIVSYNC
CIVSYNCCIHSYNC
CIHSYNC
SYSCLK
SYSCLK
CIRES_1.3M
CIRES_1.3M
8. CIRCUIT DIAGRAM
238
Sign & Name
Name
4
LG Electronics Inc.
NAME
9
5
C
6 10
NEW - 0ROLD - NA
Designer
DRAWING
LG Electronics Inc.
E
2 5
Sheet/
1
D
Section Date
C
A
B
D
4
8
2
Approved
MODEL
DRAWING
3
Notice No. Date
VDIG
JS Lee200504/26 U8550(GD32)
1/1
enter draw_number
U8550 LCD FPCB-1.0
3
NO.
B
Iss.
1
7
A
LGIC(42)-A-5505-10:01
Checked
Sheets
0
R9
EARM
R6 0
TP5
RIGHT
TP4
CENTER
0
R4
LEFT
LD1
LEBB-S14H
C3NA
TP6
EARP
373839
4
40
56789
2223242526272829
3
30313233343536
G1
G2
1
10111213141516171819
2
20 21
Header
CN1
AXK8L40125G
LCD ConnectorTP2TP1
LD2
LEBB-S14H
R3
0
R7 0
R1
100K
VDIG
20
3456789
CN3
AXK720145G
1
10 1112131415161718192
NA
VGA Camera Connector
VD
IG
C1
9
VC
AM
_VG
A_2
.8V
TP3
40414243444546474849
5
50
678
25 26272829
3
30313233343536373839
4
111213141516171819
2
2021222324
CN2
HEADER
MAIN-to-LCD Connector
51 52
53 54
1
10
0R11 AXK8L50125BG
R10 0R12 10
1u
1u
C4
C5
C2NA
PDID7PDID6
LCDRSVGA_IO_OFF
MLED2
CID5
IND_SINK
MLED5
PDID5PDID4PDID3PDID2PDID1PDID0LCDWRXLCDCSX_MAIN
LCDRDX
CIRES_N
CID1CID2CID3CID4
LCDRESX
LCDCSX_SUB
KEYIN1KEYIN2KEYIN3
DCIN_3
MLED4
CID0
MLED3
MLED1
CIPCLK
SYSCLK1
CPO_LTC_LCDBL
CID6CID7
CIVSYNCCIHSYNC
I2C_DATI2C_CLK
8. CIRCUIT DIAGRAM
239
9. PCB LAYOUT
240
9. PCB LAYOUT
241
9. PCB LAYOUT
242
9. PCB LAYOUT
243
9. PCB LAYOUT
244
9. PCB LAYOUT
245
9. PCB LAYOUT
246
9. PCB LAYOUT
247
248
10. EXPLODED VIEW & REPLACEMENT PART LIST
10.1 EXPLODED VIEW
01
02
03
04
05
06
07
09
10
12
20
17
18
19 29
21
30 32
31
22
38
39
40
4241
43
44
77
767574
52
5049
46
45
37
36
35
34
33
28
2726
25
23
24
16
15
14
13
110823-1
47
48
51
53 5455
5657
58
5961
60
62
63 64
65
66
67
68
69 70 71
72
73
78
249
NO DESCRIPTION Q'TY DRAWING NODRAWING NO REMARK NO DESCRIPTION Q'TY DRAWING NODRAWING NO REMARK
1 WINDOW LCD(SUB) 1 AWAZ00071## 01:SILVER, 02:GREEN, 03:ORANGE 40 BUTTON,SIDE 1 MBJL0022901
2 DECO(3 LOGO) 1 MDAY0006801 41 PLATE,FACE 1 MPFC0070301
3 DECO FOLDER(UPPER) 1 MDAE00304## 01:SILVER, 02:GREEN, 03:ORANGE 42 COVER,FRONT 1 MCJK00418## 01:SILVER, 02:GREEN, 03:ORANGE
4 TAPE,WINDOW(SUB) 1 MTAE0023901 43 STOPPER 1 MSGY00111## 01:SILVER, 02:GREEN, 03:ORANGE
5 TAPE,DECO 1 MTAA0094701 44 KEYPAD,DIAL 1 MKAA00126## 01:SILVER, 02:GREEN, 03:ORANGE
6 DECO,WINDOW 1 MDAM0006901 45 CAP,RECPTACLE 1 MCCE00212## 01:SILVER, 02:GREEN, 03:ORANGE
7 COVER,FOLDER(UPPER) 1 MCJJ0034201 46 CAP,MULTIMEDIA CARD 1 MCCG00031## 01:SILVER, 02:GREEN, 03:ORANGE
8 PAD,FLEXIBLE FPCB 1 MPBF0012401 47 DOME ASSY,METAL 1 ADCA0035301
9 GASKET(CINNECTOR) 1 MGAD0096801 48 STPPER,HINGE 1 MSGB0010901
SGEY000370710 PAD,LCD(SUB) 1 MPBQ0024101 49 MIKE 2
11 DOME ASSY METAL 1 ADCA0035201 50 PAD,SPEAKER 2 MPBN0022601
SAEY0044401
SUSY0017501
12 PCB ASSY,FLEXIBLE(LCD) 1 SACY0038001 51 PCB ASSY,KEYPAD 1
13 LCD MODULE 1 SVLM0015201 52 SPEAKER 2
14 KEYPAD(MOD) 1 MKAZ00233## 01:SILVER, 02:GREEN, 03:ORANGE 53 FRAME,SHILED 1 MFEA0007801
15 TAPE,BUTTON 1 MTAG0001101 54 PCB ASSY,MAIN 1 SAFY0134601
16 BRACKET(MOD) 1 MBFZ0022101 55 BRACKET,CAMERA 1 MBFP0003001
17 PAD,LCD(MAIN) 1 MPBG0034601 56 TAPE(CAMERA MEGA) 1 MTAZ0083001
18 MAGNET 1 MMAA0001801 57 CAMERA,MEGA 1 SVCY0007701
19 COVER,FOLDER(LOWER) 1 MCJH0026901 58 PCB ASSY,FLEXIBLE(CAMERA) 1 SACY0038101
20 SCREW MACHINE,BIND 4 GMEY0009201 59 TAPE(CAMERA FPCB) 1 MTAZ0083201
21 CAP,SCREW(FOLDER,L,UP) 1 MCCH0054501 60 GASKET(MEGA CAMERA FPCB) 1 MGAD0102701
22 CAP,SCREW(FOLDER,R,UP) 1 MCCH0054601 61 GASKET(CONNECTOR) 1 MGAD0096701
23 PAD,CAMERA 1 MPBT0019601 62 VIBRATOR,MOTOR 1 SJMY0007007
23-1 CAMERA,VGA 1 SVCY0009101 63 SCREW MACHINE,BIND 1 GMEY0009201
24 RECEIVER 1 SURY0009501 64 CONTACT,ANTENNA 1 MCIA0014801
25 TAPE,DECO 1 MTAA0094601 65 ANTENNA 1 SNGF00110## 01:GREEN, 02:ORANGE, 03:SILVER
26 DECO,FOLDR(LOWER) 1 MDAF00074## 01:SILVER, 02:GREEN, 03:ORANGE 66 DECO,REAR 1 MDAK00072## 01:SILVER, 02:GREEN, 03:ORANGE
27 TAPE(R,DOWN) 1 MTAZ0086801 67 WINDOW,FLASH 1 MWAH0001601
28 CAP,SCREW(FOLDER,R,DOWN) 1 MCCH00548## 01:SILVER, 02:GREEN, 03:ORANGE 68 WINDOW,CAMERA 1 MWAE0009301
29 TAPE(L,DOWN) 1 MTAZ0086901 69 TAPE(DECO CAMERA) 1 MTAA0095201
30 CAP,SCREW(FOLDER,L,DOWN) 1 MCCH00547## 01:SILVER, 02:GREEN, 03:ORANGE 70 DECO,CAMERA 1 MDAD00130## 01:SILVER, 02:GREEN, 03:ORANGE
31 TAPE,WINDOW(MAIN) 1 MTAD0037101 71 CAP,SCREW(MAIN,L) 1 MCCH0054901
32 WINDOW,LCD(MAIN) 1 AWAB00183## 01:SILVER, 02:GREEN, 03:ORANGE 72 CAP,SCREW(MAIN,R) 1 MCCH0055001
33 DECO,SPEAKER 1 MDAN00068## 01:SILVER, 02:GREEN, 03:ORANGE 73 CAP,MOBILE SWITCH 1 MCCF0030501
34 TAPE(DECO SPEAKER) 1 MTAA0094901 74 HOLDER,CARD 1 MHGB0001401
35 BRACKET,SPEAKER 1 MBFK0001901 75 GASKET(REAR) 1 MGAD0096901
36 TAPE(BRACKET SPEAKER) 1 MTAA0094801 76 COVER,REAR 1 MCJN0037501
37 DECO,FRONT 1 MDAG0012501 77 SCREW MACHINE,BIND 6 GMEY0009201
38 CAP,EARPHONE JACK 1 MCCC00252## 01:SILVER, 02:GREEN, 03:ORANGE
39 HINGE,FOLDER 1 MHFD0011201
250
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 251 -
LevelLocation
No.Description Part Number Specification Color Remark
1 IMT,FOLDER TIFF0009903 Green
2 AAAY00 ADDITION AAAY0128401 Green
3 MCJA00 COVER,BATTERY MCJA0021801 PC, UV SPRAY White
2 APEY00 PHONE APEY0224002 GREEN COLOR Green
3 ACGG00 COVER ASSY,FOLDER ACGG0061902 Green
4 ABFZ00 BRACKET ASSY ABFZ0005801 MOD BUTTON SUPPORT BRACKET ASS'YWithoutColor
5 MBFZ00 BRACKET MBFZ0022101 SUS 0.5T PRESS, NON-COATINGWithoutColor
16
5 MTAZ00 TAPE MTAZ0083301WithoutColor
4 ACGH00COVER ASSY,FOLDER(LOWER)
ACGH0035502 Green
5 MCJH00 COVER,FOLDER(LOWER) MCJH0026901 PC, UV, Silver 19
5 MDAF00 DECO,FOLDER(LOWER) MDAF0007402 Green 26
5 MFBB00 FILTER,RECEIVER MFBB0012601 Black
5 MMAA00 MAGNET,SWITCH MMAA0001801 DIA3.0x2.0tWithoutColor
18
5 MPBG00 PAD,LCD MPBG0034601 MAIN LCD PADWithoutColor
17
5 MPBT00 PAD,CAMERA MPBT0019601 Black 23
5 MTAA00 TAPE,DECO MTAA0094601WithoutColor
25
5 MTAD00 TAPE,WINDOW MTAD0037101 0.15TWithoutColor
31
5 MTAZ00 TAPE MTAZ0086801WithoutColor
27
5 MTAZ01 TAPE MTAZ0086901WithoutColor
29
4 ACGJ00COVER ASSY,FOLDER(UPPER)
ACGJ0046802 Green
5 MCJJ00 COVER,FOLDER(UPPER) MCJJ0034201 Silver 7
5 MDAE00 DECO,FOLDER(UPPER) MDAE0030402 Green 3
5 MDAM00 DECO,WINDOW(SUB) MDAM0006901 AL DICASTING Silver 6
5 MDAY00 DECO MDAY0006801 0.2tWithoutColor
2
5 MGAD00 GASKET,SHIELD FORM MGAD0096801 LCD LEFTBROWNGOLD
9
10.2 Replacement Parts<Mechanic component>
Note: This Chapter is used for reference, Part orderis ordered by SBOM standard on GCSC
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 252 -
LevelLocation
No.Description Part Number Specification Color Remark
5 MGAD01 GASKET,SHIELD FORM MGAD0097801 LCD-UPPER CONTACT, 2POINTWithoutColor
5 MKAZ00 KEYPAD MKAZ0023302 Green 14
5 MPBF00 PAD,FLEXIBLE PCB MPBF0012401 Black 8
5 MPBQ00 PAD,LCD(SUB) MPBQ0024101 Black 10
5 MTAA00 TAPE,DECO MTAA0094701WithoutColor
5
5 MTAE00 TAPE,WINDOW(SUB) MTAE0023901WithoutColor
4
5 MTAG00 TAPE,BUTTON MTAG0001101 MOD KEY FIX TAPEWithoutColor
15
4 ACGK00 COVER ASSY,FRONT ACGK0056402 Green
5 MBFK00 BRACKET,SPEAKER MBFK0001901 CHROME PLATINGWithoutColor
35
5 MBJL00 BUTTON,SIDE MBJL0022901 ABS+URETHANE CHROME PLATINGWithoutColor
40
5 MCCC00 CAP,EARPHONE JACK MCCC0025202 PC+URETHANE UV COATING Green 38
5 MCCE00 CAP,RECEPTACLE MCCE0021202 URETHANE SPRAY Green 45
5 MCCG00 CAP,MULTIMEDIA CARD MCCG0003102 PC+URETHANE UV COATING Green 46
5 MCJK00 COVER,FRONT MCJK0041802 Green 42
5 MDAG00 DECO,FRONT MDAG0012501 PC,UVWithoutColor
37
5 MDAN00 DECO,SPEAKER MDAN0006802 Green 33
5 MPBN00 PAD,SPEAKER MPBN0022601 Black 50
5 MPFC00 PLATE,FACE MPFC0070301 SUS 0.2TWithoutColor
41
5 MSGY00 STOPPER MSGY0011102 Green 43
5 MTAA00 TAPE,DECO MTAA0094801WithoutColor
36
5 MTAA01 TAPE,DECO MTAA0094901WithoutColor
34
5 MTAA02 TAPE,DECO MTAA0095001WithoutColor
4 AWAB00 WINDOW ASSY,LCD AWAB0018302 MAIN LCD INMOLD WINDOW Green 32
5 BFAA00 FILM,INMOLD BFAA0032102 BLACK Black
5 MWAC00 WINDOW,LCD MWAC0054301 PMMA, INMOLDWithoutColor
4 AWAZ00 WINDOW ASSY AWAZ0007102 SUB WINDOW Green 1
5 BFAA00 FILM,INMOLD BFAA0029201 A Transparent
5 MWAF00 WINDOW,LCD(SUB) MWAF0027901 PMMA, TRANSPARENT INMOLD + SILK Silver
4 GMEY00 SCREW MACHINE,BIND GMEY0009201 1.4 mm,3.5 mm,MSWR3(BK) ,B ,+ ,HEAD D=2.7mm Black 20,63,77
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 253 -
LevelLocation
No.Description Part Number Specification Color Remark
4 MCCH00 CAP,SCREW MCCH0054501 SILICON RUBBER, FOLDER LIGHT Gray 21
4 MCCH01 CAP,SCREW MCCH0054601 SILICON RUBBER, FOLDER LEFT Gray 22
4 MCCH02 CAP,SCREW MCCH0054702 Green 30
4 MCCH03 CAP,SCREW MCCH0054802 Green 28
4 MGAZ01 GASKET MGAZ0022702 Gold
4 MGAZ02 GASKET MGAZ0022703 Gold
4 MGAZ04 GASKET MGAZ0022701 Gold
4 MHFD00 HINGE,FOLDER MHFD0011201WithoutColor
39
4 MIDZ00 INSULATOR MIDZ0056801WithoutColor
4 MIDZ02 INSULATOR MIDZ0075001WithoutColor
4 MKAA00 KEYPAD,DIAL MKAA0012602 Green 44
4 MLAC00 LABEL,BARCODE MLAC0003401 EZ LOOKS(user for mechanical)WithoutColor
4 MSGB00 STOPPER,HINGE MSGB0010901 PCWithoutColor
48
4 MTAB00 TAPE,PROTECTION MTAB0084901WithoutColor
4 MTAB01 TAPE,PROTECTION MTAB0085001WithoutColor
6 ADCA00 DOME ASSY,METAL ADCA0035201 FOLDER MOD BUTTON DOME ASSYWithoutColor
11
3 ACGM00 COVER ASSY,REAR ACGM0059602 REAR+CAMERA WINDOW ASS'Y Green
4 GMEY00 SCREW MACHINE,BIND GMEY0009201 1.4 mm,3.5 mm,MSWR3(BK) ,B ,+ ,HEAD D=2.7mm Black 20,63,77
4 MCCZ00 CAP MCCZ0008903 White
4 MCIA00 CONTACT,ANTENNA MCIA0014801 PRESS, 0.15T Gold 64
4 MCJN00 COVER,REAR MCJN0037501 PC, UV White 76
4 MDAD00 DECO,CAMERA MDAD0013002 Green 70
4 MDAK00 DECO,REAR MDAK0007202 Green 66
4 MGAD00 GASKET,SHIELD FORM MGAD0096701 MAIN CONNECTORBROWNGOLD
61
4 MGAD01 GASKET,SHIELD FORM MGAD0096901 LCD RIGHTBROWNGOLD
75
4 MHGB00 HOLDER,CARD MHGB0001401WithoutColor
74
4 MLAB00 LABEL,A/S MLAB0000601 HUMIDITY STICKERWithoutColor
4 MLAN00 LABEL,QUALCOMM MLAN0000601 Black,95C Transparent
4 MPBT00 PAD,CAMERA MPBT0019701 Black
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 254 -
LevelLocation
No.Description Part Number Specification Color Remark
4 MPBZ00 PAD MPBZ0101301 Black
4 MTAA00 TAPE,DECO MTAA0095101WithoutColor
4 MTAA01 TAPE,DECO MTAA0095201WithoutColor
69
4 MTAB00 TAPE,PROTECTION MTAB0089201WithoutColor
4 MTAB01 TAPE,PROTECTION MTAB0089301WithoutColor
4 MWAE00 WINDOW,CAMERA MWAE0009301 0.8T, PMMA SHEETWithoutColor
68
4 MWAH00 WINDOW,FLASH MWAH0001601 PMMA Transparent 67
4 SJMY00 VIBRATOR,MOTOR SJMY0007007 3 V,.08 A,5*12.4 ,Cylinder Motor 62
3 ACGN00 COVER ASSY,CAMERA ACGN0004501 CAMERA + BRACKET ASS'YWithoutColor
4 ABFZ00 BRACKET ASSY ABFZ0005701 MEGA CAMERA BRACKET ASS'YWithoutColor
5 MBFP00 BRACKET,CAMERA MBFP0003001 PCWithoutColor
55
5 MTAZ00 TAPE MTAZ0083001WithoutColor
56
5 MTAZ01 TAPE MTAZ0083201WithoutColor
59
4 MGAD00 GASKET,SHIELD FORM MGAD0102701WithoutColor
60
3 GMEY00 SCREW MACHINE,BIND GMEY0009201 1.4 mm,3.5 mm,MSWR3(BK) ,B ,+ ,HEAD D=2.7mm Black 20,63,77
3 MCCF00 CAP,MOBILE SWITCH MCCF0030501 White 73
3 MCCH00 CAP,SCREW MCCH0054901 SILICON RUBBER, MAIN LEFT White 71
3 MCCH01 CAP,SCREW MCCH0055001 SILICON RUBBER, MAIN RIGHT White 72
3 MFEA00 FRAME,SHIELD MFEA0007801 PCWithoutColor
53
3 MLAK00 LABEL,MODEL MLAK0009001WithoutColor
5 ADCA00 DOME ASSY,METAL ADCA0035301 MAIN BUTTON DOME ASSYWithoutColor
47
5 MGAZ00 GASKET MGAZ0022901 Gold
5 MLAB00 LABEL,A/S MLAB0000601 HUMIDITY STICKERWithoutColor
5 MLAC00 LABEL,BARCODE MLAC0003401 EZ LOOKS(user for mechanical)WithoutColor
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 255 -
10.2 Replacement Parts<Main component>
Note: This Chapter is used for reference, Part orderis ordered by SBOM standard on GCSC
LevelLocation
No.Description Part Number Specification Color Remark
4 SACY00 PCB ASSY,FLEXIBLE SACY0038001 Silver 12
5 SACB00PCB ASSY,FLEXIBLE,INSERT
SACB0025501 Green
5 SACE00 PCB ASSY,FLEXIBLE,SMT SACE0033801 Silver
6 SACC00PCB ASSY,FLEXIBLE,SMTBOTTOM
SACC0018001 Silver
7 C4 CAP,CERAMIC,CHIP ECCH0000276 1 uF,10V,Z,Y5V,HD,1608,R/TP
7 C5 CAP,CERAMIC,CHIP ECCH0000276 1 uF,10V,Z,Y5V,HD,1608,R/TP
7 CN3CONNECTOR,BOARD TOBOARD
ENBY0019501 20 PIN,.4 mm,ETC , ,H=1.5, Socket
7 LD1 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
7 LD2 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
7 R10 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
7 R11 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
7 R12 RES,CHIP ERHY0000203 10 ohm,1/16W,J,1005,R/TP
7 R3 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
7 R4 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
7 R6 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
7 R7 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 SACD00PCB ASSY,FLEXIBLE,SMTTOP
SACD0026201 Silver
7 CN1CONNECTOR,BOARD TOBOARD
ENBY0020201 40 PIN,0.4 mm,ETC , ,H=0.9, Header
7 CN2CONNECTOR,BOARD TOBOARD
ENBY0022401 50 PIN,0.4 mm,ETC , ,H=0.9, Header
7 R1 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
7 R9 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 SPCY00 PCB,FLEXIBLE SPCY0057801 POLYI ,0.5 mm,MULTI-6 ,
4 SURY00 RECEIVER SURY0009501 ASSY ,107 dB,32 ohm,11*07 ,3T 24
4 SVCY00 CAMERA SVCY0009101 CMOS ,VGA , 23_1
4 SVLM00 LCD MODULE SVLM0015201MAIN ,M_220*220 S_128*160 ,M_46.5*52.3*4.3 S_7*4.3,262k ,TFT ,TM ,(SOURCE)HD66781 (GATE)HD66783,SUB LCD:DRIVE IC(LGDP4511) ,
13
4 SNGF00 ANTENNA,GSM,FIXED SNGF00110013.0 ,-2.0 dBd,Green,GSM900+DCS1800+PCS1900+WCDMA2100,fixed
65
4 SACY00 PCB ASSY,FLEXIBLE SACY0038101 Silver 58
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 256 -
LevelLocation
No.Description Part Number Specification Color Remark
5 SACE00 PCB ASSY,FLEXIBLE,SMT SACE0033901 Silver
6 SACD00PCB ASSY,FLEXIBLE,SMTTOP
SACD0026301 Silver
7 CN1CONNECTOR,BOARD TOBOARD
ENBY0025201 26 PIN,0.4 mm,ETC , ,H=0.9, Header
7 CN2CONNECTOR,BOARD TOBOARD
ENBY0019101 24 PIN,0.4 mm,STRAIGHT , ,H1.5, MALE
7 LD1 DIODE,LED,MODULE EDLM0005502 White ,3 LED,3.5*2.8*1.8 ,R/TP ,Flash LED
7 R1 RES,CHIP ERHY0000214 51 ohm,1/16W,J,1005,R/TP
6 SPCY00 PCB,FLEXIBLE SPCY0058201 POLYI ,0.5 mm,BUILD-UP 6 ,FPCB-CAMERA
4 SVCY00 CAMERA SVCY0007701 CMOS ,MEGA ,1.3M ESS Sensor 57
3 SAEY00 PCB ASSY,KEYPAD SAEY0044401 Silver 51
4 SAEB00PCB ASSY,KEYPAD,INSERT
SAEB0011701 Silver
5 SAKY00 PCB ASSY,SIDEKEY SAKY0005401 Silver
5 SUSY00 SPEAKER SUSY0017501 ASSY ,8 ohm,90 dB,15 mm,*14mm, 3.7T 52
4 SAEE00 PCB ASSY,KEYPAD,SMT SAEE0013301 Silver
5 SAEC00PCB ASSY,KEYPAD,SMTBOTTOM
SAEC0012701 Silver
6 C1 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C10 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 C2 CAP,CERAMIC,CHIP ECCH0000182 0.1 uF,10V ,K ,X5R ,HD ,1005 ,R/TP
6 C3 CAP,CERAMIC,CHIP ECCH0000182 0.1 uF,10V ,K ,X5R ,HD ,1005 ,R/TP
6 C7 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 C8 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 C9 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 CN1CONNECTOR,BOARD TOBOARD
ENBY0002107 24 PIN,.5 mm,STRAIGHT ,SILVER ,
6 CN3CONNECTOR,BOARD TOBOARD
ENBY0001803 2 PIN,1.27 mm,STRAIGHT ,SILVER ,
6 CN4CONNECTOR,BOARD TOBOARD
ENBY0001803 2 PIN,1.27 mm,STRAIGHT ,SILVER ,
6 D1 DIODE,SWITCHING EDSY00104011-1G1A ,40 V,300 A,R/TP ,Silicon Epitaxial Schottky BarrierType Diode
6 FB1 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 FB2 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 FB3 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 FB4 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 R1 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 257 -
LevelLocation
No.Description Part Number Specification Color Remark
6 R11 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R12 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R13 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R16 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R17 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R18 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R19 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R20 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R21 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R22 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R24 RES,CHIP ERHY0000233 470 ohm,1/16W,J,1005,R/TP
6 R25 RES,CHIP ERHY0000233 470 ohm,1/16W,J,1005,R/TP
6 R27 RES,CHIP ERHY0000233 470 ohm,1/16W,J,1005,R/TP
6 R28 RES,CHIP ERHY0000233 470 ohm,1/16W,J,1005,R/TP
6 R7 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R8 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R9 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 TVS1 DIODE,TVS EDTY0007301SOD-523 ,5 V,240 W,R/TP ,SINGLE LINE TVS DIODE FORESD
6 TVS2 DIODE,TVS EDTY0007301SOD-523 ,5 V,240 W,R/TP ,SINGLE LINE TVS DIODE FORESD
6 TVS3 DIODE,TVS EDTY0007301SOD-523 ,5 V,240 W,R/TP ,SINGLE LINE TVS DIODE FORESD
6 U1 IC EUSY0200301 Leadless chip ,6 PIN,R/TP ,Hall S/W, Pb Free
6 VA1 VARISTOR SEVY0000702 14 V,10% ,SMD ,
6 VA2 VARISTOR SEVY0000702 14 V,10% ,SMD ,
6 VA3 VARISTOR SEVY0000702 14 V,10% ,SMD ,
5 SAED00PCB ASSY,KEYPAD,SMTTOP
SAED0012901 Silver
6 LD1 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD10 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD11 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD12 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD13 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD14 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD15 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD16 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 258 -
LevelLocation
No.Description Part Number Specification Color Remark
6 LD17 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD18 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD19 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD2 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD3 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD4 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD5 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD6 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD7 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD8 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 LD9 DIODE,LED,CHIP EDLH0006001 Blue ,1608 ,R/TP ,Blue SMD LED
6 R10 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R14 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R15 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R2 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R23 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R26 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R29 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R3 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R30 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R31 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R35 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R36 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R37 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R38 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R39 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R4 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R40 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R5 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 R6 RES,CHIP ERHY0000223 150 ohm,1/16W,J,1005,R/TP
6 TVS4 DIODE,TVS EDTY0008501 TFSC ,5 V,50 W,R/TP ,small size
6 TVS5 DIODE,TVS EDTY0008501 TFSC ,5 V,50 W,R/TP ,small size
6 TVS6 DIODE,TVS EDTY0008501 TFSC ,5 V,50 W,R/TP ,small size
5 SPEY00 PCB,KEYPAD SPEY0035701 FR-4 ,0.5 mm,DOUBLE ,
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 259 -
LevelLocation
No.Description Part Number Specification Color Remark
3 SAFY00 PCB ASSY,MAIN SAFY0134601 Silver 54
4 SAFB00 PCB ASSY,MAIN,INSERT SAFB0053501 Green
5 SBCL00 BATTERY,CELL,LITHIUM SBCL0001303 2 V,1 mAh,COIN ,SOLDER TYPE BACKUP BATTERY
4 SAFF00 PCB ASSY,MAIN,SMT SAFF0059401 Silver
5 SAFC00PCB ASSY,MAIN,SMTBOTTOM
SAFC0065801 Green
6 ANT601 ANTENNA,GSM,FIXED SNGF0008301 3.0 ,-2.0 dBd, ,bluetooth_chip, 9.0x3.0x1.5
6 B201 X-TAL EXXY0016801 13 MHz,19 PPM,10 pF,40 ohm,SMD ,5*3.20*0.7 ,
6 C101 CAP,CERAMIC,CHIP ECCH0000173 1.2 pF,16V ,B ,NP0 ,TC ,1005 ,R/TP
6 C102 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C103 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
6 C104 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C105 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C106 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C107 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C108 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C109 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C110 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C112 CAP,CERAMIC,CHIP ECCH0000161 33 nF,16V,K,X7R,HD,1005,R/TP
6 C113 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C114 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C117 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C1899 CAP,CERAMIC,CHIP ECCH0006201 4.7 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP
6 C1915 CAP,CERAMIC,CHIP ECCH0006201 4.7 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP
6 C1916 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C1917 CAP,CERAMIC,CHIP ECCH0000276 1 uF,10V,Z,Y5V,HD,1608,R/TP
6 C1918 CAP,CHIP,MAKER ECZH0003501 1 uF,6.3V ,K ,X5R ,HD ,1608 ,R/TP
6 C201 CAP,CERAMIC,CHIP ECCH0000117 27 pF,50V,J,NP0,TC,1005,R/TP
6 C202 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C203 CAP,CERAMIC,CHIP ECCH0000117 27 pF,50V,J,NP0,TC,1005,R/TP
6 C204 CAP,CERAMIC,CHIP ECCH0000147 2.2 nF,50V,K,X7R,HD,1005,R/TP
6 C206 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C207 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C208 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C209 CAP,CERAMIC,CHIP ECCH0000180 3.3 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 260 -
LevelLocation
No.Description Part Number Specification Color Remark
6 C210 CAP,CERAMIC,CHIP ECCH0000180 3.3 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP
6 C211 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C212 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C214 CAP,CERAMIC,CHIP ECCH0000167 0.1 uF,6.3V,K,X5R,HD,1005,R/TP
6 C215 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C216 CAP,CERAMIC,CHIP ECCH0000138 390 pF,50V,K,X7R,HD,1005,R/TP
6 C217 CAP,CERAMIC,CHIP ECCH0000152 5.6 nF,25V,K,X7R,HD,1005,R/TP
6 C218 CAP,CERAMIC,CHIP ECCH0000147 2.2 nF,50V,K,X7R,HD,1005,R/TP
6 C219 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C220 CAP,CERAMIC,CHIP ECCH0000701 1.2 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP
6 C221 CAP,CERAMIC,CHIP ECCH0000127 82 pF,50V,J,NP0,TC,1005,R/TP
6 C222 CAP,CERAMIC,CHIP ECCH0000147 2.2 nF,50V,K,X7R,HD,1005,R/TP
6 C223 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C224 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C225 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C226 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C227 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C228 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C229 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C230 CAP,CERAMIC,CHIP ECCH0000137 330 pF,50V ,K ,X7R ,HD ,1005 ,R/TP
6 C231 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 C232 CAP,CERAMIC,CHIP ECCH0000181 4.7 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP
6 C233 CAP,CERAMIC,CHIP ECCH0000124 56 pF,50V,J,NP0,TC,1005,R/TP
6 C234 CAP,CERAMIC,CHIP ECCH0000175 2.7 pF,50V ,B ,NP0 ,TC ,1005 ,R/TP
6 C235 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C236 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C237 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C238 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C239 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C240 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C313 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C314 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C315 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C316 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 261 -
LevelLocation
No.Description Part Number Specification Color Remark
6 C317 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C318 CAP,CERAMIC,CHIP ECCH0000128 100 pF,50V,J,NP0,TC,1005,R/TP
6 C319 CAP,CERAMIC,CHIP ECCH0000181 4.7 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP
6 C320 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
6 C321 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
6 C322 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C323 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C324 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C325 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C326 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C327 CAP,CERAMIC,CHIP ECCH0000105 4 pF,50V,C,NP0,TC,1005,R/TP
6 C328 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 C330 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C331 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C332 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C333 CAP,CERAMIC,CHIP ECCH0000128 100 pF,50V,J,NP0,TC,1005,R/TP
6 C334 CAP,CERAMIC,CHIP ECCH0000130 150 pF,50V ,J ,SL ,TC ,1005 ,R/TP
6 C335 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C336 CAP,CERAMIC,CHIP ECCH0000149 3.3 nF,50V,K,X7R,HD,1005,R/TP
6 C337 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C401 CAP,CERAMIC,CHIP ECCH0000130 150 pF,50V ,J ,SL ,TC ,1005 ,R/TP
6 C402 CAP,CERAMIC,CHIP ECCH0000128 100 pF,50V,J,NP0,TC,1005,R/TP
6 C403 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C404 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C405 CAP,CERAMIC,CHIP ECCH0000128 100 pF,50V,J,NP0,TC,1005,R/TP
6 C406 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
6 C408 CAP,CERAMIC,CHIP ECCH0000128 100 pF,50V,J,NP0,TC,1005,R/TP
6 C410 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
6 C411 INDUCTOR,CHIP ELCH0005001 2.2 nH,S ,1005 ,R/TP ,
6 C412 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
6 C420 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C422 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C423 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C424 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 262 -
LevelLocation
No.Description Part Number Specification Color Remark
6 C507 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 C514 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C515 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 C516 CAP,CERAMIC,CHIP ECCH0000165 68 nF,6.3V,K,X5R,HD,1005,R/TP
6 C518 CAP,CERAMIC,CHIP ECCH0000165 68 nF,6.3V,K,X5R,HD,1005,R/TP
6 C520 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 C521 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C522 CAP,TANTAL,CHIP ECTH0002702 1 uF,16V ,M ,STD ,1608 ,R/TP
6 C523 CAP,CERAMIC,CHIP ECCH0000279 0.47 uF,10V ,Z ,Y5V ,HD ,1608 ,R/TP
6 C527 CAP,CHIP,MAKER ECZH0026301 4.7 uF,6.3V ,Z ,Y5V ,HD ,1608 ,R/TP
6 C531 CAP,CERAMIC,CHIP ECCH0000276 1 uF,10V,Z,Y5V,HD,1608,R/TP
6 C532 CAP,CERAMIC,CHIP ECCH0000276 1 uF,10V,Z,Y5V,HD,1608,R/TP
6 C533 CAP,CERAMIC,CHIP ECCH0000276 1 uF,10V,Z,Y5V,HD,1608,R/TP
6 C534 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C535 CAP,CERAMIC,CHIP ECCH0000165 68 nF,6.3V,K,X5R,HD,1005,R/TP
6 C536 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C537 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 C538 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C539 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C541 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C542 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C543 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C544 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C545 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C546 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C547 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C548 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C549 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C550 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C551 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C552 CAP,CERAMIC,CHIP ECCH0000139 470 pF,50V,K,X7R,HD,1005,R/TP
6 C553 CAP,CERAMIC,CHIP ECCH0000276 1 uF,10V,Z,Y5V,HD,1608,R/TP
6 C556 CAP,CERAMIC,CHIP ECCH0000143 1 nF,50V,K,X7R,HD,1005,R/TP
6 C557 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 263 -
LevelLocation
No.Description Part Number Specification Color Remark
6 C576 CAP,CERAMIC,CHIP ECCH0005801 2.2 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP
6 C588 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C591 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C595 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C596 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C597 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C598 CAP,CERAMIC,CHIP ECCH0000139 470 pF,50V,K,X7R,HD,1005,R/TP
6 C599 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C600 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C640 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C641 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C642 CAP,CERAMIC,CHIP ECCH0000128 100 pF,50V,J,NP0,TC,1005,R/TP
6 C643 CAP,CERAMIC,CHIP ECCH0000128 100 pF,50V,J,NP0,TC,1005,R/TP
6 C645 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C646 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C647 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C705 CAP,CERAMIC,CHIP ECCH0000114 20 pF,50V,J,NP0,TC,1005,R/TP
6 C706 CAP,CERAMIC,CHIP ECCH0000114 20 pF,50V,J,NP0,TC,1005,R/TP
6 C708 CAP,CERAMIC,CHIP ECCH0005801 2.2 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP
6 C709 CAP,CERAMIC,CHIP ECCH0005801 2.2 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP
6 C710 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C711 CAP,CERAMIC,CHIP ECCH0005801 2.2 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP
6 C712 CAP,CERAMIC,CHIP ECCH0005801 2.2 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP
6 C713 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C714 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C715 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C716 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C717 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C718 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C719 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C720 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C721 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C722 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C723 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 264 -
LevelLocation
No.Description Part Number Specification Color Remark
6 C724 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C725 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C726 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 C727 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C728 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C729 CAP,CERAMIC,CHIP ECCH0000137 330 pF,50V ,K ,X7R ,HD ,1005 ,R/TP
6 C730 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C731 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C732 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C733 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C734 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C735 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C736 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C737 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C738 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C740 CAP,TANTAL,CHIP,MAKER ECTZ0000318 33 uF,10V ,M ,STD ,3216 ,R/TP
6 C741 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C742 CAP,CERAMIC,CHIP ECCH0000276 1 uF,10V,Z,Y5V,HD,1608,R/TP
6 C743 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 CN601 CONN,RF SWITCH ENWY0000401 STRAIGHT ,SMD ,0.1 dB,3*3*1.8 / 500 CYCLES
6 CN701CONNECTOR,BOARD TOBOARD
ENBY0022501 50 PIN,0.4 mm,ETC , ,H=0.9, Socket
6 CN702CONNECTOR,BOARD TOBOARD
ENBY0025501 26 PIN,0.4 mm,ETC , ,H=0.9, Socket
6 D701 IC EUSY0135201u181 BGA ,181 PIN,R/TP ,ASIC / WCDMA AIR INTERFACE/ WANDA
6 D703 DIODE,SWITCHING EDSY0009901 ESC ,80 V,300 A,R/TP ,1.6*0.8*0.6(t)
6 FB501 FILTER,BEAD,CHIP SFBH0008901 30 ohm,2012 ,3000mA, BEAD for LARGE CURRENT
6 FB502 FILTER,BEAD,CHIP SFBH0008901 30 ohm,2012 ,3000mA, BEAD for LARGE CURRENT
6 FB503 FILTER,BEAD,CHIP SFBH0008901 30 ohm,2012 ,3000mA, BEAD for LARGE CURRENT
6 FB504 FILTER,BEAD,CHIP SFBH0008901 30 ohm,2012 ,3000mA, BEAD for LARGE CURRENT
6 FB505 FILTER,BEAD,CHIP SFBH0002302 120 ohm,1608 ,CHIP BEAD, 2000mA
6 FL101 FILTER,SEPERATOR SFAY0004601, , dB, dB, dB, dB,ETC ,16 PIN / 4.2*3.5*1.4 / GSM-WCDMASP6T
6 FL201 FILTER,SAW SFSY0024402 2140 MHz,2.0*1.6*0.6 ,SMD ,6pin, Unbal-Bal, 50//200
6 FL301 FILTER,SAW SFSY0024401 1950 MHz,2.0*1.6*0.6 ,SMD ,6pin, Bal-Unbal, 200//50
6 FL401 FILTER,EMI/POWER SFEY0006501 SMD ,3 TERMINAL EMI FILTER
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 265 -
LevelLocation
No.Description Part Number Specification Color Remark
6 FL702 FILTER,EMI/POWER SFEY0006701 SMD ,CSP, 20 Ball 8ch EMI Filter /w ESD,Pb-free
6 FL705 FILTER,EMI/POWER SFEY0007801SMD ,4ch(2.0*1.25), 200MHz, 1000Mohm, 10V, 100mA,(29nH,47pF)
6 FL706 FILTER,EMI/POWER SFEY0007801SMD ,4ch(2.0*1.25), 200MHz, 1000Mohm, 10V, 100mA,(29nH,47pF)
6 L101 INDUCTOR,CHIP ELCH0005010 1.8 nH,S ,1005 ,R/TP ,
6 L102 INDUCTOR,CHIP ELCH0001030 8.2 nH,J ,1005 ,R/TP ,PB-FREE
6 L103 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 L104 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 L105 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 L201 INDUCTOR,CHIP ELCH0001425 82 nH,J ,1005 ,R/TP ,PBFREE
6 L202 INDUCTOR,CHIP ELCH0001425 82 nH,J ,1005 ,R/TP ,PBFREE
6 L203 INDUCTOR,CHIP ELCH0001407 5.6 nH,S ,1005 ,R/TP ,PBFREE
6 L204 INDUCTOR,CHIP ELCH0005001 2.2 nH,S ,1005 ,R/TP ,
6 L207 INDUCTOR,CHIP ELCH0001511 100 nH,J ,1608 ,R/TP ,PBFREE
6 L208 INDUCTOR,CHIP ELCH0003811 1000 nH,K ,1608 ,R/TP ,COIL TYPE
6 L305 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 L307 INDUCTOR,CHIP ELCH0001407 5.6 nH,S ,1005 ,R/TP ,PBFREE
6 L308 INDUCTOR,CHIP ELCH0001001 10 nH,J ,1005 ,R/TP ,Pb Free
6 L309 INDUCTOR,CHIP ELCH0001407 5.6 nH,S ,1005 ,R/TP ,PBFREE
6 L310 INDUCTOR,CHIP ELCH0001401 15 nH,J ,1005 ,R/TP ,Pb Free
6 L311 INDUCTOR,CHIP ELCH0001401 15 nH,J ,1005 ,R/TP ,Pb Free
6 L401 FILTER,BEAD,CHIP SFBH0008101 600 ohm,1005 ,
6 L402 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 L501 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 L502 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 L503 INDUCTOR,SMD,POWER ELCP0009402 22 uH,M ,2.8*2.6*1.0 ,R/TP ,power inductor
6 L601 INDUCTOR,CHIP ELCH0005005 27 nH,J ,1005 ,R/TP ,
6 L602 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
6 L701 IC EUSY0163501SOT323-6L ,6 PIN,R/TP ,EMI FILTER & LINETERMINATION for USB
6 L702 FILTER,BEAD,CHIP SFBH0002302 120 ohm,1608 ,CHIP BEAD, 2000mA
6 N101 IC EUSY0122502 LLP-6 ,6 PIN,R/TP ,300mA CMOS LDO / 2.8V, Pb-free
6 N201 IC EUSY0133001 uBGA ,56 PIN,R/TP ,U8000 RF IC
6 N304 IC EUSY0132901 56 ,56 PIN,R/TP ,WCDMA TXIC Wivi
6 N401 PAM SMPY0007101dBm, %, mA, dBc, dB,6*6*1.25 ,SMD ,PAM for TRI-BAND(EGSM/GPRS)
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 266 -
LevelLocation
No.Description Part Number Specification Color Remark
6 N503 IC EUSY0132701u143 BGA ,143 PIN,R/TP ,ASIC / POWER MANAGEMENTIC / VINCENNE
6 N702 IC EUSY0153001 SOT23-5 ,5 PIN,R/TP ,150 mA LDO REGULATOR / 1.5V
6 PT501 THERMISTOR SETY0005701 NTC ,47000 ohm,SMD ,F, Pb Free
6 Q501 TR,FET,P-CHANNEL EQFP0005601POWERPAK 1212-8 ,0.8 W,20 V,5.4 A,R/TP ,P-CHANNEL20V (D-S) MOSFET
6 Q502 TR,FET,P-CHANNEL EQFP0003601SOT-363 ,.27 W,20 V,.66 A,R/TP ,Dual(P-channel:PD=0.27W,VDS=-8V,ID=0.57, Pb free
6 Q702 TR,BJT,NPN EQBN0014901 SOT323 ,.2 W,R/TP ,NPN SWITCHING TR, Pb free
6 Q703 TR,BJT,PNP EQBP0003001 UMT6 ,.15 W,R/TP ,
6 R101 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R102 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R103 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R104 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R105 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R106 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R201 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R202 RES,CHIP ERHY0000250 3.3K ohm,1/16W,J,1005,R/TP
6 R203 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 R204 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 R205 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R206 RES,CHIP ERHY0000255 5.6K ohm,1/16W,J,1005,R/TP
6 R207 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R208 RES,CHIP ERHY0000220 100 ohm,1/16W,J,1005,R/TP
6 R209 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R210 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R212 RES,CHIP ERHY0000241 1K ohm,1/16W,J,1005,R/TP
6 R2126 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R2127 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R2129 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R2132 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R2135 RES,CHIP ERHY0000160 180K ohm,1/16W,F,1005,R/TP
6 R2138 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R215 RES,CHIP ERHY0000203 10 ohm,1/16W,J,1005,R/TP
6 R2150 RES,CHIP ERHY0000714 .51 ohm,1/4W ,J ,2012 ,R/TP
6 R216 RES,CHIP ERHY0000261 10K ohm,1/16W,J,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 267 -
LevelLocation
No.Description Part Number Specification Color Remark
6 R217 RES,CHIP ERHY0000261 10K ohm,1/16W,J,1005,R/TP
6 R2171 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R2179 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 R2186 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 R2191 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R2192 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R2194 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R2196 RES,CHIP ERHY0000226 220 ohm,1/16W,J,1005,R/TP
6 R2197 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R220 RES,CHIP ERHY0000203 10 ohm,1/16W,J,1005,R/TP
6 R2205 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R221 RES,CHIP ERHY0000203 10 ohm,1/16W,J,1005,R/TP
6 R2225 RES,CHIP ERHY0008701 0.22 ohm,1/4W ,J ,2012 ,R/TP
6 R2236 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R2237 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R2238 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R2239 RES,CHIP ERHY0000261 10K ohm,1/16W,J,1005,R/TP
6 R2251 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R309 RES,CHIP ERHY0000203 10 ohm,1/16W,J,1005,R/TP
6 R310 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R311 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R312 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R313 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R314 RES,CHIP ERHY0000111 680 ohm,1/16W,F,1005,R/TP
6 R315 RES,CHIP ERHY0000111 680 ohm,1/16W,F,1005,R/TP
6 R316 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R317 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R318 RES,CHIP ERHY0000254 4.7K ohm,1/16W,J,1005,R/TP
6 R319 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R320 RES,CHIP ERHY0000203 10 ohm,1/16W,J,1005,R/TP
6 R401 RES,CHIP ERHY0000241 1K ohm,1/16W,J,1005,R/TP
6 R402 RES,CHIP,MAKER ERHZ0000459 3 Kohm,1/16W ,J ,1005 ,R/TP
6 R403 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R407 RES,CHIP ERHY0008601 0.05 ohm,1/4W ,J ,2012 ,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 268 -
LevelLocation
No.Description Part Number Specification Color Remark
6 R408 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R413 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R503 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R504 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R505 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R506 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R510 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R511 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R512 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R516 RES,CHIP ERHY0000220 100 ohm,1/16W,J,1005,R/TP
6 R517 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R518 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R519 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R520 RES,CHIP ERHY0000220 100 ohm,1/16W,J,1005,R/TP
6 R521 RES,CHIP ERHY0000266 22K ohm,1/16W,J,1005,R/TP
6 R522 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R523 RES,CHIP ERHY0000241 1K ohm,1/16W,J,1005,R/TP
6 R526 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R527 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R528 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R535 RES,CHIP ERHY0000241 1K ohm,1/16W,J,1005,R/TP
6 R536 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R538 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R540 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R541 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R542 RES,CHIP ERHY0000263 15K ohm,1/16W,J,1005,R/TP
6 R543 RES,CHIP ERHY0000213 47 ohm,1/16W,J,1005,R/TP
6 R544 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R545 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R546 RES,CHIP ERHY0000261 10K ohm,1/16W,J,1005,R/TP
6 R547 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R548 RES,CHIP ERHY0000202 4.7 ohm,1/16W,J,1005,R/TP
6 R549 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R550 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 269 -
LevelLocation
No.Description Part Number Specification Color Remark
6 R551 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R552 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R553 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R554 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R555 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R556 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R557 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R558 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R559 RES,CHIP ERHY0000266 22K ohm,1/16W,J,1005,R/TP
6 R560 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R561 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R562 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R563 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R564 RES,CHIP ERHY0000401 0 ohm,1/16W,J,1608,R/TP
6 R565 RES,CHIP,MAKER ERHZ0000319 8200 ohm,1/16W ,F ,1005 ,R/TP
6 R570 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R593 RES,CHIP ERHY0008701 0.22 ohm,1/4W ,J ,2012 ,R/TP
6 R599 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R600 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R648 RES,CHIP ERHY0001302 1 ohm,1/8W,J,2012,R/TP
6 R650 RES,CHIP ERHY0000266 22K ohm,1/16W,J,1005,R/TP
6 R651 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R652 RES,CHIP ERHY0000282 120K ohm,1/16W,J,1005,R/TP
6 R656 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
6 R701 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R702 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R704 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R706 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R708 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R714 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R715 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R716 RES,CHIP ERHY0000214 51 ohm,1/16W,J,1005,R/TP
6 R717 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R718 RES,CHIP ERHY0000214 51 ohm,1/16W,J,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 270 -
LevelLocation
No.Description Part Number Specification Color Remark
6 R721 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R724 RES,CHIP ERHY0000261 10K ohm,1/16W,J,1005,R/TP
6 R725 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R726 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R730 RES,CHIP ERHY0000261 10K ohm,1/16W,J,1005,R/TP
6 R731 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R732 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R733 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R735 RES,CHIP ERHY0000262 12K ohm,1/16W,J,1005,R/TP
6 R736 RES,CHIP,MAKER ERHZ0000459 3 Kohm,1/16W ,J ,1005 ,R/TP
6 R737 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R738 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R739 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R740 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R744 RES,CHIP ERHY0000250 3.3K ohm,1/16W,J,1005,R/TP
6 R745 RES,CHIP ERHY0000249 2.7K ohm,1/16W,J,1005,R/TP
6 R747 RES,CHIP ERHY0000143 43K ohm,1/16W,F,1005,R/TP
6 R748 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R749 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R752 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R753 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R754 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R755 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R756 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R757 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R758 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R843 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R847 RES,CHIP ERHY0008601 0.05 ohm,1/4W ,J ,2012 ,R/TP
6 R875 RES,CHIP ERHY0008601 0.05 ohm,1/4W ,J ,2012 ,R/TP
6 R878 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R899 RES,CHIP ERHY0008602 0.1 ohm,1/4W ,J ,2012 ,R/TP
6 U501 IC EUSY0232802 sot 23-5 ,5 PIN,R/TP ,2.8V,150mA LDO
6 U503 IC EUSY0232802 sot 23-5 ,5 PIN,R/TP ,2.8V,150mA LDO
6 U506 IC EUSY0275401 SOT23-5 ,5 PIN,R/TP ,150mA, 2.4V, 80dB, LDO, PBFREE
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 271 -
LevelLocation
No.Description Part Number Specification Color Remark
6 U510 IC EUSY0232815 SOT23-5 ,5 PIN,R/TP ,2.85V,300mA,LDO,PBFREE
6 U604 IC EUSY0212002HVQFN ,52 PIN,R/TP ,BLUETOOTH RADIO MODULEWITH BASEBAND CONTROLLER_Pb free
6 U701 IC EUSY0188103 QFN ,24 PIN,R/TP ,MAIN+FLASH UPTO400mAcontinuous
6 V201 DIODE,VARIABLE CAP EDVY0001801 SCD80 ,0.09 pF,R/TP ,
6 V501 DIODE,TVS EDTY0007001 SOT23-6 ,9 V, W,R/TP ,TVS DIODE ARRAY
6 V502 DIODE,SWITCHING EDSY0011901EMD2 ,30 V,1 A,R/TP ,VF=1.5V(IF=200mA) ,IR=30uA(VR=10V)
6 V503 DIODE,SWITCHING EDSY0011901EMD2 ,30 V,1 A,R/TP ,VF=1.5V(IF=200mA) ,IR=30uA(VR=10V)
6 V701 DIODE,TVS EDTY0006401 SC70-6L ,5 V,100 W,R/TP ,PB-FREE
6 W101 CONN,RF SWITCH ENWY0003301 ,SMD ,0.4 dB,
6 X502 CONN,SOCKET ENSY00099018 PIN,ETC ,SMD ,2.54 mm,2.2T UIM CONNECTOR WITHBRIDGE
6 X701 CONN,RECEPTACLE ENEY0004101 24 PIN,3 , ,25.3*10*(3+1.5)T
6 Z201 FILTER,SAW SFSY0012502 190 MHz,3.8*3.8*1.2 ,SMD ,6pin, Bal-Bal, 1000//1000
5 SAFD00 PCB ASSY,MAIN,SMT TOP SAFD0064901
6 B301 IC EUSY0067201 MAA05A ,5 PIN,R/TP ,2.4V,10uA, TEMP SENSOR(Pb Free)
6 B601 X-TAL EXXY0004602.032768 MHz,20 PPM,12.5 pF,65000 ohm,SMD,6.9*1.4*1.3 ,
6 C111 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C115 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C116 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C1930 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C1931 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C1932 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C1933 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C301 CAP,CERAMIC,CHIP ECCH0000137 330 pF,50V ,K ,X7R ,HD ,1005 ,R/TP
6 C302 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C303 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C304 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C305 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C306 CAP,CERAMIC,CHIP ECCH0000143 1 nF,50V,K,X7R,HD,1005,R/TP
6 C307 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
6 C308 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C309 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 272 -
LevelLocation
No.Description Part Number Specification Color Remark
6 C310 CAP,CERAMIC,CHIP ECCH0000167 0.1 uF,6.3V,K,X5R,HD,1005,R/TP
6 C311 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C312 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C413 CAP,CERAMIC,CHIP ECCH0000165 68 nF,6.3V,K,X5R,HD,1005,R/TP
6 C414 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C415 CAP,CERAMIC,CHIP ECCH0000165 68 nF,6.3V,K,X5R,HD,1005,R/TP
6 C416 CAP,CERAMIC,CHIP ECCH0000165 68 nF,6.3V,K,X5R,HD,1005,R/TP
6 C417 CAP,CERAMIC,CHIP ECCH0000165 68 nF,6.3V,K,X5R,HD,1005,R/TP
6 C418 CAP,CERAMIC,CHIP ECCH0000165 68 nF,6.3V,K,X5R,HD,1005,R/TP
6 C419 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C425 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C426 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C427 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C428 CAP,CERAMIC,CHIP ECCH0000111 12 pF,50V,J,NP0,TC,1005,R/TP
6 C429 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
6 C430 CAP,CERAMIC,CHIP ECCH0000901 2.2 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP
6 C431 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
6 C432 CAP,CERAMIC,CHIP ECCH0000901 2.2 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP
6 C433 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C434 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C435 CAP,CERAMIC,CHIP ECCH0000175 2.7 pF,50V ,B ,NP0 ,TC ,1005 ,R/TP
6 C436 CAP,CERAMIC,CHIP ECCH0000175 2.7 pF,50V ,B ,NP0 ,TC ,1005 ,R/TP
6 C437 INDUCTOR,CHIP ELCH0001033 1.5 nH,S ,1005 ,R/TP ,PBFREE
6 C438 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C439 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C440 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C441 CAP,CERAMIC,CHIP ECCH0000143 1 nF,50V,K,X7R,HD,1005,R/TP
6 C442 CAP,CERAMIC,CHIP ECCH0000143 1 nF,50V,K,X7R,HD,1005,R/TP
6 C443 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C444 CAP,CERAMIC,CHIP ECCH0000146 1.8 nF,50V,K,X7R,HD,1005,R/TP
6 C445 CAP,CERAMIC,CHIP ECCH0000144 1.2 nF,50V,K,X7R,HD,1005,R/TP
6 C447 CAP,CERAMIC,CHIP ECCH0000140 560 pF,50V,K,X7R,HD,1005,R/TP
6 C448 CAP,CERAMIC,CHIP ECCH0000137 330 pF,50V ,K ,X7R ,HD ,1005 ,R/TP
6 C449 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 273 -
LevelLocation
No.Description Part Number Specification Color Remark
6 C450 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C451 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C452 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C453 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
6 C454 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
6 C501 CAP,TANTAL,CHIP ECTH0002702 1 uF,16V ,M ,STD ,1608 ,R/TP
6 C502 CAP,TANTAL,CHIP ECTH0002702 1 uF,16V ,M ,STD ,1608 ,R/TP
6 C503 CAP,CERAMIC,CHIP ECCH0000279 0.47 uF,10V ,Z ,Y5V ,HD ,1608 ,R/TP
6 C504 CAP,CERAMIC,CHIP ECCH0005801 2.2 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP
6 C508 CAP,CERAMIC,CHIP ECCH0006201 4.7 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP
6 C509 CAP,CERAMIC,CHIP ECCH0000128 100 pF,50V,J,NP0,TC,1005,R/TP
6 C510 CAP,CERAMIC,CHIP ECCH0005801 2.2 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP
6 C511 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP
6 C512 CAP,CERAMIC,CHIP ECCH0000276 1 uF,10V,Z,Y5V,HD,1608,R/TP
6 C513 CAP,CHIP,MAKER ECZH0003501 1 uF,6.3V ,K ,X5R ,HD ,1608 ,R/TP
6 C517 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C519 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C524 CAP,CERAMIC,CHIP ECCH0002003 33 nF,16V ,K ,B ,TC ,1005 ,R/TP
6 C525 CAP,CERAMIC,CHIP ECCH0000126 68 pF,50V,J,NP0,TC,1005,R/TP
6 C526 CAP,CERAMIC,CHIP ECCH0002003 33 nF,16V ,K ,B ,TC ,1005 ,R/TP
6 C528 CAP,CERAMIC,CHIP ECCH0002003 33 nF,16V ,K ,B ,TC ,1005 ,R/TP
6 C529 CAP,CERAMIC,CHIP ECCH0000126 68 pF,50V,J,NP0,TC,1005,R/TP
6 C554 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C555 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C558 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 C559 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 C560 CAP,CERAMIC,CHIP ECCH0002003 33 nF,16V ,K ,B ,TC ,1005 ,R/TP
6 C561 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C562 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C563 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C564 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C566 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C567 CAP,CERAMIC,CHIP ECCH0000165 68 nF,6.3V,K,X5R,HD,1005,R/TP
6 C568 CAP,CERAMIC,CHIP ECCH0000165 68 nF,6.3V,K,X5R,HD,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 274 -
LevelLocation
No.Description Part Number Specification Color Remark
6 C570 CAP,CERAMIC,CHIP ECCH0000126 68 pF,50V,J,NP0,TC,1005,R/TP
6 C571 CAP,CERAMIC,CHIP ECCH0000126 68 pF,50V,J,NP0,TC,1005,R/TP
6 C572 CAP,TANTAL,CHIP ECTH0002702 1 uF,16V ,M ,STD ,1608 ,R/TP
6 C573 CAP,TANTAL,CHIP ECTH0002702 1 uF,16V ,M ,STD ,1608 ,R/TP
6 C574 CAP,CERAMIC,CHIP ECCH0000276 1 uF,10V,Z,Y5V,HD,1608,R/TP
6 C575 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C577 CAP,CERAMIC,CHIP ECCH0004903 1 uF,6.3V ,Z ,Y5V ,TC ,1005 ,R/TP
6 C578 CAP,CERAMIC,CHIP ECCH0000148 2.7 nF,50V,K,X7R,HD,1005,R/TP
6 C579 CAP,CERAMIC,CHIP ECCH0000149 3.3 nF,50V,K,X7R,HD,1005,R/TP
6 C580 CAP,CHIP,MAKER ECZH0003501 1 uF,6.3V ,K ,X5R ,HD ,1608 ,R/TP
6 C581 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
6 C582 CAP,CERAMIC,CHIP ECCH0000151 4.7 nF,25V,K,X7R,HD,1005,R/TP
6 C584 CAP,TANTAL,CHIP,MAKER ECTZ0005501 100 uF,6.3V ,M ,STD ,ETC ,R/TP
6 C585 CAP,TANTAL,CHIP,MAKER ECTZ0005501 100 uF,6.3V ,M ,STD ,ETC ,R/TP
6 C587 CAP,CERAMIC,CHIP ECCH0000149 3.3 nF,50V,K,X7R,HD,1005,R/TP
6 C589 CAP,CERAMIC,CHIP ECCH0000151 4.7 nF,25V,K,X7R,HD,1005,R/TP
6 C590 CAP,CERAMIC,CHIP ECCH0005705 10 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP
6 C592 CAP,TANTAL,CHIP,MAKER ECTZ0005501 100 uF,6.3V ,M ,STD ,ETC ,R/TP
6 C593 CAP,TANTAL,CHIP,MAKER ECTZ0005501 100 uF,6.3V ,M ,STD ,ETC ,R/TP
6 C601 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C602 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C603 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C604 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C605 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C606 CAP,CERAMIC,CHIP ECCH0000137 330 pF,50V ,K ,X7R ,HD ,1005 ,R/TP
6 C607 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C608 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP
6 C609 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C610 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C611 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C612 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C613 CAP,CERAMIC,CHIP ECCH0000143 1 nF,50V,K,X7R,HD,1005,R/TP
6 C614 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C615 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 275 -
LevelLocation
No.Description Part Number Specification Color Remark
6 C616 CAP,CERAMIC,CHIP ECCH0000182 0.1 uF,10V ,K ,X5R ,HD ,1005 ,R/TP
6 C617 CAP,CERAMIC,CHIP ECCH0000182 0.1 uF,10V ,K ,X5R ,HD ,1005 ,R/TP
6 C618 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C619 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C620 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C621 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C622 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C623 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C624 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C625 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C626 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C627 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C628 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C629 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C630 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C631 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C632 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C633 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C634 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C635 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C636 CAP,CERAMIC,CHIP ECCH0000276 1 uF,10V,Z,Y5V,HD,1608,R/TP
6 C637 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C638 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C639 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C644 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 C739 CAP,CERAMIC,CHIP ECCH0000168 0.1 uF,16V,Z,Y5V,HD,1005,R/TP
6 CN502CONN,JACK/PLUG,EARPHONE
ENJE0003603 12 ,12 PIN,MMIC CONN.12P
6 CN703CONNECTOR,BOARD TOBOARD
ENBY0002103 24 PIN,.5 mm,STRAIGHT ,SILVER ,
6 D501 DIODE,SWITCHING EDSY0011901EMD2 ,30 V,1 A,R/TP ,VF=1.5V(IF=200mA) ,IR=30uA(VR=10V)
6 D601 IC EUSY0135001u289 BGA ,289 PIN,R/TP ,ASIC / BASEBANDCONTROLLER / MARITA
6 D702 DIODE,TVS EDTY0006401 SC70-6L ,5 V,100 W,R/TP ,PB-FREE
6 FB701 RES,CHIP,MAKER ERHZ0000608 10 ohm,1/10W ,F ,1608 ,R/TP
6 FB702 FILTER,BEAD,CHIP SFBH0002302 120 ohm,1608 ,CHIP BEAD, 2000mA
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 276 -
LevelLocation
No.Description Part Number Specification Color Remark
6 FL102 DUPLEXER,IMT SDMY00007011950 MHz,2140 MHz,1.45 dB,1.60 dB,41 dB,50dB,5.4*5.0*1.6 ,SMD ,
6 FL402 FILTER,SAW SFSY0024302 1842.5 MHz,1.4*1.1*0.6 ,SMD ,5pin, Unbal-Bal, 50//150
6 FL403 FILTER,SAW SFSY0024303 1960 MHz,1.4*1.1*0.6 ,SMD ,5pin, Unbal-Bal, 50//150
6 FL701 VARISTOR SEVY0005501 18 V, ,SMD ,4ch. R-Varistor Array(100Ohm,15pF)
6 FL703 VARISTOR SEVY0005501 18 V, ,SMD ,4ch. R-Varistor Array(100Ohm,15pF)
6 FL704 VARISTOR SEVY0005501 18 V, ,SMD ,4ch. R-Varistor Array(100Ohm,15pF)
6 L199 INDUCTOR,CHIP ELCH0005009 100 nH,J ,1005 ,R/TP ,
6 L301 FILTER,BEAD,CHIP SFBH0002302 120 ohm,1608 ,CHIP BEAD, 2000mA
6 L302 FILTER,BEAD,CHIP SFBH0002302 120 ohm,1608 ,CHIP BEAD, 2000mA
6 L303 FILTER,BEAD,CHIP SFBH0002302 120 ohm,1608 ,CHIP BEAD, 2000mA
6 L304 INDUCTOR,SMD,POWER ELCP0009401 4.7 uH,M ,2.8*2.6*1.0 ,R/TP ,
6 L403 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 L404 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 L405 INDUCTOR,CHIP ELCH0001413 22 nH,J ,1005 ,R/TP ,PBFREE
6 L406 INDUCTOR,CHIP ELCH0005006 33 nH,J ,1005 ,R/TP ,
6 L407 INDUCTOR,CHIP ELCH0005013 4.7 nH,S ,1005 ,R/TP ,
6 L408 INDUCTOR,CHIP ELCH0001408 6.8 nH,J ,1005 ,R/TP ,Pb Free
6 L409 INDUCTOR,CHIP ELCH0005013 4.7 nH,S ,1005 ,R/TP ,
6 L410 INDUCTOR,CHIP ELCH0001401 15 nH,J ,1005 ,R/TP ,Pb Free
6 L411 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 L412 INDUCTOR,CHIP ELCH0007404 5.6 uH,K ,1608 ,R/TP ,
6 L413 INDUCTOR,CHIP ELCH0007403 100 uH,K ,2012 ,R/TP ,
6 L414 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 L415 INDUCTOR,CHIP ELCH0001402 18 nH,J ,1005 ,R/TP ,Pb Free
6 L416 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 N301 IC EUSY01360013 X 4 UCSP ,10 PIN,R/TP ,600 mA BUCK REGULATORS /DYNAMIC OUTPUT VOLTAGE,PBFREE
6 N302 PAM SMPY0002801 26 dBm,40 %,83 A,-58 dBc,23.5 dB,8.0*6.0*1.4 ,SMD ,
6 N303 ISOLATOR,IMT SQMY0001001 1950 MHz,3.2*3.2*1.5 ,SMD ,1920~1980MHz
6 N402 IC EUSY0133103BGA ,64 PIN,R/TP ,6*6 mm, lead-free, Analog BasebandASIC
6 N403 TRANSFORMER,MATCHING STMY0018401 6 PIN,SMD ,DCS TX BALUN
6 N404 TRANSFORMER,MATCHING STMY0018402 6 PIN,SMD ,GSM Tx Balun
6 N405 IC EUSY0132801 56 ball ,56 PIN,R/TP ,RFIC
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 277 -
LevelLocation
No.Description Part Number Specification Color Remark
6 N501 IC EUSY0171302 SOT-23 ,5 PIN,R/TP ,150mA 3.3V LDO, Pb-free
6 N502 IC EUSY0153001 SOT23-5 ,5 PIN,R/TP ,150 mA LDO REGULATOR / 1.5V
6 N504 IC EUSY0171201CSP ,25 PIN,R/TP ,6 CHANNEL ESD FILTER, EMPSOLUTION, Pb-free
6 N701 IC EUSY0171401CSP ,20 PIN,R/TP ,7 CHANNEL ESD FILTER ARRAY,KNATTE, Pb-free
6 Q601 TR,BJT,NPN EQBN0014901 SOT323 ,.2 W,R/TP ,NPN SWITCHING TR, Pb free
6 Q602 TR,BJT,NPN EQBN0013301 2-2H1A ,.1 W,R/TP ,VEBO=6V, Pb free
6 Q701 TR,BJT,NPN EQBN0013701 EMT6 ,150 mW,R/TP ,DUAL TRANSISTORS
6 R2130 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R2131 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R2241 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R2248 RES,CHIP ERHY0000216 68 ohm,1/16W,J,1005,R/TP
6 R2249 RES,CHIP ERHY0000216 68 ohm,1/16W,J,1005,R/TP
6 R2250 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R2252 RES,CHIP ERHY0000261 10K ohm,1/16W,J,1005,R/TP
6 R2253 RES,CHIP ERHY0000261 10K ohm,1/16W,J,1005,R/TP
6 R301 RES,CHIP ERHY0000138 33K ohm,1/16W,F,1005,R/TP
6 R302 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R303 RES,CHIP ERHY0000271 39K ohm,1/16W,J,1005,R/TP
6 R306 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R307 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R308 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R404 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R405 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R406 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R409 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R410 RES,CHIP ERHY0000220 100 ohm,1/16W,J,1005,R/TP
6 R411 RES,CHIP ERHY0000220 100 ohm,1/16W,J,1005,R/TP
6 R412 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R414 RES,CHIP ERHY0000206 18 ohm,1/16W,J,1005,R/TP
6 R415 RES,CHIP ERHY0000228 270 ohm,1/16W,J,1005,R/TP
6 R416 RES,CHIP ERHY0000228 270 ohm,1/16W,J,1005,R/TP
6 R417 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R418 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 278 -
LevelLocation
No.Description Part Number Specification Color Remark
6 R420 INDUCTOR,CHIP ELCH0005015 6.8 nH,S ,1005 ,R/TP ,
6 R421 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R422 INDUCTOR,CHIP ELCH0005015 6.8 nH,S ,1005 ,R/TP ,
6 R423 RES,CHIP ERHY0000220 100 ohm,1/16W,J,1005,R/TP
6 R424 RES,CHIP ERHY0000220 100 ohm,1/16W,J,1005,R/TP
6 R425 RES,CHIP ERHY0000235 560 ohm,1/16W,J,1005,R/TP
6 R426 RES,CHIP ERHY0000222 120 ohm,1/16W,J,1005,R/TP
6 R427 RES,CHIP ERHY0000231 390 ohm,1/16W,J,1005,R/TP
6 R428 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R429 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R430 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R431 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R501 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R502 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R507 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R508 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R509 RES,CHIP ERHY0000241 1K ohm,1/16W,J,1005,R/TP
6 R513 RES,CHIP ERHY0000274 51K ohm,1/16W,J,1005,R/TP
6 R514 RES,CHIP ERHY0000261 10K ohm,1/16W,J,1005,R/TP
6 R515 RES,CHIP ERHY0000261 10K ohm,1/16W,J,1005,R/TP
6 R524 RES,CHIP ERHY0000241 1K ohm,1/16W,J,1005,R/TP
6 R525 RES,CHIP ERHY0000241 1K ohm,1/16W,J,1005,R/TP
6 R529 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R530 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R531 RES,CHIP ERHY0000264 18K ohm,1/16W,J,1005,R/TP
6 R532 RES,CHIP ERHY0000264 18K ohm,1/16W,J,1005,R/TP
6 R533 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R534 RES,CHIP ERHY0000264 18K ohm,1/16W,J,1005,R/TP
6 R537 RES,CHIP ERHY0000264 18K ohm,1/16W,J,1005,R/TP
6 R539 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R566 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R567 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R569 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R572 RES,CHIP ERHY0000236 620 ohm,1/16W,J,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 279 -
LevelLocation
No.Description Part Number Specification Color Remark
6 R573 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R574 RES,CHIP ERHY0000236 620 ohm,1/16W,J,1005,R/TP
6 R576 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R577 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R578 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R579 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R580 CAP,CERAMIC,CHIP ECCH0002003 33 nF,16V ,K ,B ,TC ,1005 ,R/TP
6 R581 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R582 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R583 CAP,CERAMIC,CHIP ECCH0002003 33 nF,16V ,K ,B ,TC ,1005 ,R/TP
6 R584 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R585 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R586 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R587 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R588 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R589 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R590 RES,CHIP ERHY0000259 8.2K ohm,1/16W,J,1005,R/TP
6 R591 RES,CHIP ERHY0000282 120K ohm,1/16W,J,1005,R/TP
6 R592 RES,CHIP ERHY0000282 120K ohm,1/16W,J,1005,R/TP
6 R594 RES,CHIP ERHY0000254 4.7K ohm,1/16W,J,1005,R/TP
6 R595 RES,CHIP ERHY0000261 10K ohm,1/16W,J,1005,R/TP
6 R596 RES,CHIP ERHY0000282 120K ohm,1/16W,J,1005,R/TP
6 R597 RES,CHIP ERHY0000282 120K ohm,1/16W,J,1005,R/TP
6 R598 RES,CHIP ERHY0000254 4.7K ohm,1/16W,J,1005,R/TP
6 R601 RES,CHIP ERHY0000254 4.7K ohm,1/16W,J,1005,R/TP
6 R602 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R604 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R606 RES,CHIP ERHY0000213 47 ohm,1/16W,J,1005,R/TP
6 R608 RES,CHIP ERHY0000250 3.3K ohm,1/16W,J,1005,R/TP
6 R609 RES,CHIP ERHY0000250 3.3K ohm,1/16W,J,1005,R/TP
6 R610 RES,CHIP ERHY0000243 1.2K ohm,1/16W,J,1005,R/TP
6 R613 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R614 RES,CHIP ERHY0000233 470 ohm,1/16W,J,1005,R/TP
6 R615 RES,CHIP ERHY0000283 130K ohm,1/16W,J,1005,R/TP
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 280 -
LevelLocation
No.Description Part Number Specification Color Remark
6 R616 RES,CHIP ERHY0000213 47 ohm,1/16W,J,1005,R/TP
6 R617 RES,CHIP ERHY0000275 56K ohm,1/16W,J,1005,R/TP
6 R618 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R619 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R620 RES,CHIP ERHY0000275 56K ohm,1/16W,J,1005,R/TP
6 R621 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R626 RES,CHIP ERHY0000241 1K ohm,1/16W,J,1005,R/TP
6 R627 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R628 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R629 RES,CHIP ERHY0000201 0 ohm,1/16W,J,1005,R/TP
6 R630 RES,CHIP ERHY0000250 3.3K ohm,1/16W,J,1005,R/TP
6 R631 RES,CHIP ERHY0000220 100 ohm,1/16W,J,1005,R/TP
6 R634 RES,CHIP ERHY0000282 120K ohm,1/16W,J,1005,R/TP
6 R636 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R641 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R653 RES,CHIP ERHY0000292 470K ohm,1/16W,J,1005,R/TP
6 R654 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R655 RES,CHIP ERHY0000280 100K ohm,1/16W,J,1005,R/TP
6 R727 RES,CHIP ERHY0000204 12 ohm,1/16W,J,1005,R/TP
6 R741 RES,CHIP ERHY0000249 2.7K ohm,1/16W,J,1005,R/TP
6 R742 RES,CHIP ERHY0000204 12 ohm,1/16W,J,1005,R/TP
6 S601 CONN,SOCKET ENSY0014101 8 PIN,ETC , ,1.1 mm,T-Flash Memory Socket
6 U502 IC EUSY0232807 sot 23-5 ,5 PIN,R/TP ,1.8V,150mA LDO
6 U504 IC EUSY0160001MicroStar Junior ,15 PIN,R/TP ,1.1W Class-D Mono AudioAMP
6 U505 IC EUSY0160001MicroStar Junior ,15 PIN,R/TP ,1.1W Class-D Mono AudioAMP
6 U507 IC EUSY0175001FFP16 ,16 PIN,R/TP ,3D SURROUND AUDIOPROCESSOR
6 U508 IC EUSY0188601MICROBUMP ,10 PIN,R/TP ,Dual SPDT Analog switch(PbFree)
6 U509 IC EUSY0142501 LLP ,8 PIN,R/TP ,Dual 105mW Headphone Amplifier
6 U601 IC EUSY0163901uCSP ,10 PIN,R/TP ,Dual Analog Switch, 300MHzBandwidth
6 U602 IC EUSY0163901uCSP ,10 PIN,R/TP ,Dual Analog Switch, 300MHzBandwidth
6 U603 IC EUSY0211101SCSP ,88 PIN,ETC ,512M(256*2) MLC NOR +128M (64*2)PS/ 1.8V/ PB FREE
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 281 -
LevelLocation
No.Description Part Number Specification Color Remark
6 Z401 FILTER,SAW SFSY0024301 942.5 MHz,1.4*1.1*0.6 ,SMD ,5pin, Unbal-Bal, 50//150
5 SPFY PCB,MAIN SPFY0106301 FR-4 ,0.8 mm,STAGGERED-8 ,
3 SUMY00 MICROPHONE SUMY0010702 UNIT ,44 dB,4*1.5 ,spring type
10. EXPLODED VIEW & REPLACEMENT PART LIST
- 282 -
10.3 Accessory Note: This Chapter is used for reference, Part orderis ordered by SBOM standard on GCSC
LevelLocation
No.Description Part Number Specification Color Remark
3 MHBY00 HANDSTRAP MHBY0000404 Hand Strap 135mm Black
3 SBPL00 BATTERY PACK,LI-ION SBPL00722213.7 V,1400 mAh,1 CELL,PRISMATIC ,U8130 BATTERY(Li-Polymer) 1400mA(Typical)
Silver
3 SGDY00 DATA CABLE SGDY0005601 DK-40G ,K8000 24PIN I/O + USB A TYPE
3 SGEY00 EAR PHONE/EAR MIKE SET SGEY0003707 U880,8550 ,GRAY-AIR CAP,2.0TMMI12P 49
3 SSAD00 ADAPTOR,AC-DC SSAD0007848 FREE ,50 Hz,4.6 V,0.8 A,CE ,3G
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