TRENDS IN ATE INSTRUMENTS - Salland · Overview •Founded in 2012 by Former Members of the...
Transcript of TRENDS IN ATE INSTRUMENTS - Salland · Overview •Founded in 2012 by Former Members of the...
Company Confidential
TRENDS IN ATE INSTRUMENTS
VP – WW Sales and Marketing
Q3 - 2018
Chris Hartshorn
Visit Us Online at WWW.Elevatesemi.com
2 Company Confidentialwww.elevatesemi.com
Elevate Semiconductor Inc.
Overview
• Founded in 2012 by Former Members of the Intersil ATE
Products Division
• Small, Specialized Company Focused Exclusively at Providing
Support and Innovative IC Products for the ATE Industry
• 14 Full-Time Employees based in San Diego, CA
• Leveraged Outsource Business Model
• 15 IC Products In Production
• 47 Satisfied Customers Across 17 Countries
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Where we play
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Overview
Standard Digital Instruments
• Burn-in Instruments
DUT Power Supply Instruments
High Voltage Instruments
Development Ecosystem
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Digital Instruments
Main Goals of new Instruments
• Lower the Cost of test, COT, for the end user
– This usually means improved tester thru-put
• Increased parallelism
• Faster analog settling time
• Reduced configuration time
• Standard based configurations (i.e. PXI)
• Increased digital speed needed for testing new classes of DUTs
– 200MHz still adequate for many applications
– 500MHz is table stakes for newer designs
– 800MHz and beyond is required for many of the standard memory testers
• Higher voltage applications are driving the need for expanded voltage range capability
– Automotive, IOT, Power Supplies, and displays are driving the requirements
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Digital Instruments
Increased parallelism
• Testing more DUTs at the same time can reduce COT.
– Design Challenges
• Component Availability
– Traditional vendors are failing to offer a wide range off the shelf multi-channel PEICs
– ASICs can be expensive and time consuming to develop
• Cooling
– High density PEICs MUST offer low power per channel
– IC process technology is a major driver of power per channel
– IC products MUST offer a low thermal impedance path for easy cooling
• Architecture
– IC products MUST be highly integrated SOCs and include multiple channels of appropriate
functions like DACs, ADCs, Pin Drivers, Active Loads, Test Comparators, PPMUs, etc.
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Digital Instruments
Low Cost Instruments below 400MHz
• Venus Family of PEICs
– Dual Channel, Pin/SW compatible products
• Field proven technology
• Improved TTM
• Leveraging of Design resources
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Lowest Quiescent Power-The CMOS Advantage
Venus Family: ISL55161, ISL55163, Hallasan
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Digital Instruments
Low Cost Digital Instruments Beyond 400MHz
• Mt. Mystery Family of PEICs
– Latest Generation of 8-channel Integrated devices
– Leverage field learning from Venus Family
– Increase digital speed to 500MHz
– Reduce per channel Power
– 6 family members
• Optimize Instrument
– Price
– Architecture
– Power
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Burn In Instruments
Test During Burn-In (TDBI)
• Popular for Memory Test
– Why not use “Free” Test Time
• PEIC Availability has slowed the deployment of TDBI
– Traditional PEIC products focused at BIT
• Offer Extremely low pin cost
• Lack timing accuracy needed for parametric test (TPD Variation)
• Digital speeds too slow for many applications
– Traditional PEIC products focused at parametric test
• Per channel cost is too high
• Digital performance is overkill
• Integrated architecture does not fit well
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Burn In Instruments
TDBI Digital Solution
• Kilimanjaro PEIC
• Low per-channel cost is inline with traditional burn-in only products
• TPD is trimmed at final test to offer 10x timing accuracy improvement
• Architecture is suitable for TDBI and BI systems
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DPS Instruments
Main goals of new Instruments
• Support basic V/I requirements for target DUTs
• Support parallel testing of DUTs (High Density)
• Reduce COT (Similar to PEICs)
Many different approaches
• Re-use other instrument functions (i.e. PPMU or driver level)
• “Smart” Power Rails using switches/monitoring
• Use dedicated DPS products
– Traditional architecture (like a big PPMU)
• AD5560
– Special DPS architecture (optimized to act like a battery)
• Jupiter, Europa (ISL55180), Vesuvius
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DPS Instruments: Special Architecture
Special ArchitectureTraditional Architecture
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Unparalleled Parallelism
Infinite Gangability for Infinite Current
• Each Vesuvius IC Can Be Used at Up to +/- 4A in Total
Voltage Mode Ganging
for Excellent Current
Sharing and Transient
Response !
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Digital Reconfiguration: Optimized Test Time
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Ganging- 8 Channels, No Load vs. ConCap
Digitally
Programmable
Performance !
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Vesuvius: 3rd Generation of Special Architecture
Key Improvements:
• 2x Maximum Current Capability of ISL55180
• Low Tempco Current Measurement
• True FI Mode
• On-Chip Voltage Clamps
• Per-Pin V/I Monitor
Key Similarities:
• Patented Glitch Free Architecture
• On Chip Programmable Compensation
• Limitless Current Ganging
• Low Power Dissipation
• Small PCB Footprint
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High Voltage Instruments
High Voltage ATE
• Very Active Marketspace
– Many discrete and ASIC designs
– Value proposition is similar to standard digital pins but integration level is a few generations behind
Trends
• Lots of design activity
• Fragmented voltage requirements
– We group at under 24V, 40V, 72V, and over 120V
– Many specialized requirements, compatibilities, and compliance
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Existing Generation Solutions
Saturn (ISL55188) 24V Integrated PE
Triton (ISL55185) 28V Integrated V/I
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A Flexible Approach to High Voltage
Controller IC + Output IC
• Ultimate system flexibility for future expansion
• Enables process optimization for simplified design roadmap
The Concept
• Controller IC is standard (possibly common for V/I and PE applications)
– Leverage previous design and software development
– Reduced Time to Market with Focused Instruments
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Whitney – Extremely HVVI
Quad Channel Analog Pin Solution
• 70V Output Range across -70V to +70V Common Mode
• 4 Per-pin V/I’s (Glitch Free Architecture)
• FV/MI/FI/MV
• Design Targeting 2V@1A
• Current will be de-rated proportionally with increasing voltage
• 8 On Chip Current Force/Measure Ranges
– +/-2.5uA, +/-25uA, +/-25mA, +/-50mA, +/-150mA, +/-250mA, +/-500mA, +/-1A
• Per Channel Window Comparator
– Go-no-go Testing
• Integrated DAC Levels
• Per Channel Monitor Pin
– Integrated ADC Pre-Conditioning
• High Density, Standard Packaging
Test Chip in Lab!
Customer Samples in Q2 2019 !
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Everest – Extremely HVPE
Quad Channel Solution
• Pin Drivers
– 70V Swing over -70V to +70V Range
– 10 Ohm Zout
– 200mA Iout
– 50MHz Max Toggle Rate
– Programmable Driver Slew Rate
• Window Comparators
– 70V Swing over -70V to +70V Range
– 200MHz BW
• Timing Deskew
– 10ns to 20ns Span
– 312.5ps to 625ps Resolution
• High Density, Standard Packaging
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Options beyond: The sky is the limit!
Focused Output Stage Products
• Developed in optimal process technology for the application
– Enables improved performance and robust designs
– Minimizes product development schedule
– Simplifies new instrument release process
• Possible Next Products
– Optimized DPS for Specific Applications
• Extremely efficient low voltage design for microcontroller testing
• 1,000V V/I for IGBT Testing
• 250V V/I or PE for Power Electronics Testing
• Etc…
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Development Ecosystem
In-House Instrument Development
• Historic Approach, Works well
• Labor Intensive/Large Overhead
– Must maintain a staff of highly specialized workers for development.
Outsourced Instrument Development
• Choosing the right partners is key!
– Experience
– Flexibility
– Proven track record of success
We Recommend Salland…
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