TRD Electronics Flight Production

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TRD Electronics TRD Electronics Flight Production Flight Production Wim de Boer, Kai Gassmann, Florian Hauler, Andreas Sabellek, Mike Schmanau IEKP - Universität Karlsruhe (TH)

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TRD Electronics Flight Production. Wim de Boer , Kai Gassmann, Florian Hauler, Andreas Sabellek , Mike Schmanau IEKP - Universität Karlsruhe (TH). Outline. TRD Electronics Overview Status of FM/FS TRD Electronics production at CSIST Results of Board-level acceptance testing Dec 06 - PowerPoint PPT Presentation

Transcript of TRD Electronics Flight Production

Page 1: TRD Electronics Flight Production

TRD ElectronicsTRD ElectronicsFlight ProductionFlight Production

Wim de Boer, Kai Gassmann, Florian Hauler, Andreas Sabellek, Mike Schmanau

IEKP - Universität Karlsruhe (TH)

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OutlineOutline

• TRD Electronics Overview

• Status of FM/FS TRD Electronics production at CSIST

• Results of Board-level acceptance testing Dec 06

• Report on replacement procedure of Actel FPGAs

• Updated Time Schedule for FM U-Crates assembly and testing

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TRD(U)-Electronics OverviewTRD(U)-Electronics Overview

UCrate = TRD electronics crateUBP = TRD backplaneUPD = TRD power distribution box

UPSFE = TRD power supply for front endUDR = TRD data reduction boardJINF = data concentrator and link to higher DAQ UHVG = TRD high voltage generatorUFE = TRD front endUTE = TRD tube endUHVD = TRD high voltage distributor

V2

V2

U = Uebergangsstrahlung

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QM2 UPD and U-CrateQM2 UPD and U-Crate

• One set of fully qualified QM2 TRD Electronics Crates (two set of FM Crates needed for complete TRD readout)

Slow control connection to

U-Crate

Power supply connectors for

U-Crate and 28V

6 UHVG JINF 3 UPSFE 6 UDR2

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Status of FM/FS Production at Status of FM/FS Production at CSIST, TaiwanCSIST, Taiwan

• DCDC Converter (S9056,S9048,S9053): FM/FS board production and test completed (May.06, presented on TIM Jul.06)

• S9011AU Controller: FM/FS board production and acceptance test completed (Dec.06)

• UBP: FM/FS production finished; Board assembly ongoing• UDR2: FM/FS board production and acceptance test completed

(Sep/Dec.06, presented on TIM Oct.06)• UPSFE: FM/FS board production and acceptance test completed for

7/9 boards (Dec.06)• UHVG: reworked by VK; FM/FS production in progress, PCA delayed

by components found out of specification (MIT)• JINF: FM/FS production ongoing (MIT)

U Power Distribution (UPD):

U DAQ Electronics (U-Crate):

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S9011AU Controller FM/FS TestS9011AU Controller FM/FS Test

• Actel FPGAs with new Firmware are used• Some resistors mounted wrongly (unsoldered

according to latest BOM)• 95001F: Short between two status lines on Actel

pinout corrected (seen in functional test)

Number of Boards tested: 4 (2 needed as FM)

Testprocedure (before/after Coating and ESS):- Functional test via Lecroy communication- Signal and status lines tested with a DCDC converter (“needle” backplane used – no soldering on FM-boards necessary) - SSF test

Summary of Test Results:

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UDR2 DAQ Board FM/FS TestUDR2 DAQ Board FM/FS Test

• No problems or errors seen

Test-backplane

Number of Boards tested: 15 (12 needed as FM)

Testprocedure (before/after Coating and ESS in Dec.06):- Functional test via AMSWire communication- Data acquisition with FM-Front-Ends- Current monitoring on Test-backplane- SSF test

Dec.06

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UPSFE FM/FS TestUPSFE FM/FS Test

• Actel replacement after Firmware modification done, but mounted pairwise into wrong position (see Report on replacement procedure)

• Some resistors with wrong values exchanged • 95003F: FPGA off-signal failure; Actel problem in off-state, will be

exchanged• 95005F: one LR SSF failed after ESS; part failure found, will be exchanged

Number of Boards tested: 9 (6 needed as FM)

Testprocedure (before/after Coating and ESS):- Functional test via Lecroy communication- Linear Regulator test (28 circuits/board) on a Fusetest-backplane- Signal and status lines tested- Current monitoring- SSF test

UPSFEboard

14x2 LR test circuits

Off-signal LEDs StatusJumpersSummary of Test Results:

Fusetest Backplane

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Actel Replacement Procedure 1/2Actel Replacement Procedure 1/2• Solution to misplaced Actel FPGAs

proposed and done by CSIST: desolder and swap same ICs to correct position

• Thermal stress during desolder process is lower than in reflow soldering process of regular mounting

Hot air nozzle

Vacuumlifter

Bottom fan 100°C

FPGA pads have experienced 5 unavoidable de-/solder processes now

Careful inspection necessary!

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Actel Replacement Procedure 2/2Actel Replacement Procedure 2/2

s180°C190°C 200°C 255°C 35°C

255°C

t

270 cm

v=60cm/min

T255 °C M AX

N orm al autom ated soldering process

Part assem bly

190°C

R T0 4.5 m in2 m in

R epair desoldering process

t

T

245 °CM AX

R T0 2 m in 3.5 m in

band-conveyor

100°C

Before:1h @ 100°C

in oven

Bottom fan

+

Manual soldering

Flux

Iron@650°F

5sec slide/edge

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FM UPD Assembly StatusFM UPD Assembly Status

• CSIST technicians will follow UPD Assembly document prepared by Mike Schmanau

• Production of needed I-Frames for UPD boards was finished with priority in Dec 06

• Cabling and soldering work on UPD boards is waiting for materials and tooling; most needed parts will arrive mid January

Board type Number needed (two UPD Boxes)

Now available for Box assembly

Status

S9048 Converter 6 6 fully tested

S9056 Converter 6 6 fully tested

S9053 Converter 2 2 fully tested

S9011B Filter 2 0 Short Test will be performed by Mauro soon

S9011AU Controller 2 4 fully tested

Assembly discussion at CSIST

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FM U-Crate Assembly StatusFM U-Crate Assembly Status• JINF production and testing has to be finished• UHVG production and testing has to be finished; PCA now waiting for

new part supply

• CSIST accepted to produce three set of flight cables for us - materials will be delivered mid January- U Cabling document is being prepared (lenghts and procedure)- final cable lengths already partly verified on wooden mockup (Andrey)

Board type Number needed (two U-Crates)

Now available for Crate assembly

Status Expected date to be finish

UDR2 12 15 Fully tested

UPSFE 6 7 Fully tested

UBP 2 2 Processing conformal coating mid Jan 07

UHVG 12 0 PCA for 1 board done and tested by VK; waiting for new parts

Feb 07?

JINF 2 0 PCA for 1 board done; waiting for test Jan/Feb 07

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Time Schedule (updated)Time Schedule (updated)

• Delays: shipment of UPD assembly materials and tools to CSIST; late Chinese New Year holidays in February

• Full TRD readout test with FM Electronics will be performed in Aachen

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Status SummaryStatus Summary

• Board-level acceptance tests were completed for needed FM boards in December06 (excluding Uhvg and Jinf); two UPSFE boards still need part exchange

• Assembly of two FM set of UPD and U-Crate will start as soon as materials arrive at CSIST

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Backup SlidesBackup Slides

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Actel off-signal FailureActel off-signal Failure

• Consequence: two UHVG boards cannot be switched to ON state

• Lucky incident: after a replacement also observed on QM2 board with a new Actel

Actel0 (on) output:high/low opens/closes transistor

Actel1(off) output:constant drop 0.6 V

UHVG input: Small current(which is OFF state)