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Design of Analog MOS LSI Lecture 3 Small Signal Modeling of CMOS Subcircuits

Michael Perrott September 10, 2003Copyright 2003 by Michael H. Perrott All rights reserved.

Outline

Thevenin modeling for small-signal analysis Small-signal analysis of CMOS Subcircuits

- Amplifiers - Current mirrors - Current sources - Cascode and enhanced cascode techniques

M.H. Perrott 2003

2

Small Signal Analysis

A CMOS Amplifier

Small Signal Analysis StepsID RG RD

1) Solve for bias current Id voutRS

vin Vbias

2) Calculate small signal parameters (such as gm, ro) 3) Solve for small signal response using transistor hybrid- small signal model

Key analysis step is to plug in the Hybrid- model

- Small signal parameters determined from biasing - All independent sources are set to zero

M.H. Perrott 2003

3

Analysis of Amplifier Using Hybrid-Pi Model

Fill in Hybrid-model for transistor and set independent sources to zeroMOS Hybrid- Small Signal ModelRG

vin

vgs

gmvgs

-gmbvs

ro

RD

vout

vs

RS

Use KCL/KVL to solve for node voltages/currents

- Requires solution of simultaneous equations!Is there a faster way?

M.H. Perrott 2003

4

Thevenin/Norton Modeling

Allows simplification of circuits into One-Port and Two-Port models

- Eliminates having to solve simultaneous equations! With practice, can calculate many circuit characteristics by inspection Note: we will assume unilateral behavior for two-ports This is valid for transistor circuits given the Hybrid- model on the previous slide

M.H. Perrott 2003

5

Basics of One-Port ModelingThevenin Equivalent Zth Vth Ith Zth Norton Equivalent

Linear Network

Vth computed as open circuit voltage at port nodes Ith computed as short circuit current across port nodes Zth computed as Vth/Ith

M.H. Perrott 2003

6

Basics of Two-Port Modeling (Unilateral)Linear Network

ZL

Zs Vin

We now include a dependent current or voltage source Zin

- Solve using 1-Portanalysis at input

No Independent Sources

Zout

- Solve using 1-Portanalysis at output with V1 = 0

Zs Vin V1 Zin GmV1 Zout ZL

GM

- Short circuit output - Open circuit output

ORZs Vin V1 Zin AvV1 Zout ZL

current as a function of V1

Av

voltage as a function of V17

M.H. Perrott 2003

Analysis of Cascaded BlocksBlock 1Linear Network

Block 2Linear Network

Block 3Linear Network

Vin

Va

Vb

Vc ZL

No Independent Sources

No Independent Sources

No Independent Sources

Vin

Zin GmVin

Zout

Va

Zin GmVa

Zout

Vb

Zin

GmVb

Zout

Vc ZL

Zout,effective Vth,effective Vb Zin,effective

Analysis carried out without solving simultaneous equations!M.H. Perrott 20038

Thevenin Modeling of CMOS TransistorsHybrid- Model Rthd RG Rthg g vgs gmvgs -gmbvs ro gmb s Rths vs RS ro d RD Key Small-Signal Parameters Parameter gm Strong Inversion 2nCox(W/L)ID Weak Inversion qID nkT (n-1)qID nkT 1 ID

gm2 2|F| + VSB 1 ID

Use the Hybrid- model of transistor to calculate Thevenin resistances at each transistor node Key point: we dont need to do this every time we analyze a circuitgeneral use

- We can derive expressions for Thevenin resistances for9

M.H. Perrott 2003

Thevenin Resistance ExpressionsHybrid- Model Rthd RG Rthg g vgs gmvgs -gmbvs ro gmb s Rths vs RS ro d RD Key Small-Signal Parameters Parameter gm Strong Inversion 2nCox(W/L)ID Weak Inversion qID nkT (n-1)qID nkT 1 ID

gm2 2|F| + VSB 1 ID

Thevenin Resistances

Exact Rth = ro (1+(gm+gmb)RS)+RS d Rth = infiniteg

ID RG Rthg g d s

RD Rthd

Rths= (1+RD /ro ) (ro

1 ) gm+gmb

Approximation (gmb > 1) Rths RS Rthd= ro (1+gmRS) Rth = infinite g 1 + RD /ro Rth = gm s 1 gm

Thevenin resistances useful for many calculations It would be nice to replace Hybrid- model with Thevenin equivalent10

M.H. Perrott 2003

Replace Hybrid- Model with Thevenin ModelHybrid- Model Rthd RG Rthg g vgs gmvgs -gmbvs ro gmb s Rths vs RS ro d RD Key Small-Signal Parameters Parameter gm Strong Inversion 2nCox(W/L)ID Weak Inversion qID nkT (n-1)qID nkT 1 ID

gm2 2|F| + VSB 1 ID

Thevenin Resistances

Exact Rth = ro (1+(gm+gmb)RS)+RS d g Rthg= infinite

Proposed Thevenin Model d Rths Rthg vg Avvg is

ID RG Rthg g d s

RD Rthd

Rths= (1+RD /ro ) (ro

1 ) gm+gmb

is

Rthd

Approximation (gmb > 1) Rths RS Rthd= ro (1+gmRS) Rthg= infinite 1 + RD /ro Rth = gm s 1 gm Exact Av= gmro = 1 gm gm+gmb

s Approximation (gmb > 1) Av = 1 = 1

M.H. Perrott 2003

11

Example 1: Source Follower Amplifier

Perform small signal analysis by plugging in Thevenin model rather than Hybrid- model

- Determine parameters using calculations on summarysheet in previous slideRG g Vin d M1 s RS Vout

M1 RG g vin Rthg vg Avvg Rths is d

is

Rthd

s RS vout

M.H. Perrott 2003

12

Reduce to Two-Port For Convenience

Since Av is approximately 1, we see that a source follower acts like a voltage buffer with overall gain < 1

- Note that overall gain is highly influenced by RRG g Vin d M1 s RS Vout vin RG g vg Rthg Avvg Rths s

s

RS

vout

M1 RG g vin Rthg vg Avvg Rths is d

is

Rthd

s RS vout

M.H. Perrott 2003

13

The Issue of the Backgate EffectRG Vin M1 Vout RS vin vg RG gm v gm+gmb g 1 gm+gmb

Rs

vout

Backgate effect alters VT as the source node varies

- Leads to reduced gain for the source followermb

Backgate effect is eliminated if we tie the bulk connection of the device to its source

- Causes g to be set to zero - For N-well process, this is only possible for PMOSdevices14

M.H. Perrott 2003

Some Technologies Allow Elimination of Backgate EffectRG Vin M1 Vout RS n-well process vin vg RG gm v gm+gmb g 1 gm+gmb

Rs

vout

RG Vin M1 Vout RS vin

RG 1 gm

vg

vg

Rs

vout

p-well or triple well process (tie the well and source)

P-well process: NMOS devices Triple well process: both NMOS and PMOS devices15

M.H. Perrott 2003

Example 2: Degenerated Common Source Amplifier

Again plug in Thevenin model for transistor Reduction to two-port model achieved by lumping impact of middle stage of model into last stage

- Dependent current source will then depend on vRD RG M1 Vout RS

g

rather than is

Vin

M1 RG g Rths is d

vin

Rthg

vg

Avvg s RS

is

Rthd

RD

vout

M.H. Perrott 2003

16

Reduce to Two-Port

Calculation of Gm

RD RG M1 Vin RS Vout vin

RG

vg

Rthg

Gmvg

Rthd

RD

vout

M1 RG g Rths is d

vin

Rthg

vg

Avvg s RS

is

Rthd

RD

vout

M.H. Perrott 2003

17

Example 3: Common Gate Amplifier

Reduction to two-port is easy once we realize that dependent source Avvg is zero since vg = 0RD Vout M1 RS Vin M1 g Rths is d

Rthg

vg

Avvg s RS vin

is

Rthd

RD

vout

M.H. Perrott 2003

18

Reduce to Two-Port

Left section is eliminatedRD Vout M1 RS Vin M1 g Rths is d vin RS

is Rths is Rthd RD vout

Rth

g

vg

Avvg s RS vin

is

Rthd

RD

vout

M.H. Perrott 2003

19

Example 4: Cascode AmplifierRD Vout M2 RG M1 Vin RS s2 M1 RG g1 Rths1 is1 d1 Common Gate Rths2 M2 is2 d2

2is2

Rthd2

RD

vout

vin

Rthg1

vg1 Av1vg1 s1

1is1

Rthd1

General Model

RS

M.H. Perrott 2003

Allows elimination of Miller effect of Cgd1 Reduction to two-port will be done in several steps

20

Eliminate Middle SectionsRD Vout M2 RG M1 Vin RS s2 M1 RG g1 d1 Rths2 M2 is2 d2

2is2

Rthd2

RD

vout

vin

Rthg1

vg1

Gm1vg1

Rthd1

Calculation of Gm1 same as for common source amp To reduce further, note that21

M.H. Perrott 2003

Resulting Two-Port Similar to Common Source AmpRD Vout M2 RG M1 Vin RS M2 d2

Gm1vg1

Rthd2

RD

vout

M1 RG g1

vin

Rthg1

vg1

Key difference: drain impedance much larger

M.H. Perrott 2003

22

Example 5: Differential AmplifierR1 Vin+ R2 Vin-

Vo- Vo+ M1 Ibias M2

Vbias

M4

Useful for amplifying signals in the presence of noise

- Common-mode noise is rejectedperformance

Useful for high speed digital circuits

- Low voltage swing allows faster gate/buffer23

M.H. Perrott 2003

First Steps in Small Signal ModelingR1 Vin+ R2 VinVin+ R1 R2 Vin-

Vo- Vo+ M1 Ibias M2

Vo- Vo+ M1 M2

Vbias

M4

Rthd4= ro4

Small signal analysis assumes linearity4

- Impact of M on amplifier is to simply present its drain impedance to the diff pair transistors (M and M ) - Impact of V and V can be evaluated separately and1 2 in+ in-