TPD7210F of SPICE MODEL using PSpice
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Transcript of TPD7210F of SPICE MODEL using PSpice
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
1
Device Modeling Report
Bee Technologies Inc.
COMPONENTS: Power MOSFET Gate Driver for 3- Phase DC Motor
PART NUMBER: TPD7210F MANUFACTURER: TOSHIBA
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
2
U1
TPD7210F
ENB
ROSC
IN1
IN2
IN3
IN4
IN5
IN6
SGND1
CP1
SGND2
CP2 VDD
FAULT
WB
PGND1
VB
PGND2
UB
UU
VU
WU
CPV
COSC
Symbol and Pin Layout
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
3
+ -
+ -S2
S
+ -
+ -S3
S
H4
DdT
I/OO
CPON
OP
R
HIN
I-Logic
IN2O
IN5O
IN3O
IN1O
IN4O
IN6O
FLT0
IN4
IN2
IN5
IN3
ENB
IN6
IN1
SGNDOPR
H1
UV
D
UV
DS
GN
D
VD
DO
PR
OP
R
OPR
+ -
+ -S4
S
+ -
+ -S1
S
0 0
0 0
HU
BB
O
IS
S
DD
B
UB
SG
ND
1
HV
UU
O
SS
DD
U
I
VU
IN4
FA
ULT
osc
IN+
IN-
OUT+
OUT-
E5V
7
Lim
it(
V(%
IN+,
%IN
-),
0,
5.7
)E
VA
LU
E
H2
OS
C
5V
7
SG
ND
CO
SC
CLK
RO
SC
IN2
RO
SC
CO
SC
5V
7
FLT0
UB
I
SG
ND
2
HW
UU
O
SS
DD
U
I
WU
IN5
WU
I
RSGND21U
VU
I
UU
I
HU
UU
O
SS
DD
U
I
IN3
UU
RP
GN
D2
1U
HV
BB
O
IS
S
DD
B
VB
VB
I
H3
LG
CK
TO
SCO
CMP1
CMP2
PG
ND
2
PG
ND
1
EN
B
HW
BB
O
IS
S
DD
B
WB
NF
LTW
BI
UF
NO
RLTP
D7210FU
VD
SG
ND
1
Ref1
/O
IN6C
MP
1
+-
U1
CM
PTP
D7201F
+-U2
CM
PTP
D7201F
RE
F2
32.5
Vdc
CM
P2
OQ
IN+
IN-
OUT+
OUT-
RE
F1
V(V
DD
)+14
EV
ALU
E0
IN1
CP
2C
P1
CP
V
VD
D
Ref2
H5
FLT
SDI
Model Equivalent Circuit
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
4
Time
0s 2ms 4ms 6ms 8ms 10ms 12ms 14ms 16ms 18ms 20ms
V(FAULT)
0V
5V
10V
SEL>>
1 V(UU) 2 V(UB)
0V
5V1
>>0V
5V
10V
15V2
1 V(ENB) 2 V(H4:CPON)
-5.0V
0V
5.0V1
2.0V
-0.2V
2
>>
1 V(IN1) 2 V(IN4)
0V
5.0V1
>>0V
5V
10V2
V(VDD)
4.0V
5.0V
6.0V
7.0V
*Evaluation is made from the Sub-circuit inside the IC model
Timing Chart and Truth Table
Circuit Simulation Result
Simulation result
IN ENB VOUT FAULT STATE
L L L L
Normal H L L L
L H L L
H H H L
L L L H
VDD under-voltage detection H L L H
L H L H
H H H H
High-side H Low-side H
L L H Upper and lower short-circuit input detection H L H
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
5
V1
0VENB5
HINI-Logic
IN2
O
IN5
O
IN3
O
IN1
O
IN4
O
IN6
O
FLT0
IN4
IN2
IN5
IN3
EN
B
IN6
IN1
SG
ND
OP
R
OPR
I
IN4IN2 IN5IN3
UU
IN6 ENBIN1
*Evaluation is made from the Sub-circuit inside the IC model
V_V1
0V 0.5V 1.0V 1.5V 2.0V 2.5V 3.0V 3.5V 4.0V 4.5V 5.0V
1 V(HIN.IN101) 2 -I(V1)
-0.2V
0V
0.2V
0.4V
0.6V
0.8V
1.0V
1.2V
1.4V1
>>
0A
25uA
50uA2
INPUT Characteristics
Circuit Simulation Result
Evaluation circuit
Simulation result
Parameter Condition Unit Measurement Simulation %Error
VIH V
2.7 2.7 0
VIL 2.45 2.45 0
IIH VIN = 5V uA
50 50 0
IIL VIN = 0V 0 0 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
6
Time
1.60ms 1.64ms 1.68ms 1.72ms 1.76ms 1.80ms 1.84ms 1.88ms 1.92ms 1.96ms
V(CPV)
16V
18V
20V
22V
24V
26V
28V
30V
32V
34V
36V
Charge Pump Voltage Characteristics
Circuit Simulation Result
Simulation result
Condition: CP1 = CP2 = 0.1F, ROSC = 62k, COSC = 270pF
Parameter Condition Unit Measurement Simulation %Error
VCPV
VDD = 7V VIN1 to VIN6 = 0V
V 18.9 (VDD+11.9) 19.7 4.23
VDD = 13.5V VIN1 to VIN6 = 0V
V 27.5 (VDD+14) 27.5 0
VDD = 18V VIN1 to VIN6 = 0V
V 32 (VDD+14) 32.1 0.31
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
7
CP
V2
DCPD2
C2
0.1
u
WU
UU
VU
CPVCPV
COSCCOSC
VB
UB
WB
ENB
00 00 00
ENB
IN1 IN3IN2 IN4
0
IN5 IN6
IN1
IN3
IN2
IN5
IN4
IN6
FA
ULT
RFLT13.5k
VDD
7
VDD
Rosc
62k
0
0
VDD
C3
1u0
Cosc
270p
DCP
D3
C1
0.1
u
DCP
D1
0
VIN1
0V
VIN2
0V
VIN3
0V
VIN4
0V
VIN5
0V
VIN6
0V
VENB
5V
ROSC
CP1
CP2
U1
TPD7210F
ENB
ROSC
IN1
IN2
IN3
IN4
IN5
IN6
SGND1
CP1
SGND2
CP2 VDD
FAULT
WB
PGND1
VB
PGND2
UB
UU
VU
WU
CPV
COSC
Charge Pump Voltage Characteristics
Evaluation circuit
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
8
Time
1.60ms 1.64ms 1.68ms 1.72ms 1.76ms 1.80ms 1.84ms 1.88ms 1.92ms 1.96ms
V(VU)
0V
50mV
100mV
150mV
200mV
SEL>>
V(UU)
12V
16V
20V
24V
28V
32V
High-Side Output Voltage Characteristics
Circuit Simulation Result
Simulation result
Condition: CP1 = CP2 = 0.1F, ROSC = 62k, COSC = 270pF
Parameter Condition Unit Measurement Simulation %Error
VOH(H)
VDD = 7V, VIN = 5V, IO = -10mA
V 16.9 (VDD+9.9) 17.4 2.96
VDD = 13.5V, VIN = 5V, IO = -10mA
V 25.5 (VDD+12) 25.7 0.78
VDD = 18V, VIN = 5V, IO = -10mA
V 30 (VDD+12) 30.1 0.33
VDROP VIN = 5V, IO = -10mA, VDROP=VCPV-VOH
V 2 2.07 3.5
VOL(H)
VDD = 7 to 18 V, VIN = 0V, IO = 0mA
V 0.1 0.1 0
VOH(H), VDD=7V
VDD=13.5V
VDD=18V
VOL(H), VDD=7 – 18 V
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
9
CP
V2
DCPD2
WU
C2
0.1
uUU
VU
COSCCOSC
UB
VB
WB
0
ENB
00 00
IN1
0
ENB
IN2
0
IN3 IN5IN4 IN6
IN1
IN3
IN2
IN5
IN4
IN6
FA
ULT
RFLT13.5k
VDD
7
VDD
Rosc
62k
0
0
VDD
C310uIC = 18.625
0
Cosc
270p
DCP
D3
C1
0.1
u
DCP
D1
0
VIN1
5V
VIN2
0V
VIN3
0V
VIN4
0V
VIN5
0V
VIN6
0V
VENB
5V
IO -10mA
CPV
0
ROSC
CP1
CP2
U1
TPD7210F
ENB
ROSC
IN1
IN2
IN3
IN4
IN5
IN6
SGND1
CP1
SGND2
CP2 VDD
FAULT
WB
PGND1
VB
PGND2
UB
UU
VU
WU
CPV
COSC
High-Side Output Voltage Characteristics
Evaluation circuit
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
10
Time
0s 40us 80us 120us 160us 200us 240us 280us 320us 360us
V(VB)
0V
50mV
100mV
150mV
200mV
SEL>>
V(UB)
0V
5V
10V
15V
20V
Low-Side Output Voltage Characteristics
Circuit Simulation Result
Simulation result
Condition: CP1 = CP2 = 0.1F, ROSC = 62k, COSC = 270pF
Parameter Condition Unit Measurement Simulation %Error
VOH(L)
VDD = 7V, VIN = 5V, IO = -10mA
V 6.9 (VDD-0.1) 6.93 0.43
VDD = 13.5V, VIN = 5V, IO = -10mA
V 13.4 (VDD-0.1) 13.43 0.22
VDD = 18V, VIN = 5V, IO = -10mA
V 17.9 (VDD-0.1) 17.93 0.17
VOL(L)
VDD = 7 to 18 V, VIN = 0V, IO = 0mA
V 0.1 0.1 0
VOH(L), VDD=7V
VDD=13.5V
VDD=18V
VOL(L), VDD=7 – 18 V
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
11
U1
TPD7210F
ENB
ROSC
IN1
IN2
IN3
IN4
IN5
IN6
SGND1
CP1
SGND2
CP2 VDD
FAULT
WB
PGND1
VB
PGND2
UB
UU
VU
WU
CPV
COSC
CP2
CP1
ROSC
CP
V2
DCPD2
WU
C2
0.1
u
VU
UU
COSCCOSC
UB
VB
WB
0
ENB
00 00
IN1
0
ENB
IN2
0
IN3 IN5IN4 IN6
IN2
IN1
IN4
IN3
IN5
FA
ULT
IN6
RFLT13.5k
VDD
7
VDD
Rosc
62k
0
0
VDD
C310uIC = 18.625
0
Cosc
270p
DCP
D3
C1
0.1
u
DCP
D1
0
VIN1
0V
VIN2
0V
VIN3
0V
VIN4
5V
VIN5
0V
VIN6
0V
VENB
5V
CPV
IO -10mA
0
Low-Side Output Voltage Characteristics
Evaluation circuit
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
12
0
HUB BO
I SS
DD B
UB
HVB BO
I SS
DD B
VB
VDD
13.5
VDD
VDD
1
0
0
V1
1
1
IO0Adc
0
F1
F
GAIN = -1
0
*Evaluation is made from the Sub-circuit inside the IC model
I_IO
100mA 1.0A50mA
(V(VB)-0.1)/ I(IO)
4.0
4.5
5.0
-I_IO
-100mA-50mA -1.0A
(13.43-V(UB))/I(IO)
4.0
6.0
7.0
8.0
SEL>>
Output ON Resistance Characteristics
Circuit Simulation Result
Evaluation circuit
Simulation result
Parameter Condition Unit Measurement Simulation %Error
RSOURCE VDD = 13.5 V, VIN = 5 V, IO = -0.5 A
7 6.857 -2.04
RSINK VDD = 13.5 V, VIN = 0 V, IO = -0.5 A
4.5 4.499 -0.02
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
13
V1
T1 = 0
V1 = 0
T2 = 1
V2 = 30
T3 = 2
V3 = 0
UV
LO0
Vsgnd
0
VDD
H1
UVD
UVDSGND
VDD OPR
OP
R
*Evaluation is made from the Sub-circuit inside the IC model
V(VDD)
0V 2V 4V 6V 8V 10V 12V
V(UVLO)
-0.5V
0V
0.5V
1.0V
1.5V
Under Voltage Detection Characteristics
Circuit Simulation Result
Evaluation circuit
Simulation result
Parameter Condition Unit Measurement Simulation %Error
VDDUV V
5.5 5.5 0
VDDUV
0.5 0.5 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
14
Time
0s 2us 4us 6us 8us 10us
V(UU)
5V
10V
-2V
14V
SEL>>
V(IN1)
0V
2.0V
4.0V
5.5V
Switching Time Characteristics
Circuit Simulation Result
Simulation result
Parameter Condition Unit Measurement Simulation %Error
td (ON) VDD = 13.5V, VCPV = 13.5V, COUT = 12400 pF,
RG = 47
s
0.25 0.251 0.4
tON 0.5 0.504 0.8
td (OFF) 0.25 0.250 0
tOFF 0.5 0.495 -1.0
tdead VDD = 13 V, tdead = tOFF-td(on)
s 0.25 0.244 -2.4
50%
VIN
VOUT
(VDD-3)90%
(VDD-3)10%
td(ON)
tON td(OFF)
tOFF
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
15
CP
V2
DCPD2
C2
0.1
uVU
WU
UU
COSCCOSC
UB
VB
WB
ENB
0
IN1
FA
ULT
RFLT13.5k
VDD
13.5
VDD
Rosc62k
0
VDD
RG1
47
VIN1
TD = 2.45u
TF = 100nPW = 4.9uPER = 1
V1 = 0
TR = 100n
V2 = 5
Ciss1
12400p
0
C3
2.2
u0
Cosc
270p
DCP
D3C
10.1
u
DCP
D1
0
ENB
VENB
5V
CPVROSC
CP1
CP2
U1
TPD7210F
ENB
ROSC
IN1
IN2
IN3
IN4
IN5
IN6
SGND1
CP1
SGND2
CP2 VDD
FAULT
WB
PGND1
VB
PGND2
UB
UU
VU
WU
CPV
COSC
Switching Time Characteristics
Evaluation circuit
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
16
0
H2 OSC
5V7
SGNDCOSC
CLKROSCosc
ROSC
COSC
5V7
Rosc62k Cosc
270p
*Evaluation is made from the Sub-circuit inside the IC model
Time
0s 10us 20us 30us 40us 50us 60us 70us 80us 90us
v(osc)
0V
0.5V
1.0V
V(ROSC) V(COSC)
0V
0.5V
1.0V
1.5V
2.0V
SEL>>
Oscillating Frequency Characteristics
Circuit Simulation Result
Evaluation circuit
Simulation result
Parameter Condition Unit Measurement Simulation %Error
fOSC VDD = 7-18V,
ROSC = 62 k, COSC = 270 pF
kHz 100 99.82 -0.18
V ROSC pin
V COSC pin
OSC clock (inside the IC)
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
17
H1FLT
S
DI
SGND
0
RFLT18k
VFLT_IN
TD = 1.45u
TF = 100nPW = 4.9uPER = 1
V1 = 0
TR = 100n
V2 = 1
V
V
VDD
FAULT
*Evaluation is made from the Sub-circuit inside the IC model
Time
5.6us 6.0us 6.4us 6.8us 7.2us 7.6us 8.0us 8.4us 8.8us 9.2us
-I(RFLT)
1.0uA
10uA
100uA
1.0mA
V(FAULT)
0V
10V
20V
V(VFLT_IN:+)
0.5V
1.0V
SEL>>
FAULT Output Characteristics
Circuit Simulation Result
Evaluation circuit
Simulation result
Parameter Condition Unit Measurement Simulation %Error
IFAULT, Max. mA 5 5.01 0.2
VFAULT VDD = 7-18V, IFAULT = 1mA
V 0.8 0.799 -0.13
IFAULT, Leakage VDD = 7-18V, VFAULT = 18V
A 10 9.637 -3.63
td(FAULT) s 1[Max.] 0.5
IFAULT, Leakage
td(ON)
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
18
Time
0s 5us 15us 25us 35us 45us 55us 65us 75us
1 V(UB) 2 V(VB) 3 V(WB)
-15V
0V
15V
-38V
1
SEL>> -15V
0V
15V
30V2
0V
15V
30V
45V
3
SEL>>
1 V(UU) 2 V(VU) 3 V(WU)
-15V
0V
15V
-38V
1
>> -15V
0V
15V
30V2
0V
15V
30V
45V
3
DSTM1:PIN1
DSTM2:PIN1
DSTM3:PIN1
DSTM4:PIN1
DSTM5:PIN1
DSTM6:PIN1
Truth Table (1/5)
Circuit Simulation Result
IN1
IN2
IN3
IN4
IN5
IN6
1
L
L
L
L
L
L
2
H
L
L
L
L
L
3
L
H
L
L
L
L
4
L
L
H
L
L
L
5
L
L
L
H
L
L
6
L
L
L
L
H
L
7
L
H
L
L
L
H
8
H
L
L
H
L
L
9
H
L
L
L
H
L
10
H
L
L
L
L
H
11
L
H
L
H
L
L
12
L
H
L
L
H
L
13
L
H
L
L
L
H
14
L
L
H
H
L
L
15
L
L
H
L
H
L
16
L
L
H
L
L
H
1
L
L
L
L
L
L
2
H
L
L
L
L
L
3
L
H
L
L
L
L
4
L
L
H
L
L
L
5
L
L
L
H
L
L
6
L
L
L
L
H
L
7
L
H
L
L
L
H
8
L
L
L
L
L
L
9
H
L
L
L
H
L
10
H
L
L
L
L
H
11
L
H
L
H
L
L
12
L
L
L
L
L
L
13
L
H
L
L
L
H
14
L
L
H
H
L
L
15
L
L
H
L
H
L
16
L
L
L
L
L
L
Mode #
Mode #
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
19
Time
0s 5us 15us 25us 35us 45us 55us 65us 75us
1 V(UB) 2 V(VB) 3 V(WB)
-15V
0V
15V
-38V
1
SEL>> -15V
0V
15V
30V2
0V
15V
30V
45V
3
SEL>>
1 V(UU) 2 V(VU) 3 V(WU)
-15V
0V
15V
-38V
1
>> -15V
0V
15V
30V2
0V
15V
30V
45V
3
DSTM1:PIN1
DSTM2:PIN1
DSTM3:PIN1
DSTM4:PIN1
DSTM5:PIN1
DSTM6:PIN1
Truth Table (2/5)
Circuit Simulation Result
IN1
IN2
IN3
IN4
IN5
IN6
17
H
H
L
L
L
L
18
L
H
H
L
L
L
19
H
L
H
L
L
L
20
L
L
L
H
H
L
21
L
L
L
L
H
H
22
L
L
L
H
L
H
23
H
H
L
H
L
L
24
H
H
L
L
H
L
25
H
H
L
L
L
H
26
L
H
H
H
L
L
27
L
H
H
L
H
L
28
L
H
H
L
L
H
29
H
L
H
H
L
L
30
H
L
H
L
H
L
31
H
L
H
L
L
H
32
H
L
L
H
H
L
17
H
H
L
L
L
L
18
L
H
H
L
L
L
19
H
L
H
L
L
L
20
L
L
L
H
H
L
21
L
L
L
L
H
H
22
L
L
L
H
L
H
23
L
L
L
L
L
L
25
H
H
L
L
L
H
27
L
L
L
L
L
L
28
L
L
L
L
L
L
29
L
L
L
L
L
L
31
L
L
L
L
L
L
32
L
L
L
L
L
L
Mode #
Mode # 24
L
L
L
L
L
L
26
L
H
H
H
L
L
30
H
L
H
L
H
L
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
20
Time
0s 5us 15us 25us 35us 45us 55us 65us 75us
1 V(UB) 2 V(VB) 3 V(WB)
-15V
0V
15V
-38V
1
>> -15V
0V
15V
30V2
0V
15V
30V
45V
3
1 V(UU) 2 V(VU) 3 V(WU)
-15V
0V
15V
-38V
1
SEL>> -15V
0V
15V
30V2
0V
15V
30V
45V
3
SEL>>
DSTM1:PIN1
DSTM2:PIN1
DSTM3:PIN1
DSTM4:PIN1
DSTM5:PIN1
DSTM6:PIN1
Truth Table (3/5)
Circuit Simulation Result
IN1
IN2
IN3
IN4
IN5
IN6
33
H
L
L
L
H
H
34
H
L
L
H
L
H
35
L
H
L
H
H
L
36
L
H
L
L
H
H
37
L
H
L
H
L
H
38
L
L
L
H
H
L
39
L
L
H
L
H
H
40
L
L
H
H
L
H
41
H
H
H
L
L
L
42
L
L
L
H
H
H
43
H
H
L
H
H
L
44
H
H
L
L
H
H
45
H
H
L
H
L
H
46
L
H
H
H
H
L
47
L
H
H
L
H
H
48
L
H
H
H
L
H
33
H
L
L
L
H
H
34
L
L
L
L
L
L
35
L
L
L
L
L
L
36
L
L
L
L
L
L
37
L
H
L
H
L
H
38
L
L
H
H
H
L
39
L
L
L
L
L
L
40
L
L
L
L
L
L
41
H
H
H
L
L
L
42
L
L
L
H
H
H
43
L
L
L
L
L
L
44
L
L
L
L
L
L
45
L
L
L
L
L
L
46
L
L
L
L
L
L
47
L
L
L
L
L
L
48
L
L
L
L
L
L
Mode #
Mode #
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
21
Time
0s 5us 15us 25us 35us 45us 55us 65us 75us
1 V(UB) 2 V(VB) 3 V(WB)
-30V
-15V
0V
15V1
0V
15V
30V
-20V
2
>>0V
15V
30V
45V
3
1 V(UU) 2 V(VU) 3 V(WU)
-15V
0V
15V
-38V
1
SEL>> -15V
0V
15V
30V2
0V
15V
30V
45V
3
SEL>>
DSTM1:PIN1
DSTM2:PIN1
DSTM3:PIN1
DSTM4:PIN1
DSTM5:PIN1
DSTM6:PIN1
Truth Table (4/5)
Circuit Simulation Result
IN1
IN2
IN3
IN4
IN5
IN6
49
H
L
H
H
H
L
50
H
L
H
L
H
H
51
H
L
L
H
L
H
52
H
H
H
H
L
L
53
H
H
H
L
H
L
54
H
H
H
L
L
H
55
H
L
L
H
H
H
56
L
H
L
H
H
H
57
L
L
H
H
H
H
58
H
H
H
H
H
L
59
H
H
H
L
H
H
60
H
H
H
H
L
H
61
H
H
L
H
H
H
62
L
H
H
H
H
H
63
H
L
H
H
H
H
64
H
H
H
H
H
H
49
L
L
L
L
L
L
50
L
L
L
L
L
L
51
L
L
L
L
L
L
52
L
L
L
L
L
L
53
L
L
L
L
L
L
54
L
L
L
L
L
L
55
L
L
L
L
L
L
56
L
L
L
L
L
L
57
L
L
L
L
L
L
58
L
L
L
L
L
L
59
L
L
L
L
L
L
60
L
L
L
L
L
L
61
L
L
L
L
L
L
62
L
L
L
L
L
L
63
L
L
L
L
L
L
64
L
L
L
L
L
L
Mode #
Mode #
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
22
UI4BUF
1 2
UI5BUF
1 2
CPV2
UI6BUF
1 2
IN2
IN3
IN5
C3
2.2u
DCPD3
IN6
F1
DSTM1IN1
UI1BUF
1 2
IN4
RG
447
Cis
s4
12400p
RG247
Cis
s2
12400p
RG347
Cis
s3
12400p
RG
547
Cis
s5
12400p
RG
647
Cis
s6
12400p
VDD
DCPD2
C2
0.1
u
WU
VU
UU
COSCCOSC
UB
WB
VB
0
ENB
IN1
FA
ULT
RF
LT
13.5
k
VDD
13.5
VDD
Rosc62k
0
RG147
Cis
s1
12400p
0
Cosc
270p
C1
0.1
u
DCPD1
F1
DSTM2IN2
0
ENB
VENB
5V
ROSC
F1
DSTM3IN3
CP2
CP1
F1
DSTM4IN4
U1
TPD7210F
ENB
ROSC
IN1
IN2
IN3
IN4
IN5
IN6
SGND1
CP1
SGND2
CP2 VDD
FAULT
WB
PGND1
VB
PGND2
UB
UU
VU
WU
CPV
COSC
F1
DSTM5IN5
F1
DSTM6IN6
UI2BUF
1 2
UI3BUF
1 2
Truth Table (5/5)
Evaluation circuit