Toshiba Satellite M35 Compal LA-2461

47
A A B B C C D D E E 1 1 2 2 3 3 4 4 Title Size Document Number Rev Date: Sheet of EAL20 LA-2461 0.3 Cover Sheet 1 47 星期 , 04, 2004 八月 Compal Electronics, Inc. uFC-PGA Dothan / Montara-GM+ M11P-128M VRAM / ICH4-M REV: 0.3 Fortworth Banias EAL20 LA-2461 Schematic MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Compal Confidential 2004-07-21

Transcript of Toshiba Satellite M35 Compal LA-2461

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Compal Confidential2

Fortworth Banias EAL20 LA-2461 SchematicuFC-PGA Dothan / Montara-GM+ M11P-128M VRAM / ICH4-M 2004-07-21REV: 0.3

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Compal Electronics, Inc.TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.A B C D

Cover SheetDocument Number

Size Date:

EAL20 LA-2461SheetE

R ev 0.3 1 of 47

, 04, 2004

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Compal ConfidentialModel Name : EAL20 File Name : LA-24611

Fan Control

page 4

Mobile Banias/Dothan Celeron-MuFCPGA-478 CPUH_A#(3..31) 400MHz page 4,5 H_D#(0..63)

Thermal Sensor ADI ADM1032ARpage 4

Clock Generator Cypress CY28346ZCT-2page 121

PSB

LCD Conn.page 20

ATI M11-PBGA-708 Pin with 32/64/128MB On Board VRAM page 13,14,15,16,17,18 AGP4X/DVO1.5V 266MHz

Intel 855GMEuFCBGA-732page 6,7,8,9

Memory BUS(DDR)2.5V DDR200/266/333

200pin DDR-SO-DIMM X2BANK 0, 1, 2, 3page 10,11

CRT Conn.

page 21

TV-OUT Conn.

page 21

TV EncoderCH-7011A2

Hub-Link

USB conn x2 page

Port 2,335

page 19 3.3V 33 MHzIDSEL:AD16 (PIRQE#, GNT#0, REQ#0) IDSEL:AD18 (PIRQ[G..H]#, GNT#3/4, REQ#3/4) IDSEL:AD17 (PIRQB#, GNT#1, REQ#1)

PCI BUSIDSEL:AD20 (PIRQ[A..B]#, GNT#2, REQ#2)

Intel ICH4-MBGA-421page 22,23,24

USB 2.03.3V 48MHz 3.3V 24.576MHz 3.3V ATA-100

USB conn x1 page

Port 435

2

IEEE 1394a VIA VT6301Spage 27

Mini PCI socketpage 30

LAN RTL8100CL

CardBusENE CB714/CB1410page 28

AC-LINK

page 26

IDE

1394 Conn.page 27

RJ45/RJ11page 26

CDROM Conn. page

AC97 Codec25

ALC250 Ver.C

MDC Connpage 31

page 31

5 in 1 Slot

page 29

Slot 0

page 29

HDD Conn.3

LPC BUS

3.3V 33MHz

page 25

AMP TPA0232 page

EAL20 Sub Board32

RTC CKT.page 24

ENE KB910page 34

SMsC LPC47N217 Super I/Opage 33

SW DJ Ckt.page 25

Audio Board Conn

LED/SW Board Conn LS-2462 page 36 T/P Board Conn LS-2461

3

LS-2463

page 32

page 36

Power On/Off CKT.page 37

Touch Pad

Int.KBDpage 36

PARALLELpage 33

FIRpage 33

WL-KSW Board LS-2464

DC/DC Interface CKT.4

512KB BIOS

page 354

page 38

Power Circuit DC/DCpage 38,39,40,41 42,43,44,45THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.A B C D

Compal Electronics, Inc.Title Size Date: Document Number

Block Diagram EAL20 LA-2461SheetE

Rev 0.3 2 of 47

, 04, 2004

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Voltage RailsPower Plane VIN B+ +CPU_CORE +VCCP +1.25VS +VGA_CORE +1.35VS +1.5VALW +1.5VS +1.8VS +2.5V +2.5VS +3V +3VALW +3V +3VS +5VALW +5VS +12VALW RTCVCC Description Adapter power supply (19V) AC or battery power rail for power circuit Core voltage for CPU 1.05V rail for Processor I/O 1.25V switched power rail for DDR Vtt 1.2V/1.0V switched power rail for VGA core power 1.35V switched power rail for GMCH core power 1.5V always on power rail 1.5V switched power rail for AGP interface 1.8V switched power rail for CPU PLL & Hub-Link 2.5V power rail for system DDR 2.5V power rail for VGA DDR 3.3V always on power rail 3.3V switched power rail 3.3V switched power rail 5V always on power rail 5V switched power rail 12V always on power rail RTC power S0-S1 N/A N/A ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON S3 N/A N/A OFF OFF OFF OFF OFF ON OFF OFF ON OFF ON ON OFF ON OFF ON ON S5 N/A N/A OFF OFF OFF OFF OFF ON* OFF OFF OFF OFF ON* OFF OFF ON* OFF ON* ON

Symbol note: :means digital ground. :means analog ground. @ :means reserved.Fortworth Banias Comparison TableItemVGA VRAM TV Encoder

* DescriteATI M11P 128MB/64MB N/A

UMAUMA N/A CH7011A

Page13 ~ 16 13 ~ 14 19

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Board ID Table for AD channelVcc RaBID/PID

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ICH4-M I2C / SMBUS ADDRESSINGDEVICEDDR SO-DIMM 0 DDR SO-DIMM 1 CLOCK GENERATOR (EXT.)

HEXA0 A2 D2

ADDRESS1010000X 1010001X 1101001X

0 1 2 3 4 5

3.3V +/- 5% 10K +/- 5% Rb/Rc 0 8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% NC

1

V AD_BID min 0 V 1.412 V 2.015 V 2.406 V 2.660 V 3.135 V

V AD_BID typ 0 V 1.486 V 2.121 V 2.533 V 2.800 V 3.300 V

V AD_BID max 0 V 1.560 V 2.227 V 2.659 V 2.940 V 3.465 V

KB910 I2C / SMBUS ADDRESSINGDEVICESM1 24C16 SM1 SMART BATTERY SM2 ADM0132 CPU THERMAL MONITOR SM2 ALC250 AUDIO CODEC

HEXA 0H 16H 98H 00H

ADDRESS1010000Xb 0001011Xb 1001100Xb 0000000Xb

External PCI DevicesDEVICE1394 LAN CARD BUS 5IN1 Mini-PCI AGP BUS

PCI Device IDD0 D1 D4 D4 D2 N/A

IDSEL #AD16 AD17 AD20 AD20 AD18 AGP_DEVSEL#

REQ/GNT #0 1 2 2 3,4 N/A

PIRQE F A B G,H A

Board ID * 0 1 2 3 4 5 6 7

PCB Revision 0.1 0.2 0.3 0.4 0.5

Compal Electronics, Inc.TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.A

Notes ListDocument Number

Size Date:

EAL20 LA-2461Sheet 3 of 47

R ev 0.3

, 04, 2004

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H_D#[0..63] U12A H_A#[3..31] H_A#[3..31] H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADSTB#0 H_ADSTB#1 CLK_CPU_ITP CLK_CPU_ITP#3

H_D#[0..63]

4

H_REQ#[0:4]

H_REQ#[0..4]

P4 U4 V3 R3 V2 W1 T4 W2 Y4 Y1 U1 AA3 Y3 AA2 AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1 R2 P3 T2 P1 T1 U3 AE5 A16 A15 B15 B14

A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31#

Banias

ADDR GROUP

DATA GROUP

REQ0# REQ1# REQ2# REQ3# REQ4# ADSTB0# ADSTB1# ITP_CLK0 ITP_CLK1 BCLK0 BCLK1

0.1U_0402_16V4Z

1

10K_0402_5%

CLK_CPU_BCLK CLK_CPU_BCLK#

HOST CLK

+VCCP

1

2 R152 56_0402_5%

H_ADS# H_BNR# H_BPRI# H_BR0# H_DEFER# H_DRDY# H_HIT# H_HITM# H_LOCK# H_CPURST# H_RS#0 H_RS#1 H_RS#2 H_TRDY#

H_IERR# H_CPURST# H_RS#0 H_RS#1 H_RS#2

N2 L1 J3 N4 L4 H2 K3 K4 A4 J2 B11 H1 K1 L2 M3

ADS# BNR# BPRI# BR0# DEFER# DRDY# HIT# HITM# IERR# LOCK# RESET# RS0# RS1# RS2# TRDY#

CONTROL GROUP

D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#

A19 A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26 D25 J26 T24 AD20 C23 K24 W25 AE24 C22 L24 W24 AE25

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

+VCCP 2

+VCCP 2

R144 54.9_0402_1% @ 1 H_CPURST# ITP_TDO 1

R147 54.9_0402_1% @

4

+VCCP 1 R149 1 R151 ITP_TMS 2 39.2_0603_1% ITP_TDI 2 150_0402_1% 1 R154 1 R153 ITP_TRST# 2 680_0402_5% ITP_TCK 2 27.4_0402_1%

Thermal Sensor ADI ADM1032AR+3VS W =15mil C94 R121@ C88 1 2 1 1 H_THERMDA 2 3 4 U11 VDD D+ DTHERM# SCLK SDATA ALERT# GND 8 7 6 5 EC_SMC_2 EC_SMD_2 3

H_THERMDC 2 2200P_0402_25V7K

2

Address:1001_100X

ADM1032AR_SOP8

+3VALW ITP_DBRESET#2

1 R145 2 150_0402_1% ITP_DBRESET#

C8 B8 A9 C9 R150 1 2 0_0402_5% A7 M2 B7 C19 A10 B10 H_PROCHOT# B17 H_CPUPWRGD H_CPUSLP# ITP_TCK ITP_TDI ITP_TDO TEST1 TEST2 ITP_TMS ITP_TRST# E4 A6 A13 C12 A12 C5 F23 C11 B13

BPM0# BPM1# BPM2# BPM3# DBR# DBSY# DPSLP# DPWR# PRDY# PREQ# PROCHOT# PWRGOOD SLP# TCK TDI TDO TEST1 TEST2 TMS TRST#

DINV0# DINV1# DINV2# DINV3# DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3#

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

EN_DFAN1

Fan Control circuit2

H_DBSY# H_DPSLP# H_DPWR# +VCCP 1 2 R374 330_0402_5% H_CPUSLP#

MISC

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

C412 0.1U_0402_16V4Z 1 2 5 1 2 R358 10K_0402_5% 6

Joint use LM358A with Power Battery detect circuit.PU5B LM358A_SO8 FAN1_ON 1 0 7 R361

+5VS

H_CPUPWRGD

+ -

C 2 100_0402_5% 1 C410 0.1U_0402_16V4Z 2 2 B E

1 C397 D21 Q32 10U_0805_10V4Z 2 FMMT619_SOT23 1SS355_SOD323 2 D20 1N4148_SOD80 1

R146 2 1 R378

H_THERMDA B18 H_THERMDC A18 H_THERMTRIP# C17

THERMDA DIODE THERMDC THERMTRIP# mFCBGA479

THERMAL

STPCLK# SMI#

C6 B4

H_STPCLK# H_SMI#

1 R364

2 8.2K_0402_5% 2

1

1 @ 1K_0402_5% 2 @ 1K_0402_5%

A20M# FERR# IGNNE# INIT# LINT0/INTR LINT1/NMI

C2 D3 A3 B5 D1 D4

H_IGNNE# H_INIT# H_INTR H_NMI

3

H_A20M#

H_A20M# H_FERR# H_IGNNE# H_INIT# H_INTR H_NMI H_STPCLK# H_SMI#

1

FAN1_VOUT 2 10K_0402_5% 1

JP7 1 2 3 ACES_85205-0300

LEGACY CPU FANSPEED1

+3VS

1 R297

1

2

@ C310 1000P_0402_50V7K

2

@ C313 1000P_0402_50V7K

1

H_PROCHOT#

1 R148

2

+VCCP +VCCP 1 R155 56_0402_5% 2 2 R156 56_0402_5% 1 THRMTRIP#

Close to Fan Conn.

1

56_0402_5%

H_THERMTRIP# TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.A B C D

Compal Electronics, Inc.Document Number

Size Date:

INTEL CPU BANIAS (1 of 2) EAL20 LA-2461E

Rev 0.3 of 47

, 04, 2004

Sheet

4

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R44 @ 1 1 R45 @1

54.9_0402_1% VCCSENSE AE7 2 VSSSENSE AF6 2 54.9_0402_1% +CPU_VCCA F26 B1 N1 AC26 P23 W4 D10 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16 K6 L5 L21 M6 M22 N5 N21 P6 P22 R5 R21 T6 T22 U21 D6 D8 D18 D20 D22 E5 E7 E9 E17 E19 E21 F6 F8 F18 E1 E2 F2 F3 G3 G4 H4 GTL_REF0 AD26 E26 G1 AC1 P25 P26 AB2 AB1 B2 AF7 C14 C3

U12B VCCSENSE VSSSENSE VCCA0 VCCA1 VCCA2 VCCA3 VCCQ0 VCCQ1 VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC PSI# VID0 VID1 VID2 VID3 VID4 VID5 GTLREF0 GTLREF1 GTLREF2 GTLREF3 COMP0 COMP1 COMP2 COMP3 RSVD RSVD RSVD RSVD TEST3 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS A2 A5 A8 A11 A14 A17 A20 A23 A26 B3 B6 B9 B12 B16 B19 B22 B25 C1 C4 C7 C10 C13 C15 C18 C21 C24 D2 D5 D7 D9 D11 D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1

+CPU_CORE

+CPU_CORE F20 F22 G5 G21 H6 H22 J5 J21 K22 U5 V6 V22 W5 W21 Y6 Y22 AA5 AA7 AA9 AA11 AA13 AA15 AA17 AA19 AA21 AB6 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC9 AC11 AC13 AC15 AC17 AC19 AD8 AD10 AD12 AD14 AD16 AD18 AE9 AE11 AE13 AE15 AE17 AE19 AF8 AF10 AF12 AF14 AF16 AF18

U12C VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24

1 + 2 C333 220U_D2_2VM @

1 + 2 C334 220U_D2_2VM

1 + 2 C336 220U_D2_2VM

1 + 2 C335 220U_D2_2VM

1

+1.8VS +1.5VS

1 R75 2 0_1206_5% 1 R108 2 @ 0_1206_5% +VCCP

+CPU_CORE 10U_1206_6.3V6M 1 C387 1 C382 1 C38 10U_1206_6.3V6M 1 1 C52 C443 2 2 10U_1206_6.3V6M 10U_1206_6.3V6M 1 1 C385 2 C383 10U_1206_6.3V6M

Dothan VCCA update(WW45 2003) Dothan B-Step support 1.5V only for VCCA

Banias

Banias

2 2 10U_1206_6.3V6M +CPU_CORE

2 2 10U_1206_6.3V6M

POWER, GROUNG, RESERVED SIGNALS AND NC

1 C409

10U_1206_6.3V6M 1 1 C442 C424

10U_1206_6.3V6M 1 1 C80 C43

10U_1206_6.3V6M 1 C39 2 1 C41 10U_1206_6.3V6M

2 2 10U_1206_6.3V6M +CPU_CORE

2 2 10U_1206_6.3V6M

2 2 10U_1206_6.3V6M

POWER, GROUND

10U_1206_6.3V6M 1 C42 2 2 10U_1206_6.3V6M +CPU_CORE 10U_1206_6.3V6M 1 C425 2 2 10U_1206_6.3V6M +CPU_CORE 10U_1206_6.3V6M 1 C40 2 2 10U_1206_6.3V6M 1 C62 1 C76 1 C408 1 C373 1 C63 1 C75

10U_1206_6.3V6M 1 C446 1 C444

10U_1206_6.3V6M 1 C386 2 1 C384 10U_1206_6.3V6M

2

2

+CPU_CORE

2 2 10U_1206_6.3V6M

2 2 10U_1206_6.3V6M

10U_1206_6.3V6M 1 C374 1 C441

10U_1206_6.3V6M 1 C375 2 1 C51 10U_1206_6.3V6M

Resistor placed within 0.5" of CPU pin.Trace should be at least 25 miles away from any other toggling signal. PSI# +VCCP 1 CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5

2 2 10U_1206_6.3V6M

2 2 10U_1206_6.3V6M

10U_1206_6.3V6M 1 C77 1 C78

10U_1206_6.3V6M 1 C79 2 1 C445 10U_1206_6.3V6M

R66 1K_0402_1% 2

2 2 10U_1206_6.3V6M

2 2 10U_1206_6.3V6M

2

3

R65 2K_0402_1% 1

1 C30 1U_0603_10V4Z

1 C29 220P_0402_50V7K COMP0 COMP1 COMP2 COMP3

2

2

Vcc-core Decoupling SPCAP,Polymer MLCC 0805 X5R

C,uF 4X220uF 35X10uF

ESR, mohm 12m ohm/4 5m ohm/35

ESL,nH 3.5nH/4 0.6nH/35

+CPU_VCCA

2 1 1 1 R88 27.4_0402_1% 2 R93 54.9_0402_1% 2 R60 R58 1

R158 1 C16 @ 1K_0402_5%

10U_1206_6.3V6M 1 C74 0.01U_0402_16V7K 1 C71 2 2 2 1 C34

10U_1206_6.3V6M 1 C37 2 2 1 C64

10U_1206_6.3V6M 1 C58 2 2 1 C104 2 1 C97 10U_1206_6.3V6M

M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 P5 P21 P24 R1 R4 R6 R22 R25 T3 T5 T21 T23

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS mFCBGA479

3

27.4_0402_1% 54.9_0402_1% 2 2

mFCBGA479

0.01U_0402_16V7K +VCCP 0.1U_0402_10V6K 14

0.01U_0402_16V7K

0.01U_0402_16V7K

0.1U_0402_10V6K 1 1 C413 2 2 C392 2 1

0.1U_0402_10V6K 1 C456 2 C404 2 1

0.1U_0402_10V6K 1 C454 2 C419 2 1 C437 2 1 C399 0.1U_0402_10V6K4

1 C113 + @

C93

+ 2

1 C457 2

1 C434 2

150U_D2_6.3VM

150U_D2_6.3VM 2

Resistor placed within 0.5" of CPU pin.Trace should be at least 25 miles away from any other toggling signal.

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K Title Size

0.1U_0402_10V6K

Compal Electronics, Inc. INTEL CPU BANIAS (2 of 2)Document Number , 04, 2004 R ev 0.3 5 of 47

A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Date: AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DC D

EAL20 LA-2461SheetE

5

4

3

2

1

U14A H_A#[3..31] H_REQ#[0..4]D

H_A#[3..31] H_REQ#[0..4] HUB_PD[0..10] H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADSTB#0 H_ADSTB#1 P23 T25 T28 R27 U23 U24 R24 U28 V28 U27 T27 V27 U25 V26 Y24 V25 V23 W25 Y25 AA27 W24 W23 W27 Y27 AA28 W28 AB27 Y26 AB28 R28 P25 R23 R25 T23 T26 AA26

H_D#[0..63]

Montara-GM(L)HA#3 HA#4 HA#5 HA#6 HA7# HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 HADSTB#0 HADSTB#1 BCLK# BCLK HYSWING HXSWING HYRCOMP HXRCOMP HVREF0 HVREF1 HVREF2 HCCVREF HAVREF HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3 DINV0# DINV1# DINV2# DINV3# CPURST# HL_0 HL_1 HL_2 HL_3 HL_4 HL_5 HL_6 HL_7 HL_8 HL_9 HL_10 HLSTB HLSTB# HLRCOMP PSWING HLVREF HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63

H_D#[0..63]

HUB_PD[0..10]

C

HOST

CLK_MCH_BCLK# CLK_MCH_BCLK R390 1 R134 1 2 27.4_0402_1% 2 27.4_0402_1% HDVREF HCCVREF HAVREF B

W=10mil

AD29 AE29 HY SWING K28 HXSWING B18 HYRCOMP H28 HXRCOMP B20 K21 J21 J17 Y28 Y22 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 CPURST# J28 C27 E22 D18 K27 D26 E21 E18 J25 E25 B25 G19 F15 U7 U4 U3 V3 W2 W6 V6 W7 T3 V5 V4 W3 V2 T2 U2 W1

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

K22 H27 K25 L24 J27 G28 L27 L23 L25 J24 H25 K23 G27 K26 J23 H26 F25 F26 B27 H23 E27 G25 F28 D27 G24 C28 B26 G22 C26 E26 G23 B28 B21 G21 C24 C23 D22 C25 E24 D24 G20 E23 B22 B23 F23 F21 C20 C21 G18 E19 E20 G17 D20 F19 C19 C17 F17 B19 G16 E16 C16 E17 D16 C18

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

HOST REF VOLTAGED

+VCCP 2

+VCCP 2

+VCCP 2

R137 301_0603_1% HXSWING 2

R138 301_0603_1%

R161 49.9_0603_1%

W=10mil (0.35V)C108 0.1U_0402_16V4Z

HY SWING R139 2

W=10mil (0.35V)C106 0.1U_0402_16V4Z

HCCVREF R162 2 C119

W=10mil2

1

1

1

(0.7V)C122 0.1U_0402_16V4Z

2

2

R136 150_0603_1% 1

1

150_0603_1% 1

1

+VCCP 2

+VCCP 2

R425 49.9_0603_1% HAVREF 2

R417 49.9_0603_1%

W=10mil (0.7V)C516 0.1U_0402_16V4Z

HDVREF 2 C494 2

W=20mil (0.7V)C490 0.1U_0402_16V4ZC

1

2

R427 1 100_0603_1% 1

R416 1 1U_0603_10V4Z 100_0603_1% 1

2

1

1

HUB I/F REF VOLTAGE+1.5VS 2

R171 80.6_0603_1% 1

HUB_VSWING 2 C145 0.1U_0402_16V4Z 1 2 2

W=20milHUB_VSWING C146 0.01U_0402_16V7K

(0.796V)

H_CPURST#

HUB I/F

+1.35VS

HUB_PSTRB HUB_PSTRB# 2 1 R461 37.4_0402_1%

HUB_PD0 HUB_PD1 HUB_PD2 HUB_PD3 HUB_PD4 HUB_PD5 HUB_PD6 HUB_PD7 HUB_PD8 HUB_PD9 HUB_PD10 HI_PSTRB HI_PSTRB# HUB_RCOMP HUB_VSWING HUB_VREF

R172 51.1_0603_1% 1 L28 M25 N24 M28 N28 N27 P27 M23 N25 P28 M26 N23 P26 M27

1

1 100_0603_1% 1U_0603_10V4Z 1

2

1

B

ADS# HTRDY# DRDY# DEFER# HITM# HIT# HLOCK# BREQ0# BNR# BPRI# DBSY# RS#0 RS#1 RS#2

H_ADS# H_TRDY# H_DRDY# H_DEFER# H_HITM# H_HIT# H_LOCK# H_BR0# H_BNR# H_BPRI# H_DBSY# H_RS#0 H_RS#1 H_RS#2

HUB_VREF 2 C169 0.1U_0402_16V4Z 1 2 2

W=20milHUB_VREF C170 0.01U_0402_16V7K

(0.35V)

R180 40.2_0603_1% 1

1

RG82855GME_uFCBGA732

A

A

Compal Electronics, Inc.TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.5 4 3 2

INTEL 855GME-HOST(1/4)Document Number

Size Date:

EAL20 LA-2461Sheet1

R ev 0.3 6 of 47

, 04, 2004

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U14B DVOC_D[0..11] DVOB_D[0..11] AGP_SBA[0..7] DVOC_D[0..11] DVOB_D[0..11] AGP_SBA[0..7] DVOB_D0 DVOB_D1 DVOB_D2 DVOB_D3 DVOB_D4 DVOB_D5 DVOB_D6 DVOB_D7 DVOB_D8 DVOB_D9 DVOB_D10 DVOB_D11 AGP_ADSTB0 AGP_ADSTB0# AGP_AD0 AGP_AD1 AGP_CBE#1 AGP_AD14 AGP_ADSTB0 AGP_ADSTB0# AGP_AD0 AGP_AD1 AGP_CBE#1 AGP_AD14 R3 R5 R6 R4 P6 P5 N5 P2 N2 N3 M1 M5 P3 P4 T6 T5 L2 M2

855GME DVO/AGP Pin MuxingBallC9 D9 C8 D8 A7 A8 H10 J9 E8 B6 G9 GMCH_CRT_B GMCH_CRT_G GMCH_CRT_R GMCH_CRT_HSYNC GMCH_CRT_VSYNC GMCH_CRT_CLK GMCH_CRT_DATA 2 CLK_MCH_48M 2 CLK_SSC_66M @ R142 33_0402_5% 1 2

Montara-GM(L)DVOBD0/(NC) DVOBD1/(NC) DVOBD2/(NC) DVOBD3/(NC) DVOBD4/(NC) DVOBD5/(NC) DVOBD6/(NC) DVOBD7/(NC) DVOBD8/(NC) DVOBD9/(NC) DVOBD10/(NC) DVOBD11/(NC) DVOBCLK/(NC) DVOBCLK#/(NC) DVOBHSYNC/(NC) DVOBVSYNC/(NC) DVOBBLANK#/(NC) DVOBFLDSTL/(NC) DVOBCINTR# DVOBCCLKINT DVOCCLK DVOCCLK# DVOCHSYNC DVOCVSYNC DVOCBLANK# DVOCFLDSTL MI2CCLK MI2CDATA MDVICLK MDVIDATA MDDCCLK MDDCDATA DVOCD0 DVOCD1 DVOCD2 DVOCD3 DVOCD4 DVOCD5 DVOCD6 DVOCD7 DVOCD8 DVOCD9 DVOCD10 DVOCD11 BLUE BLUE# GREEN GREEN# RED RED# HSYNC VSYNC REFSET DDCACLK DDCADATA

DVO ModeDVOBD0 DVOBD1 DVOBD2 DVOBD3 DVOBD4 DVOBD5 DVOBD6 DVOBD7 DVOBD8 DVOBD9 DVOBD10 DVOBD11 DVOBCLK DVOBCLK# DVOBHSYNC DVOBVSYNC DVOBBLANK DVOBFLDSTL DVOBCINTR# DVOBCCLKINT DVOCCLK DVOCCLK# DVOCHSYNC DVOCVSYNC DVOCBLANK DVOCFLDSTL MI2CCLK MI2CDATA MDVICLK MDVIDATA MDDCCLK MDDCDATA DVOCD0 DVOCD1 DVOCD2 DVOCD3 DVOCD4 DVOCD5 DVOCD6 DVOCD7 DVOCD8 DVOCD9 DVOCD10 DVOCD11 ADDID0 ADDID1 ADDID2 ADDID3 ADDID4 ADDID5 ADDID6 ADDID7 DVODETECT DPMS RVSD1 RVSD2 RVSD3 RVSD4 RVSD5 GST1 GST0 RVSD8 RVSD9 RVSD11

AGP ModeGAD3 GAD2 GAD5 GAD4 GAD7 GAD6 GAD8 GCBE#0 GAD10 GAD9 GAD12 GAD11 GADSTB0 GADSTB0# GAD0 GAD1 GCBE#1 GAD14 GAD30 GAD13 GADSTB1 GADSTB1# GAD17 GAD16 GAD18 GAD31 GIRDY# GDEVSEL# GTRDY# GFRAME# GSTOP# GAD15 GAD19 GAD20 GAD21 GAD22 GAD23 GCBE#3 GAD25 GAD24 GAD27 GAD26 GAD29 GAD28 GSBA0 GSBA1 GSBA2 GSBA3 GSBA4 GSBA5 GSBA6 GSBA7 GPAR GPIPE# GSBSTB GSBSTB# GGNT# GREQ# GST2 GST1 GST0 GWBF# GRBF# GCBE#2

REFSET

D

CLK_MCH_66M 1 @ R469 33_0402_5% 2

1

R420 127_0603_1% 1

R418 33_0402_5% @

@ C565 22P_0402_50V8J

1

AGP_AD30 DVOBC_CLKINT 2 DVOC_CLK DVOC_CLK# DVOC_HSYNC DVOC_VSYNC AGP_AD18 AGP_AD31 MI2CCLK MI2CDATA MDVICLK MDVIDATA MDDCCLK MDDCDATA

AGP_AD30 G2 DVOBC_CLKINT M3 DVOC_CLK DVOC_CLK# DVOC_HSYNC DVOC_VSYNC AGP_AD18 AGP_AD31 MI2CCLK MI2CDATA MDVICLK MDVIDATA MDDCCLK MDDCDATA DVOC_D0 DVOC_D1 DVOC_D2 DVOC_D3 DVOC_D4 DVOC_D5 DVOC_D6 DVOC_D7 DVOC_D8 DVOC_D9 DVOC_D10 DVOC_D11 J3 J2 K6 L5 L3 H5 K7 N6 N7 M6 P7 T7 K5 K1 K3 K2 J6 J5 H2 H1 H3 H4 H6 G3

DVO

C

2 R451 1 R434 1 R445

1 AGP_AD14 100K_0402_5% 2 AGP_AD31 100K_0402_5% 2 DVOBC_CLKINT 100K_0402_5%

LVDS

IYAM0 IYAM1 IYAM2 IYAM3 IYAP0 IYAP1 IYAP2 IYAP3 IYBM0 IYBM1 IYBM2 IYBM3 IYBP0 IYBP1 IYBP2 IYBP3 ICLKAM ICLKAP ICLKBM ICLKBP

G14 E15 C15 C13 F14 E14 C14 B13 H12 E12 C12 G11 G12 E11 C11 G10 D14 E13 E10 F10 B4 C5 G8 F8 A5 D12 F12 B12 A10 LIBG R409 CLK_MCH_48M CLK_SSC_66M LCLKCTLB 2 GMCH_LCD_CLK GMCH_LCD_DATA

GMCH_TXOUT0- GMCH_TXOUT1- GMCH_TXOUT2- GMCH_TXOUT0+ GMCH_TXOUT1+ GMCH_TXOUT2+ GMCH_TZOUT0- GMCH_TZOUT1- GMCH_TZOUT2- GMCH_TZOUT0+ GMCH_TZOUT1+ GMCH_TZOUT2+ GMCH_TXCLKGMCH_TXCLK+ GMCH_TZCLKGMCH_TZCLK+

C491 @ 22P_0402_50V8J

2

1

2 C107 @ 22P_0402_50V8J 1

DDCPCLK DDCPDATA

GMCH_LCD_CLK GMCH_LCD_DATA GMCH_ENBKL 2 22P_0402_50V8J +3VS 1 2 1.5K_0603_1%

PANELBKLTCTL PANELBKLTEN PANELVDDEN LVREFH LVREFL LVBG LIBG

GMCH_ENVDD

1 C507

+1.5VS

2 R437

1 AGP_AD30 100K_0402_5%

CLKS

AGP_BUSY#

reserved for DVO mode+1.5VS 2

R419 10K_0603_5% UMA@ Q35 BSN20_SOT23 RTCCLK 2 G UMA@ 1

MISC

1 R426

2 1K_0402_5%

AGP_SBA0 AGP_SBA1 AGP_SBA2 AGP_SBA3 AGP_SBA4 AGP_SBA5 AGP_SBA6 AGP_SBA7 AGP_PAR +AGP_VREF AGPBUSY# DVORCOMP CLK_MCH_66M AGP_SBSTB AGP_SBSTB# AGP_GNT# AGP_REQ# AGP_ST2 AGP_ST1 AGP_ST0 AGP_WBF# AGP_RBF# AGP_CBE#2

E5 F5 E3 E2 G5 F4 G6 F6 L7 D5 F1 F7 D1 Y3 AA5 F2 F3 B2 B3 C2 C3 C4 D2 D3 D7 L4

unpoped for 1.05V FSB LCLKCTLB: High for P4, NC for BaniasPCIRST# H_DPWR# H_DPSLP# PCIRST# VGATE EXTTS 1 R423 2 +3VS 10K_0402_5%

ADDID0 ADDID1 ADDID2 ADDID3 ADDID4 ADDID5 ADDID6 ADDID7 DVODETECT DPMS GVREF AGPBUSY# DVORCOMP GCLKIN RVSD0 RVSD1 RVSD2 RVSD3 RVSD4 RVSD5 GST[1] GST[0] RVSD8 RVSD9 RVSD10 RVSD11

DPWR#/(NC) DPSLP# RSTIN# PWROK

AA22 Y23 AD28 J11 D6 AJ1

AGP_PAR D +AGP_VREF CLK_MCH_66M

EXTTS0 MCHDETECTVSS

1

3

S

W=10mil2 R432 40.2_0603_1% 1

B

reserved for DVO mode

AGP_SBSTB AGP_SBSTB# AGP_GNT# AGP_REQ# AGP_ST2 AGP_ST1 AGP_ST0 AGP_WBF# AGP_RBF# AGP_CBE#2

NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11

B1 AH1 A2 AJ2 A28 AJ28 A29 B29 AH29 AJ29 AA9 AJ4

Isolating AGP singals (For M11P)*PCIRST# AGP_ST0 GST0 AGP_ST2 GST2 1 2 3 4 5 6 7 U39 OE1# 1A 1B OE2# 2A 2B GND M11@ VCC OE4# 4A 4B OE3# 3A 3B 14 13 12 11 10 9 8

1

1 2 AGPBUSY# R422 UMA@ 0_0402_5%

DREFCLK DREFSSCLK LCLKCTLA LCLKCTLB

B7 B17 H9 C6

CLK_MCH_48M CLK_SSC_66M

R421 510_0402_5% @

R3 R5 R6 R4 P6 P5 N5 P2 N2 N3 M1 M5 P3 P4 T6 T5 L2 M2 G2 M3 J3 J2 K6 L5 L3 H5 K7 N6 N7 M6 P7 T7 K5 K1 K3 K2 J6 J5 H2 H1 H3 H4 H6 G3 E5 F5 E3 E2 G5 F4 G6 F6 L7 D5 F2 F3 B2 B3 C2 C3 C4 D2 D3 L4

DAC

D

C

+5VS PCIRST# AGP_ST1 GST1 AGP_PAR GPAR +1.5VS

Starp Pin: (For UMA)+1.5VS AGP_ST0 AGP_ST1 AGP_ST2

B

NC

* * * *

R413 1 UMA@ 2 1K_0402_5% R405 1 UMA@ 2 1K_0402_5% R430 1 UMA@ 2 1K_0402_5% R412 1 @ 2 1K_0402_5%

FST3125MTCX_SSOP14 GST0 GST1 1 R414 1 R406 1 R415 1 R407 2 R401 M11@ M11@ M11@ M11@ @

RG82855GME_uFCBGA732

AGP_PAR

I2C BUS PULL UPMDVICLK MDDCCLK MDVIDATA MDDCDATA RP50 1 2 3 4 8 7 6 5

+1.5VS

+1.5VS 2

DVO/AGP REF Voltage

GST2

R439 1K_0603_1% 2 1 +AGP_VREF 2 C533 0.1U_0402_16V4Z +AGP_VREF

GPAR

2 1K_0402_5% 2 1K_0402_5% 2 1K_0402_5% 2 1K_0402_5% 1 1K_0402_5%

R411 1 UMA@ 2 1K_0402_5%

DVODETECT(AGP_PAR): HIGH for AGP, LOW for DVO

2.2K_1206_8P4R_5% MI2CCLK MI2CDATAA

R442 1 2.2K_0402_5% 1 2.2K_0402_5% 1K_0603_1% 1

2 R429 2 R441

1

Starp pin listST2 0 0 0 1 ST1 0 0 1 1 ST0 0 1 0 1 PSB/Mem/GFX 400 / 266 / 200 400 / 200 / 200 400 / 200 / 133 400 / 333 / 250 *TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.A

Compal Electronics, Inc. INTEL 855GME-AGP&LVDS(2/4)Document Number Size Date:

EAL20 LA-2461Sheet1

R ev 0.3 7 of 47

, 04, 2004

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DDR_SDQ[0..63] DDR_SDQS[0..7]

DDR_SDQ[0..63] DDR_SDQS[0..7]

DDR_SMA[6..12] DDR_SDM[0..7]

DDR_SMA[6..12] DDR_SDM[0..7]

U14D C1 G1 L1 U1 AA1 AE1 R2 AG3 AJ3 D4 G4 K4 N4 T4 W4 AA4 AC4 AE4 B5 U5 Y5 Y6 AG6 C7 E7 G7 J7 M7 R7 AA7 AE7 AJ7 H8 K8 P8 T8 V8 Y8 AC8 E9 L9 N9 R9 U9 W9 AB9 AG9 C10 J10 AA10 AE10 D11 F11 H11 AB11 AC11 AJ11 J12 AA12 AG12 A13 D13 F13 H13 N13 R13 U13 AB13 AE13 J14 P14 T14 AA14 AC14 D15 H15 N15 R15 U15 AB15 AG15 F16 J16 P16 T16 AA16 AE16 A17 D17 H17 N17 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 RG82855GME_uFCBGA732 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 R17 U17 AB17 AC17 F18 J18 AA18 AG18 A19 D19 H19 AB19 AE19 F20 J20 AA20 AC20 A21 D21 H21 M21 P21 T21 V21 Y21 AA21 AB21 AG21 B24 F22 J22 L22 N22 R22 U22 W22 AE22 A23 D23 AA23 AC23 AJ23 F24 H24 K24 M24 P24 T24 V24 AA24 AG24 A25 D25 AA25 AE25 G26 J26 L26 N26 R26 U26 W26 AB26 A27 F27 AC27 AG27 AJ27 AC28 AE28 C29 E29 G29 J29 L29 N29 U29 W29 AA29 AJ10 AJ12 AJ18 AJ20 C22 D28 E28 L6 T9 AJ26

U14C

D

DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5

DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12

AC18 AD14 AD13 AD17 AD11 AC13 AD8 AD7 AC6 AC5 AC19 AD5 AB5

Montara-GM(L)SMA0 SMA1 SMA2 SMA3 SMA4 SMA5 SMA6 SMA7 SMA8 SMA9 SMA10 SMA11 SMA12 SDQ0 SDQ1 SDQ2 SDQ3 SDQ4 SDQ5 SDQ6 SDQ7 SDQ8 SDQ9 SDQ10 SDQ11 SDQ12 SDQ13 SDQ14 SDQ15 SDQ16 SDQ17 SDQ18 SDQ19 SDQ20 SDQ21 SDQ22 SDQ23 SDQ24 SDQ25 SDQ26 SDQ27 SDQ28 SDQ29 SDQ30 SDQ31 SDQ32 SDQ33 SDQ34 SDQ35 SDQ36 SDQ37 SDQ38 SDQ39 SDQ40 SDQ41 SDQ42 SDQ43 SDQ44 SDQ45 SDQ46 SDQ47 SDQ48 SDQ49 SDQ50 SDQ51 SDQ52 SDQ53 SDQ54 SDQ55 SDQ56 SDQ57 SDQ58 SDQ59 SDQ60 SDQ61 SDQ62 SDQ63

DDR_SDQS0 DDR_SDQS1 DDR_SDQS2 DDR_SDQS3 DDR_SDQS4 DDR_SDQS5 DDR_SDQS6 DDR_SDQS7

AG2 AH5 AH8 AE12 AH17 AE21 AH24 AH27 AD15 AD25 AC21 AC24 AB2 AA2 AC26 AB25 AC3 AD4 AC2 AD2 AB23 AB24 AA3 AB4 AC7 AB7 AC9 AC10 AD23 AD26 AC22 AC25

SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7 SDQS8 SWE# SRAS# SCAS# SCK0 SCK0# SCK1 SCK1# SCK2 SCK2# SCK3 SCK3# SCK4 SCK4# SCK5 SCK5# SCKE0 SCKE1 SCKE2 SCKE3 SCS#0 SCS#1 SCS#2 SCS#3 SBA0 SBA1 SDM0 SDM1 SDM2 SDM3 SDM4 SDM5 SDM6 SDM7 SDM8 SMA_B1 SMA_B2 SMA_B4 SMA_B5 RCVENOUT# RCVENIN# SMRCOMP SMVSWINGL SMVSWINGH

MEMORY

DDR_SWE# DDR_SRAS# DDR_SCAS# DDR_CLK0 DDR_CLK0# DDR_CLK1 DDR_CLK1# DDR_CLK3 DDR_CLK3# DDR_CLK4 DDR_CLK4#

DDR_SWE# DDR_SRAS# DDR_SCAS#

C

Montara-GM(L)

DDR REF & SWING VOLTAGE+2.5V

DDR_CKE0 DDR_CKE1 DDR_CKE2 DDR_CKE3 DDR_SCS#0 DDR_SCS#1 DDR_SCS#2 DDR_SCS#3 DDR_SBS0 DDR_SBS1 DDR_SDM0 DDR_SDM1 DDR_SDM2 DDR_SDM3 DDR_SDM4 DDR_SDM5 DDR_SDM6 DDR_SDM7

DDR_SBS0 DDR_SBS1

AD22 AD20 AE5 AE6 AE9 AH12 AD19 AD21 AD24 AH28 AH15 AD16 AC12 AF11 AD10 AC15 AC16

C577

2

0.1U_0402_16V4Z 1 2B

R482 60.4_0603_1% SMRCOMP

W=10mil

AF2 AE3 AF4 AH2 AD3 AE2 AG4 AH3 AD6 AG5 AG7 AE8 AF5 AH4 AF7 AH6 AF8 AG8 AH9 AG10 AH7 AD9 AF10 AE11 AH10 AH11 AG13 AF14 AG11 AD12 AF13 AH13 AH16 AG17 AF19 AE20 AD18 AE18 AH18 AG19 AH20 AG20 AF22 AH22 AF20 AH19 AH21 AG22 AE23 AH23 AE24 AH25 AG23 AF23 AF25 AG25 AH26 AE26 AG28 AF28 AG26 AF26 AE27 AD27

DDR_SDQ0 DDR_SDQ1 DDR_SDQ2 DDR_SDQ3 DDR_SDQ4 DDR_SDQ5 DDR_SDQ6 DDR_SDQ7 DDR_SDQ8 DDR_SDQ9 DDR_SDQ10 DDR_SDQ11 DDR_SDQ12 DDR_SDQ13 DDR_SDQ14 DDR_SDQ15 DDR_SDQ16 DDR_SDQ17 DDR_SDQ18 DDR_SDQ19 DDR_SDQ20 DDR_SDQ21 DDR_SDQ22 DDR_SDQ23 DDR_SDQ24 DDR_SDQ25 DDR_SDQ26 DDR_SDQ27 DDR_SDQ28 DDR_SDQ29 DDR_SDQ30 DDR_SDQ31 DDR_SDQ32 DDR_SDQ33 DDR_SDQ34 DDR_SDQ35 DDR_SDQ36 DDR_SDQ37 DDR_SDQ38 DDR_SDQ39 DDR_SDQ40 DDR_SDQ41 DDR_SDQ42 DDR_SDQ43 DDR_SDQ44 DDR_SDQ45 DDR_SDQ46 DDR_SDQ47 DDR_SDQ48 DDR_SDQ49 DDR_SDQ50 DDR_SDQ51 DDR_SDQ52 DDR_SDQ53 DDR_SDQ54 DDR_SDQ55 DDR_SDQ56 DDR_SDQ57 DDR_SDQ58 DDR_SDQ59 DDR_SDQ60 DDR_SDQ61 DDR_SDQ62 DDR_SDQ63

D

C

1

B

(1.25V)

1

R478 60.4_0603_1% DDR_SMA_B1 DDR_SMA_B2 DDR_SMA_B4 DDR_SMA_B5 DDR_SMA_B1 DDR_SMA_B2 DDR_SMA_B4 DDR_SMA_B5 2

+2.5V 1

SDQ64 SDQ65 SDQ66 SDQ67 SDQ68 SDQ69 SDQ70 SDQ71

AG14 AE14 AE17 AG16 AH14 AE15 AF16 AF17

+2.5V

2 C142 0.1U_0402_16V4Z 1 SMVREF0 2

1 R166 75_0603_1% 2 1 R168 75_0603_1% 2

R174 604_0603_1% 2

SMRCOMP

AB1 AJ22 AJ19

SMVREF0

AJ24

W=10mil (0.497V)C154

SMVSWINGL 2

SMVSWINGL SMVSWINGH

W=20mil

2

RG82855GME_uFCBGA732

C148 0.1U_0402_16V4Z 1

C149 0.1U_0402_16V4Z 1

R175 150_0603_1% 2

1

1 0.1U_0402_16V4Z

+2.5V 1A A

R181 150_0603_1% 2

W=10mil (2.002V)

SMVSWINGH 2

Compal Electronics, Inc.TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.4 3 2

R185 604_0603_1% 2

1

1

C171 0.1U_0402_16V4Z

INTEL 855GME DDR(3/4)Document Number

Size Date:

EAL20 LA-2461Sheet1

R ev 0.3 8 of 47

, 04, 2004

5

5

4

3

2

1

U14E +1.35VS J15 P13 T13 N14 R14 U14 P15 T15 AA15 N16 R16 U16 P17 T17 AA17 AA19 W21 H14 V1 Y1 W5 U6 U8 W8 V7 V9 +1.35VS_PLLA +1.35VS_PLLB D29 Y2 A6 B16 +1.5VS E1 J1 N1 E4 J4 M4 E6 H7 J8 L8 M8 N8 R8 K9 M9 P9 A9 B9 B8 A11 B11 G13 B14 J13 B15 F9 B10 D10 A12 A3 A4 VCCDVO_0 VCCDVO_1 VCCDVO_2 VCCDVO_3 VCCDVO_4 VCCDVO_5 VCCDVO_6 VCCDVO_7 VCCDVO_8 VCCDVO_9 VCCDVO_10 VCCDVO_11 VCCDVO_12 VCCDVO_13 VCCDVO_14 VCCDVO_15 VCCADAC0 VCCADAC1 VSSADAC VCCALVDS VSSALVDS VCCDLVDS0 VCCDLVDS1 VCCDLVDS2 VCCDLVDS3 VCCTXLVDS0 VCCTXLVDS1 VCCTXLVDS2 VCCTXLVDS3 VCCGPIO_0 VCCGPIO_1 VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 +VCCP +1.35VS

Montara-GM(L)

D

+1.35VS

VCCHL0 VCCHL1 VCCHL2 VCCHL3 VCCHL4 VCCHL5 VCCHL6 VCCHL7 VCCAHPLL VCCAGPLL VCCADPLLA VCCADPLLB

VTTLF0 VTTLF1 VTTLF2 VTTLF3 VTTLF4 VTTLF5 VTTLF6 VTTLF7 VTTLF8 VTTLF9 VTTLF10 VTTLF11 VTTLF12 VTTLF13 VTTLF14 VTTLF15 VTTLF16 VTTLF17 VTTLF18 VTTLF19 VTTLF20 VTTHF0 VTTHF1 VTTHF2 VTTHF3 VTTHF4

G15 H16 H18 J19 H20 L21 N21 R21 U21 H22 M22 P22 T22 V22 Y29 K29 F29 AB29 A26 A20 A18 A22 A24 H29 M29 V29 AC1 AG1 AB3 AF3 Y4 AJ5 AA6 AB6 AF6 Y7 AA8 AB8 Y9 AF9 AJ9 AB10 AA11 AB12 AF12 AA13 AJ13 AB14 AF15 AB16 AJ17 AB18 AF18 AB20 AF21 AJ21 AB22 AF24 AJ25 AF27 AC29 AF29 AG29 2 0.1U_0402_16V4Z 1 C103 0.1U_0402_16V4Z 2 1 C96 0.1U_0402_16V4Z 2 1 C476 2 1 C481 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 1 C489

(1.8A)C569 1 + 1 C539

For VCC2 C509 2 2 2 2 2 2 2

C496

C527

C538

C517

C524

C512

C553

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 150U_D2_6.3VM 2 2 1 1 1 1 1 10U_0805_10V4Z 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z

D

+1.35VS

+1.35VS_PLLA

+1.35VS 1 R159 2 1_0805_5% UMA@

+1.35VS_PLLB

+1.35VS 1 R143 2 1_0805_5% UMA@

W=20mil (90mA)1 2 C547

For VCCHL2 2 2 1 C92 C116 +

W=20mil (0.4A)2

W=20mil (0.4A)1 2 C112

C526

C544

C564

C115

For VCCADPLLA

C111

+

For VCCADPLLB

10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 1 1 1 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z

0.1U_0402_16V4Z UMA@ 2 1 220U_D2_4VM_R12 UMA@

220U_D2_4VM_R12 2 1 UMA@ 0.1U_0402_16V4Z UMA@

Close to ball D29, Y2+1.5VS +1.5VS +1.5VS

C

+1.5VS

+1.5VS

+1.5VS

VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8 VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36

POWER

W=40mil (90mA)+2.5V 1 C550 + 1 C531 2

For VCCDVO2 2

W=20mil (70mA) For VCCADAC2 2

W=20mil (90mA) For VCCALVDS2 C551 0.01U_0402_16V7K 1 UMA@C

C532

C500

C114

10U_0805_10V4Z 0.1U_0402_16V4Z 2 2 1 1 150U_D2_6.3VM 0.1U_0402_16V4Z

C492 0.01U_0402_16V7K 1 1 UMA@ 0.1U_0402_16V4Z UMA@

C513 0.1U_0402_16V4Z UMA@ 1

+2.5V +1.5VS

W=20mil (90mA) W=20mil (70mA) For VCCDLVDS1 C542 2 C523

For VCCTXLVDS2 C545 2 C515

C503 C529 22U_1206_16V4Z_V1 2 1 0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z UMA@ 0.1U_0402_16V4Z 1 1 UMA@ UMA@ 2 UMA@ 1 22U_1206_16V4Z_V1 0.1U_0402_16V4Z

reserved for GMCH, no need when use external VGA+2.5V

+2.5V

(1.9A)+2.5V_QSM VCCQSM0 VCCQSM1 VCCASM0 VCCASM1 AJ6 AJ8 AD1 AF1 2 2 2 2 2 2 2 2 2 2 2 2 C558 C581 C573 C546 C566 C562 C534 C528 C508 C563 C543 C510 C189 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 1 1 1 1 1 1 1 1 1 1 150U_D2_6.3VM 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z 0.1U_0402_16V4Z + 1

+3VSB

+1.35VS_ASM

B

+3VS

+VCCP

+2.5V_QSM

+2.5V 1 R483 2 0_0603_5%

+1.35VS_ASM

+1.35VS

For VCCGPIORG82855GME_uFCBGA732 1 2 1 C495 +

(72mA)2 C499 2 2 C497 2

W=20mil1

W=20mil1 C591 1 C582

For VCCASM2 C590

1 R506

2 0_0603_5%

For VCCQSM

C501 C505 10U_0805_10V4Z 2 1 0.1U_0402_16V4Z

C493

10U_0805_10V4Z 0.1U_0402_16V4Z 2 1 1 150U_D2_6.3VM 0.1U_0402_16V4Z 1

C584 C575 4.7U_0805_10V4Z 1 0.1U_0402_16V4Z 2 R499 1

2 1_0603_1%

2 2 0.1U_0402_16V4Z 1 10U_0805_10V4Z 10U_0805_10V4Z

A

A

Compal Electronics, Inc.TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.5 4 3 2

INTEL 855GME GMCH(4/4)Document Number

Size Date:

EAL20 LA-2461Sheet1

R ev 0.3 9 of 47

, 04, 2004

5

4

3

2

1

+2.5V +2.5V JP24 0.1U_0402_16V4Z 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 A35 A37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 VREF VSS DQ0 DQ1 VDD DQS0 DQ2 VSS DQ3 DQ8 VDD DQ9 DQS1 VSS DQ10 DQ11 VDD CK0_A CK0#_A VSS DQ16 DQ17 VDD DQS2 DQ18 VSS DQ19 DQ24 VDD DQ25 DQS3 VSS DQ26 DQ27 VDD VREF VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7 DQ12 VDD DQ13 DM1 VSS DQ14 DQ15 VDD VDD VSS VSS DQ20 DQ21 VDD DM2 DQ22 VSS DQ23 DQ28 VDD DQ29 DM3 VSS DQ30 DQ31 VDD 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 +2.5V

1 R589 75_0603_1%

2

+1.25VS_SDREF

DDR_SDQ62 DDR_SDQ56 DDR_SDQS7 DDR_SDQ58

4 3 2 1

10_0804_8P4R_5% 5 DDR_DQ62 6 DDR_DQ56 7 DDR_DQS7 8 DDR_DQ58 RP45 10_0804_8P4R_5% 5 DDR_DQ63 6 DDR_DQ50 7 DDR_DQ55 8 DDR_DQS6 RP47 10_0804_8P4R_5% 5 DDR_DQ49 6 DDR_DQ52 7 DDR_DQ43 8 DDR_DQ42 RP49 10_0804_8P4R_5% 5 DDR_DQS5 6 DDR_DQ40 7 DDR_DQ44 8 DDR_DQ34 RP52 10_0804_8P4R_5% 5 DDR_DQ38 6 DDR_DQS4 7 DDR_DQ37 8 DDR_DQ32 RP54

DDR_DQ60 DDR_DQ61 DDR_DM7 DDR_DQ57

RP44 8 7 6 5 1 2 3 4

DDR_SDQ60 DDR_SDQ61 DDR_SDM7 DDR_SDQ57

1

0.1U_0402_16V4Z

DDR_DQ0 DDR_DQ3 DDR_DQS0 DDR_DQ5 DDR_DQ1 DDR_DQ8 DDR_DQ13 DDR_DQS1 DDR_DQ14 DDR_DQ15 DDR_CLK0 DDR_CLK0#

DDR_DQ2 DDR_DQ7 DDR_DM0 DDR_DQ4 DDR_DQ6 DDR_DQ9 DDR_DQ12 DDR_DM1 DDR_DQ11 DDR_DQ10

C654

1

C655

R580 75_0603_1%

2

2 2

DDR_SDQ63 DDR_SDQ50 DDR_SDQ55 DDR_SDQS6

4 3 2 1

DDR_DQ59 DDR_DQ51 DDR_DQ54 DDR_DM6

10_0804_8P4R_5% RP46 8 1 7 2 6 3 5 4 10_0804_8P4R_5% RP48 8 1 7 2 6 3 5 4 10_0804_8P4R_5% RP51 8 1 7 2 6 3 5 4 10_0804_8P4R_5% RP53 8 1 7 2 6 3 5 4 10_0804_8P4R_5%

1

DDR_SDQ59 DDR_SDQ51 DDR_SDQ54 DDR_SDM6

D

DDR_SDQ49 DDR_SDQ52 DDR_SDQ43 DDR_SDQ42

4 3 2 1

DDR_DQ53 DDR_DQ48 DDR_DQ46 DDR_DQ47

DDR_SDQ53 DDR_SDQ48 DDR_SDQ46 DDR_SDQ47

D

DDR_SDQS5 DDR_SDQ40 DDR_SDQ44 DDR_SDQ34 DDR_DQ17 DDR_DQ21 DDR_DM2 DDR_DQ19 DDR_DQ23 DDR_DQ28 DDR_DQ29 DDR_DM3 DDR_DQ30 DDR_DQ31 DDR_SWE# DDR_SMA10 DDR_SBS0

4 3 2 1

DDR_DM5 DDR_DQ45 DDR_DQ41 DDR_DQ35

DDR_SDM5 DDR_SDQ45 DDR_SDQ41 DDR_SDQ35

DDR_DQ16 DDR_DQ20 DDR_DQS2 DDR_DQ22 DDR_DQ18 DDR_DQ24 DDR_DQ25 DDR_DQS3 DDR_DQ26 DDR_DQ27

DDR_SDQ38 DDR_SDQS4 DDR_SDQ37 DDR_SDQ32

4 3 2 1

DDR_DQ39 DDR_DM4 DDR_DQ33 DDR_DQ36

DDR_SDQ39 DDR_SDM4 DDR_SDQ33 DDR_SDQ36

RP16 1 2 3 4 8 7 6 5

DDR_F_SWE# DDR_F_SMA10 DDR_F_SBS0

DDR_SCAS# DDR_SRAS# DDR_SBS1 DDR_SMA0

RP55 1 2 3 4

8 DDR_F_SCAS# 7 DDR_F_SRAS# DDR_F_SBS1 6 DDR_F_SMA0 5C

C

DDR_CKE1

DDR_CKE1 DDR_F_SMA12 DDR_F_SMA9 DDR_F_SMA7 DDR_SMA5 DDR_F_SMA3 DDR_SMA1 DDR_F_SMA10 DDR_F_SBS0 DDR_F_SWE# DDR_SCS#0 DDR_DQ32 DDR_DQ37 DDR_DQS4 DDR_DQ38 DDR_DQ34 DDR_DQ44 DDR_DQ40 DDR_DQS5

DDR_SMA5 DDR_SMA1

DDR_SCS#0

B

DDR_DQ42 DDR_DQ43

DDR_DQ52 DDR_DQ49 DDR_DQS6 DDR_DQ55 DDR_DQ50 DDR_DQ63 DDR_DQ58 DDR_DQS7 DDR_DQ56 DDR_DQ62 SMB_DATA SMB_CLK +3VS DDR_CLK3 DDR_CLK3# DDR_CKE3A

DDR_CKE3 DDR_SMA12 DDR_SMA9 DDR_SMA7 DDR_SMA3 DDR_SMA10 DDR_SBS0 DDR_SWE# DDR_SCS#2

DDR_SMA12 DDR_SMA9 DDR_SMA7 DDR_SMA_B5 DDR_SMA3 DDR_SMA_B1 DDR_SMA10 DDR_SBS0 DDR_SWE# DDR_SCS#2 DDR_CLK4# DDR_CLK4

85 87 A89 A91 93 A95 A97 A99 A101 103 A105 A107 A109 A111 113 A115 A117 A119 A121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 B35 B37 B95 B97 B99 B101 B105 B107 B109 B111 B115 B117 B119 B121 B158 B160

DU VSS CK2_A CK2#_A VDD CKE1_A DU/A13_A A12_A A9_A VSS A7_A A5_A A3_A A1_A VDD A10/AP_A BA0_A WE#_A S0#_A DU VSS DQ32 DQ33 VDD DQS4 DQ34 VSS DQ35 DQ40 VDD DQ41 DQS5 VSS DQ42 DQ43 VDD VDD VSS VSS DQ48 DQ49 VDD DQS6 DQ50 VSS DQ51 DQ56 VDD DQ57 DQS7 VSS DQ58 DQ59 VDD SDA SCL VDD_SPD VDD_ID CK0_B CK0#_B CKE1_B DU(A13)_B A12_B A9_B A7_B A5_B A3_B A1_B A10/AP_B BA0_B WE#_B S0#_B CK1#_B CK1_B QUASA_CA0184-218Y61

DU/RESET# VSS VSS VDD VDD CKE0_A DU/BA2 A11_A A8_A VSS A6_A A4_A A2_A A0_A VDD BA1_A RAS#_A CAS#_A S1#_A DU VSS DQ36 DQ37 VDD DM4 DQ38 VSS DQ39 DQ44 VDD DQ45 DM5 VSS DQ46 DQ47 VDD CK1#_A CK1_A VSS DQ52 DQ53 VDD DM6 DQ54 VSS DQ55 DQ60 VDD DQ61 DM7 VSS DQ62 DQ63 VDD SA0_A SA1_A SA2_A DU CK2_B CK2#_B CKE0_B A11_B A8_B A6_B A4_B A2_B A0_B BA1_B RAS#_B CAS#_B S1#_B SA0_B SA1_B SA2_B

86 88 90 92 94 A96 98 A100 A102 104 A106 A108 A110 A112 114 A116 A118 A120 A122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 A158 A160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 A194 A196 A198 200 B89 B91 B96 B100 B102 B106 B108 B110 B112 B116 B118 B120 B122 B194 B196 B198

10_0804_8P4R_5%

10_0804_8P4R_5%

DDR_CKE0 DDR_F_SMA11 DDR_F_SMA8 DDR_F_SMA6 DDR_SMA4 DDR_SMA2 DDR_F_SMA0 DDR_F_SBS1 DDR_F_SRAS# DDR_F_SCAS# DDR_SCS#1 DDR_DQ36 DDR_DQ33 DDR_DM4 DDR_DQ39 DDR_DQ35 DDR_DQ41 DDR_DQ45 DDR_DM5 DDR_DQ47 DDR_DQ46

DDR_CKE0

DDR_SMA3 DDR_SMA7 DDR_SMA9 DDR_SMA12

RP19 1 2 3 4 8 7 6 5

DDR_F_SMA3 DDR_F_SMA7 DDR_F_SMA9 DDR_F_SMA12

DDR_SMA6 DDR_SMA8 DDR_SMA11

RP56 1 2 3 4 8 7 6 5

DDR_F_SMA6 DDR_F_SMA8 DDR_F_SMA11

DDR_SMA4 DDR_SMA2 DDR_SDQ27 DDR_SDQ26 DDR_SDQS3 DDR_SDQ25 DDR_SCS#1 DDR_SDQ24 DDR_SDQ18 DDR_SDQ22 DDR_SDQS2 4 3 2 1 4 3 2 1

10_0804_8P4R_5% 10_0804_8P4R_5% 5 DDR_DQ27 6 DDR_DQ26 7 DDR_DQS3 8 DDR_DQ25 RP58 10_0804_8P4R_5% 5 DDR_DQ24 6 DDR_DQ18 7 DDR_DQ22 8 DDR_DQS2 RP60 DDR_SDQ20 1 R537 DDR_SDQ16 1 R545 DDR_SDQ15 1 R559 DDR_SDQ14 1 R565 2 DDR_DQ20 10_0402_5% 2 DDR_DQ16 10_0402_5% 2 DDR_DQ15 10_0402_5% 2 DDR_DQ14 10_0402_5% DDR_DQ31 DDR_DQ30 DDR_DM3 DDR_DQ29 8 7 6 5

10_0804_8P4R_5% RP57 1 2 3 4 DDR_SDQ31 DDR_SDQ30 DDR_SDM3 DDR_SDQ29

DDR_DQ28 DDR_DQ23 DDR_DQ19 DDR_DM2

10_0804_8P4R_5% RP59 8 7 6 5 10_0804_8P4R_5%

1 2 3 4

DDR_SDQ28 DDR_SDQ23 DDR_SDQ19 DDR_SDM2

DDR_DQ21 2 10_0402_5% DDR_DQ17 2 10_0402_5% DDR_DQ10 2 10_0402_5% DDR_DQ11 2 10_0402_5%

1 DDR_SDQ21 R536 1 DDR_SDQ17 R542 1 DDR_SDQ10 R558 1 DDR_SDQ11 R564

B

DDR_CLK1# DDR_CLK1 DDR_DQ48 DDR_DQ53 DDR_DM6 DDR_DQ54 DDR_DQ51 DDR_DQ59 DDR_DQ57 DDR_DM7 DDR_DQ61 DDR_DQ60 DDR_SDQS1 DDR_SDQ13 DDR_SDQ8 DDR_SDQ1 4 3 2 1

10_0804_8P4R_5% 5 DDR_DQS1 6 DDR_DQ13 7 DDR_DQ8 8 DDR_DQ1 RP62 10_0804_8P4R_5% 5 DDR_DQ5 6 DDR_DQS0 7 DDR_DQ3 8 DDR_DQ0 RP64

DDR_DM1 DDR_DQ12 DDR_DQ9 DDR_DQ6

RP61 8 7 6 5 1 2 3 4

DDR_SDM1 DDR_SDQ12 DDR_SDQ9 DDR_SDQ6

10_0804_8P4R_5% DDR_DQ4 DDR_DM0 DDR_DQ7 DDR_DQ2 RP63 8 7 6 5 1 2 3 4 DDR_SDQ4 DDR_SDM0 DDR_SDQ7 DDR_SDQ2

DDR_SDQ5 DDR_SDQS0 DDR_SDQ3 DDR_SDQ0

4 3 2 1

10_0804_8P4R_5% DDR_CKE2 DDR_SMA11 DDR_SMA8 DDR_SMA6 DDR_SMA0 DDR_SBS1 DDR_SRAS# DDR_SCAS# DDR_SCS#3 DDR_CKE2 DDR_SMA11 DDR_SMA8 DDR_SMA6 DDR_SMA_B4 DDR_SMA_B2 DDR_SMA0 DDR_SBS1 DDR_SRAS# DDR_SCAS# DDR_SCS#3 +3VS

DDR_SDQ[0..63] DDR_SDM[0..7] DDR_SDQS[0..7]

DDR_SDQ[0..63] DDR_SDM[0..7] DDR_SDQS[0..7]

DDR_DQ[0..63] DDR_DM[0..7] DDR_DQS[0..7]

A

DDR_DQ[0..63] DDR_DM[0..7] DDR_DQS[0..7]

Compal Electronics, Inc.TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDR-SODIMMDocument Number

Size Date:

EAL20 LA-2461Sheet1

R ev 0.3 10 of 47

, 04, 2004

5

4

3

2

A

B

C

D

E

+1.25VS

Layout note :Distribute as close as possible to DDR-SODIMM.

DDR_DQ62 DDR_DQ56 DDR_DQS7 DDR_DQ58

RP5 1 2 3 4 8 7 6 5 56_0804_8P4R_5% 1 2 3 4

RP4 8 7 6 5

DDR_SMA[6..12] DDR_DQ60 DDR_DQ61 DDR_DM7 DDR_DQ57 DDR_DQ[0..63] DDR_DQS[0..7] DDR_DM[0..7] DDR_DQ59 DDR_DQ51 DDR_DQ54 DDR_DM6

DDR_SMA[6..12] DDR_DQ[0..63] DDR_DQS[0..7] DDR_DM[0..7]

56_0804_8P4R_5% RP6 1 2 3 4 8 7 6 5

+2.5V

DDR_DQ63 DDR_DQ50 DDR_DQ55 DDR_DQS6 1 1 C633 0.1U_0402_16V4Z C634 0.1U_0402_16V4Z 1 C570 0.1U_0402_16V4Z 1 C519 0.1U_0402_16V4Z 1 C502 0.1U_0402_16V4Z 1 C557 0.1U_0402_16V4Z 1 C574 0.1U_0402_16V4Z 1 C572 0.1U_0402_16V4Z DDR_DQ49 DDR_DQ52 DDR_DQ43 DDR_DQ42

RP7 1 2 3 4 8 7 6 5 56_0804_8P4R_5% RP9 1 2 3 4 8 7 6 5 56_0804_8P4R_5% 1 2 3 4

1

1 C608 0.1U_0402_16V4Z

56_0804_8P4R_5% RP8 8 7 6 5 DDR_DQ53 DDR_DQ48 DDR_DQ46 DDR_DQ47

1

2

2

2

2

2

2

2

2

2

+2.5V

+2.5V DDR_DQS5 DDR_DQ40 DDR_DQ44 DDR_DQ34 C215 150U_D2_6.3VM DDR_DQ38 DDR_DQS4 DDR_DQ37 DDR_DQ32 1 2 3 4

56_0804_8P4R_5% RP10 1 2 3 4 8 7 6 5 DDR_DM5 DDR_DQ45 DDR_DQ41 DDR_DQ35

RP11 8 7 6 5 56_0804_8P4R_5% RP13 1 2 3 4 8 7 6 5 56_0804_8P4R_5% 1 2 3 4

1 C593 0.1U_0402_16V4Z

1 C556 0.1U_0402_16V4Z

1 C594 0.1U_0402_16V4Z

1 C607 0.1U_0402_16V4Z +

1 + 2 C118 150U_D2_6.3VM

1

2

2

2

2

2

56_0804_8P4R_5% RP12 8 7 6 5 DDR_DQ39 DDR_DM4 DDR_DQ33 DDR_DQ36

56_0804_8P4R_5%

Layout note :Place one cap close to every 2 pull up resistors termination to +1.25V2

DDR_SCS#2 DDR_SWE#

DDR_SCS#2 DDR_SWE# DDR_SMA10 DDR_SBS0 DDR_SMA_B1

1 R173 8 7 6 5

RP15

2 56_0402_5% 1 2 3 4

1 R169 8 7 6 5

RP14

2 DDR_SCS#1 56_0402_5% 1 2 3 4 DDR_SCS#0 DDR_SCAS# DDR_SCS#3 DDR_SRAS#

DDR_SCS#1 DDR_SCS#0 DDR_SCAS# DDR_SCS#3 DDR_SRAS# 2

+1.25VS

DDR_SBS0 DDR_SMA_B1 1 1 C202 0.1U_0402_16V4Z C144 0.1U_0402_16V4Z 1 C141 0.1U_0402_16V4Z 1 C136 0.1U_0402_16V4Z 1 C200 0.1U_0402_16V4Z 1 C199 0.1U_0402_16V4Z 1 C175 0.1U_0402_16V4Z DDR_SMA3 DDR_SMA_B5

1 C185 0.1U_0402_16V4Z

56_0804_8P4R_5% DDR_SMA3 DDR_SMA_B5 DDR_SMA7 DDR_SMA9 RP18 8 7 6 5 1 2 3 4

56_0804_8P4R_5% RP17 8 7 6 5 1 2 3 4 DDR_SBS1 DDR_SMA1 DDR_SMA0 DDR_SMA2

2

2

2

2

2

2

2

2

DDR_SBS1 DDR_SMA1 DDR_SMA0 DDR_SMA2

+1.25VS

56_0804_8P4R_5% DDR_SMA12 DDR_CKE3 DDR_CKE1 DDR_SMA5 RP21 8 7 6 5 1 2 3 4

56_0804_8P4R_5% RP20 8 7 6 5 1 2 3 4 DDR_SMA4 DDR_SMA_B4 DDR_SMA6 DDR_SMA_B2

1 C131 0.1U_0402_16V4Z

1 C157 0.1U_0402_16V4Z

1 C182 0.1U_0402_16V4Z

1 C128 0.1U_0402_16V4Z

1 C203 0.1U_0402_16V4Z

1 C201 0.1U_0402_16V4Z

1 C208 0.1U_0402_16V4Z

1 C220 0.1U_0402_16V4Z

DDR_CKE3 DDR_CKE1 DDR_SMA5

DDR_SMA4 DDR_SMA_B4 DDR_SMA_B2

2

2

2

2

2

2

2

2

56_0804_8P4R_5%

+1.25VS

56_0804_8P4R_5% RP22 DDR_SMA8 8 1 DDR_SMA11 7 2 DDR_CKE0 6 3 DDR_CKE2 5 4 56_0804_8P4R_5%

DDR_CKE0 DDR_CKE2

13

1 C213 0.1U_0402_16V4Z C133 0.1U_0402_16V4Z

1 C198 0.1U_0402_16V4Z

1 C173 0.1U_0402_16V4Z

1 C223 0.1U_0402_16V4Z

1 C127 0.1U_0402_16V4Z

1 C155 0.1U_0402_16V4Z

1 C140 0.1U_0402_16V4Z RP24 DDR_DQ27 DDR_DQ26 DDR_DQS3 DDR_DQ25 1 2 3 4 8 7 6 5 56_0804_8P4R_5% RP26 8 7 6 5 56_0804_8P4R_5% 2 56_0402_5% 2 56_0402_5% 2 56_0402_5% 2 56_0402_5% RP28 8 7 6 5 56_0804_8P4R_5% RP30 8 7 6 5 56_0804_8P4R_5% 1 2 3 4 RP23 8 7 6 5 DDR_DQ31 DDR_DQ30 DDR_DM3 DDR_DQ293

2

2

2

2

2

2

2

2

+1.25VS DDR_DQ24 DDR_DQ18 DDR_DQ22 DDR_DQS2 C225 0.1U_0402_16V4Z 1 2 3 4

1 C186 0.1U_0402_16V4Z

1 C219 0.1U_0402_16V4Z

1 C143 0.1U_0402_16V4Z

1 C137 0.1U_0402_16V4Z

1 C165 0.1U_0402_16V4Z

1 C120 0.1U_0402_16V4Z

1 C166 0.1U_0402_16V4Z

1

56_0804_8P4R_5% RP25 1 8 2 7 3 6 4 5

DDR_DQ28 DDR_DQ23 DDR_DQ19 DDR_DM2

2

2

2

2

2

2

2

2

+1.25VS

DDR_DQ20 1 R197 DDR_DQ16 1 R199 DDR_DQ15 1 R206 DDR_DQ14 1 R209 C134 0.1U_0402_16V4Z DDR_DQS1 DDR_DQ13 DDR_DQ8 DDR_DQ1 1 2 3 4

1 C150 0.1U_0402_16V4Z

1 C207 0.1U_0402_16V4Z

1 C178 0.1U_0402_16V4Z

1 C159 0.1U_0402_16V4Z

1 C123 0.1U_0402_16V4Z

1 C124 0.1U_0402_16V4Z

1 C121 0.1U_0402_16V4Z

1

2

2

2

2

2

2

2

2

56_0804_8P4R_5% DDR_DQ21 1 2 R196 56_0402_5% DDR_DQ17 1 2 R198 56_0402_5% DDR_DQ10 1 2 R205 56_0402_5% DDR_DQ11 1 2 R207 56_0402_5% RP27 DDR_DM1 1 8 DDR_DQ12 2 7 DDR_DQ9 3 6 DDR_DQ6 4 5 56_0804_8P4R_5% RP29 1 8 2 7 3 6 4 5 56_0804_8P4R_5%

+1.25VS4

DDR_DQ5 DDR_DQS0 DDR_DQ3 DDR_DQ0 1 1 C230 0.1U_0402_16V4Z C224 0.1U_0402_16V4Z 1 C228 0.1U_0402_16V4Z

1 2 3 4

DDR_DQ4 DDR_DM0 DDR_DQ7 DDR_DQ2

4

1 C227 0.1U_0402_16V4Z

2

2

2

2

TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.A B C D

Compal Electronics, Inc.Document Number

Size Date:

DDR SODIMM Decoupling EAL20 LA-2461SheetE

Rev 0.3 47

, 04, 2004

11

of

A

B

C

D

E

F

G

H

Clock GeneratorSEL2 0 0 0 01

SEL1 0 0 1 1

SEL0 0 1 0 1

CPUCLKC[0..2] 166.67 100.00 200.00 133.33

CPUCLKT[0..2] 166.67 100.00 200.00 133.33+3VS

+3VS_CLK 2 0_0805_5% 2 0_0805_5% 1 L10 1 L35

Width=40 mils1 C640 10U_0805_10V4Z 1 C625

0.1U_0402_16V4Z 1 C614 1 C605

0.1U_0402_16V4Z 1 C600 1 C602

0.1U_0402_16V4Z 1 C620 1 C627

0.1U_0402_16V4Z 1 C639 1

0.1U_0402_16V4Z 1

*

C205 2

C603

2

2 2 0.1U_0402_16V4Z

2 2 0.1U_0402_16V4Z

2 2 0.1U_0402_16V4Z

2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z

1

U46 C637 10P_0402_50V8K XTALIN 2 1 Y5 R573 1K_0402_5% @ 2 14.318MHZ_16PF_DSX840GA XTALOUT 1 2 3 C631 10P_0402_50V8K 54 55 40 2

VDD_REF VDD_PCI_0 VDD_PCI_1 VDD_3V66_0 VDD_3V66_1 VDD_48MHZ VDD_CPU_0 VDD_CPU_1

1 8 14 19 32 37 46 50

+3VS VDDA 26 1 C599 2 2 27 45 +3V_VDD 1 C595 10U_0805_10V4Z 1 L25 2 0_0805_5%

+3VS

+3VS

1

2

XTAL_IN

1

R571 1K_0402_5% 2

1

XTAL_OUT SEL0 SEL1 SEL2

VSSA CPUCLKT2

0.1U_0402_16V4Z CLK_MCH 1

2 R548 33_0402_5% R539 33_0402_5% 2 2 R557 33_0402_5% R554 33_0402_5% 2 2 R569 33_0402_5% R563 33_0402_5% 2

1

1

+3VS

1K_0402_5%

R570 @

R572

R532 1K_0402_5% SLP_S1# STP_PCI# STP_CPU# 25 34 53 PWR_DWN# PCI_STOP# CPU_STOP# CPU_CLKC2 CPUCLKT1 44 49

CLK_MCH_BCLK R547 49.9_0402_1% 1 2 1 2 R538 49.9_0402_1% CLK_MCH_BCLK# CLK_CPU_BCLK R556 49.9_0402_1% 1 2 1 2 49.9_0402_1% R553 CLK_CPU_BCLK# CLK_CPU_ITP R568 49.9_0402_1% 1 2 1 2 R562 49.9_0402_1% CLK_CPU_ITP# 2

2

2

2

CLK_MCH# CLK_BCLK

1 1

2

2

R498 10K_0402_5% 1

+3VS

1 2 R505 10K_0402_5% D 1 1 2 R530 10K_0402_5%

1

1K_0402_5%

28

VTT_PWRGD# CPUCLKC1 CPUCLKT0 48 52 CLK_BCLK# CLK_ITP 1 1

VGATE +VCCP

1 R496

2 0_0402_5%

2 G 3 S

+3VS Q38 2N7002_SOT23 SMB_DATA SMB_CLK

43

MULT0

0.1U_0402_16V4Z

if pull high to +VCCP Change to DTC124EK

1 2 R497 @ 56_0402_5%

29 30

1

SDATA SCLK CPUCLKC0 3V66_5 3V66_4 3V66_3 3V66_2 PCICLK_F2 PCICLK_F1 PCICLK_F0 PCICLK6 PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLK1 PCICLK0 51 24 23 22 21 7 6 5 18 17 16 13 12 11 10 MCH_66M AGP_66M ICH_66M P CI_ICH CLK_ITP# 1

C671 @ 2

CLK_SSC_66M

1 R508

2 SSC_66M 33_0402_5%

33 35

3V66_0 3V66_1/VCH_CLK

R531 1

2 475_0402_1%

42

IREF

1 1 1 1

2 R509 33_0402_5% 2 R514 33_0402_5% M11@ 2 R515 33_0402_5% 2 R560 33_0402_5%

CLK_MCH_66M CLK_AGP_66M CLK_ICH_66M CLK_PCI_ICH

CLK_ICH_48M CLK_EXT_SD48 CLK_MCH_48M

R525 1 R524 1 1

5IN1@

2 10_0402_5% 2 10_0402_5% 2

CLK_ICH48M

39

48MHZ_USB

CLK_MCH48M 33_0402_5%

R526

38

48MHZ_DOT

PCI_MINI PCI_LPC PCI_SIO PCI_LAN PCI_1394 PCI_PCM

1 1 1 1 1 1

2 R529 33_0402_5% KS@ 2 2 2 2 2 R534 R543 R544 R551 R552 33_0402_5% 33_0402_5% SIO@ 33_0402_5% 33_0402_5% 33_0402_5%

CLK_PCI_MINI CLK_PCI_LPC CLK_PCI_SIO CLK_PCI_LAN CLK_PCI_1394 CLK_PCI_PCM

3

GND_REF GND_PCI_0 GND_PCI_1 GND_3V66_0 GND_3V66_1 GND_48MHZ GND_IREF GND_CPU

CLK_ICH_14M CLK_14M_SIO CLK_14M_CODEC

R576 1 R575 1 R574 1

2 10_0402_5% CLK_ICH14M 2 10_0402_5% SIO@ 2 10_0402_5% @

56

REF

3

4 9 15 20 31 36 41 474

CY28346ZCT-2_TSSOP56

4

TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.A B C D E F

Compal Electronics, Inc.Document Number

Size Date:

Clock GeneratorSheet 12H

, 04, 2004G

EAL20 LA-2461

R ev 0.3 of 47

5

4

3

2

1

U7A AGP_AD0 AGP_AD1 DVOC_D[0..11] DVOB_D[0..11] AGP_SBA[0..7] DVOC_D[0..11] DVOB_D[0..11] AGP_SBA[0..7] AGP_AD0 H29 AGP_AD1 H28 DVOB_D1 J29 DVOB_D0 J28 DVOB_D3 K29 DVOB_D2 K28 DVOB_D5 L29 DVOB_D4 L28 DVOB_D6 N28 DVOB_D9 P29 DVOB_D8 P28 DVOB_D11 R29 DVOB_D10 R28 DVOBC_CLKINT T29 AGP_AD14 T28 MDDCDATA U29 DVOC_VSYNC N25 DVOC_HSYNC R26 AGP_AD18 P25 DVOC_D0 R27 DVOC_D1 R25 DVOC_D2 T25 DVOC_D3 T26 DVOC_D4 U25 DVOC_D7 V27 DVOC_D6 W26 DVOC_D9 W25 DVOC_D8 Y26 DVOC_D11 Y25 DVOC_D10 AA26 AGP_AD30 AA25 AGP_AD31 AA27 DVOB_D7 AGP_CBE#1 AGP_CBE#2 DVOC_D5 N29 U28 P26 U26 AG30 AG28 AF28 AD26 M25 N26 V29 V28 W29 W28 AE26 AC26 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE#0 C/BE#1 C/BE#2 C/BE#3 PCICLK RST# REQ# GNT# PAR STOP# DEVSEL# TRDY# IRDY# FRAME# INTA# WBF# STP_AGP# AGP_BUSY# RBF# AD_STBF_0 AD_STBF_1 AD_STBS_0 AD_STBS_1 SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 ST0 ST1 ST2 SB_STBF SB_STBS AGPREF AGPTEST DBI_HI DBI_LO AGP8X_DET# DMINUS DPLUS

M10-P/(M9+X) (1/6)

D

CLK_AGP_66M DVOBC_CLKINT AGP_AD14 MDDCDATA DVOC_VSYNC DVOC_HSYNC AGP_AD18 1

ZV PORT / EXT TMDS / GPIO / ROM

R383 10_0402_5% @ 2 1 C465 18P_0402_50V8K 2 @

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16

VREFG/(NC) ROMCS# ZV_LCDDATA0 ZV_LCDDATA1 ZV_LCDDATA2 ZV_LCDDATA3 ZV_LCDDATA4 ZV_LCDDATA5 ZV_LCDDATA6 ZV_LCDDATA7 ZV_LCDDATA8 ZV_LCDDATA9 ZV_LCDDATA10 ZV_LCDDATA11 ZV_LCDDATA12 ZV_LCDDATA13 ZV_LCDDATA14 ZV_LCDDATA15 ZV_LCDDATA16 ZV_LCDDATA17 ZV_LCDDATA18 ZV_LCDDATA19 ZV_LCDDATA20 ZV_LCDDATA21 ZV_LCDDATA22 ZV_LCDDATA23 ZV_LCDCNTL0 ZV_LCDCNTL1 ZV_LCDCNTL2 ZV_LCDCNTL3 DVOMODE

AG4 AF5 AH6 AJ6 AK6 AH7 AK7 AJ7 AH8 AJ8 AH9 AJ9 AK9 AH10 AE6 AG6 AF6 AE7 AF7 AE8 AG8 AF8 AE9 AF9 AG10 AF10 AJ10 AK10 AJ11 AH11 AE10

VREFG

15mil1

R323 M11@ 2 1 +3VS 1K_0402_1% R327 1K_0402_1% M11@

1

AJ5 AH5 AJ4 AK4 AH4 AF4 AJ3 AK3 AH3 AJ2 AH2 AH1 AG3 AG1 AG2 AF3 AF2

STRAP_G STRAP_H

4M32 Samsung: K4D263238E-GC33 Hynix: HY5DU283222AF-33 8M32 Samsung: K4D553238E-JC33 Hynix: HY5DU573222AFM-33

GPIO10

+3VS

POWER_SEL MCLK_SPREAD

POWER_SEL High for 1.0V * Low for 1.2VR317 100K_0402_5% M11@

STRAP_G STRAP_H

POWER_SEL

* R46 R42 * R35R41

1 1 1 1

2 10K_0402_5% M11@ 2 10K_0402_5% @ 2 10K_0402_5% M11@ 2 10K_0402_5% @

D

+3VS

R120 2

1 10K_0402_5% M11@

STP_AGP#

2

STRAP_R STRAP_S STRAP_T

Memory Config. GPIO10=High, 128MB GPIO10=Low, 64MB

2

GPIO10

R34 R36

1 1

2 10K_0402_5% 128M@ 2 10K_0402_5% 64M@ 2 10K_0402_5% 128M@ 2 10K_0402_5% 64M@ 2 10K_0402_5% M11@ 2 10K_0402_5% @ 2 10K_0402_5% @ 2 10K_0402_5% M11@

STRAP_R STRAP_S STRAP_T

R320 1 R324 1 R48 R49 1 1

AGP_AD30 AGP_AD31

AGP_CBE#1 AGP_CBE#2 CLK_AGP_66M PCIRST# R382 1 M11@

R330 1 R328 1

C

PCI/AGP

CLK_AGP_66M 2 0_0805_5% (20mils) NB_PCIRST# AGP_REQ# AGP_REQ# AGP_GNT# AGP_GNT# AGP_PAR AGP_PAR MDDCCLK MDDCCLK MI2CDATA MI2CDATA MDVICLK MDVICLK MI2CCLK MI2CCLK MDVIDATA MDVIDATA PCI_PIRQA# PCI_PIRQA# AGP_WBF#

M11_LCD_DATA M11_LCD_CLK

+3VS ZV_LCDCNTL0 ZV_LCDCNTL1 ZV_LCDCNTL2 ZV_LCDCNTL3 R50 R52 R53 R54 1 1 1 1 2 2 2 2 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @

*

AGP_WBF# STP_AGP# AGP_BUSY# AGP_RBF# AGP_ADSTB0 DVOC_CLK AGP_ADSTB0# DVOC_CLK#

AGP_SBA0 AGP_SBA1 AGP_SBA2 AGP_SBA3 AGP_SBA4 AGP_SBA5 AGP_SBA6 AGP_SBA7 AGP_ST0 AGP_ST1 AGP_ST2B

AD28 AD29 AC28 AC29 AA28 AA29 Y28 Y29 AF29 AD27 AE28 AB29 AB28 M26 M27

LVDS

STP_AGP# AH30 AGP_BUSY# AH29 AGP_RBF# AE29 AGP_ADSTB0 M28 DVOC_CLK V25 AGP_ADSTB0# M29 DVOC_CLK# V26

GPIO10 0 0 1 1 0 0

R 0 0 1 1 0 0

S 0 1 0 1 0 1

T 0 0 0 0 1 1

4Mx32 Samsung x4 4Mx32 Hynix x4 8Mx32 Samsung x4 8Mx32 Hynix x4 4Mx32 Samsung x2 Ch. A 4Mx32 Hynix x2 Ch. A

C

AGP_ST0 AGP_ST1 AGP_ST2 AGP_SBSTB AGP_SBSTB#

AGP_SBSTB AGP_SBSTB# +AGP_VREF C440 M11@ 0.1U_0402_16V4Z 1 +1.5VS

TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P TXOUT_L3N TXOUT_L3P TXCLK_LN TXCLK_LP TXOUT_U0N TXOUT_U0P TXOUT_U1N TXOUT_U1P TXOUT_U2N TXOUT_U2P TXOUT_U3N TXOUT_U3P TXCLK_UN TXCLK_UP DIGON BLON/(BLON#) TX0M TX0P TX1M TX1P TX2M TX2P TXCM TXCP DDC2CLK DDC2DATA HPD1

AK16 AH16 AH17 AJ16 AH18 AJ17 AK19 AH19 AK18 AJ18 AG16 AF16 AG17 AF17 AF18 AE18 AH20 AG20 AF19 AG19 AE12 AG12 AJ13 AH14 AJ14 AH15 AJ15 AK15 AH13 AK13 AE13 AE14 AF12

M11_TXOUT0M11_TXOUT0+ M11_TXOUT1M11_TXOUT1+ M11_TXOUT2M11_TXOUT2+ M11_TXCLKM11_TXCLK+ M11_TZOUT0M11_TZOUT0+ M11_TZOUT1M11_TZOUT1+ M11_TZOUT2M11_TZOUT2+ M11_TZCLKM11_TZCLK+ ENVDD ENBKL

M11_TXOUT0M11_TXOUT0+ M11_TXOUT1M11_TXOUT1+ M11_TXOUT2M11_TXOUT2+

+3VS X1 4 M11@ 1 2 1 10K_0402_5% 1 R99 C61 0.1U_0402_16V4Z M11@ VDD OE OUT GND 3 2 M11@ FREQOUT 1 2 R119 261_0603_1% R118 150_0402_1% M11@ 1

AGP8X

M11_TXCLK- M11_TXCLK+ M11_TZOUT0- M11_TZOUT0+ M11_TZOUT1- M11_TZOUT1+ M11_TZOUT2- M11_TZOUT2+ M11_TZCLK- M11_TZCLK+ ENVDD ENBKL

VGA_XTALIN

27MHZ_15P

M11@

2

2

C87 @ 15P_0402_50V8J

B

2 +3VS

AGPTEST 1 2 15mil R380 M11@ 47_0402_1% AGP_DBIHI AB25 AGP_DBILO AB26 R369 2 M11@ 1 10K_0402_5% AC25

+1.5VS

R368 1 M11@ R377 1 M11@

2 1K_0402_5% 2 1K_0402_5%

AGP_DBIHI AGP_DBILO 1 M11@ 2 R2SET15mil 715_0603_1%

AE11 AF11

THRM TMDS

R359

AK21 AJ23 AJ22 AK22 AJ24 AK24 AG23 AG24 AK25 AJ25

R2SET C_R Y_G COMP_B H2SYNC V2SYNC DDC3CLK DDC3DATA SSIN SSOUT

SSC DAC2

M11_TV_CRMA M11_TV_LUMA 75_0402_1% M11P 75_0402_1% M11P 75_0402_1% M11P

R345 1

M11@ 2 100K_0402_5%

+3VS

DDR SPREAD SPECTRUM2 0.1U_0402_16V4Z M11@ 5 4 MCLK_SPREAD 2 22_0402_5% M11@ 2 10K_0402_5% @ 2 +3VS 10K_0402_5% @A

R603 R604 R365

C358 1 R G B HSYNC VSYNC RSET AK27 AJ27 AJ26 AG25 AH25 AH26 AF25 AF24 AF26 B6 E8 AE25 AG29 1 RSET M11_CRT_R M11_CRT_G M11_CRT_B M11_CRT_HSYNC M11_CRT_VSYNC U33 7 FREQOUT 1 8 VDD

REF

15mil

1

2 R370 M11@ 499_0603_1% M11_CRT_DDC_DATA M11_CRT_DDC_CLK

DAC1

A

DDC1DATA DDC1CLK AUXWIN TEST_MCLK/(NC) TEST_YCLK/(NC) PLLTEST/(NC) RSTB_MSK/(NC)

1 R321 1 R325 1 2 VSS PD# 6 R343 ASM3P1819-SR_SO8 M11@ XIN MODOUT XOUT NC 3

VGA_XTALIN

AH28 AJ29

R372 1

XTALOUT

CLK

XTALIN

2 10K_0402_5% M11@

Pin3 : Reserved for P1819 Spread Rate selection.

+3VS

SUS_STAT# +3VS5

1 2 TESTEN AH27 R379 M11@ 1K_0402_5% SUS_STAT# AG26 2 R373 1 M11@ 10K_0402_5%

15mil

TESTEN SUS_STAT# M11P_BGA708 M11@4

TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.3 2

Compal Electronics, Inc.EAL20 LA-2461Sheet1

ATI M10-P/M11-AGP/DISPLAY(1/4)R ev 0.3 13 of 47

R381 2 1K_0402_5% M11@

Size Document Number Custom Date:

, 04, 2004

5

4

3

2

1

NMDA[0..63] NMAA[0..13] NDQMA[0..7] NDQSA[0..7]

NMDA[0..63] NMAA[0..13] NDQMA[0..7] NDQSA[0..7]

NMDB[0..63] NMAB[0..13] NDQMB[0..7] NDQSB[0..7]

NMDB[0..63] NMAB[0..13] NDQMB[0..7] NDQSB[0..7]

D

D

U7B NMDA0 NMDA1 NMDA2 NMDA3 NMDA4 NMDA5 NMDA6 NMDA7 NMDA8 NMDA9 NMDA10 NMDA11 NMDA12 NMDA13 NMDA14 NMDA15 NMDA16 NMDA17 NMDA18 NMDA19 NMDA20 NMDA21 NMDA22 NMDA23 NMDA24 NMDA25 NMDA26 NMDA27 NMDA28 NMDA29 NMDA30 NMDA31 NMDA32 NMDA33 NMDA34 NMDA35 NMDA36 NMDA37 NMDA38 NMDA39 NMDA40 NMDA41 NMDA42 NMDA43 NMDA44 NMDA45 NMDA46 NMDA47 NMDA48 NMDA49 NMDA50 NMDA51 NMDA52 NMDA53 NMDA54 NMDA55 NMDA56 NMDA57 NMDA58 NMDA59 NMDA60 NMDA61 NMDA62 NMDA63 L25 L26 K25 K26 J26 H25 H26 G26 G30 D29 D28 E28 E29 G29 G28 F28 G25 F26 E26 F25 E24 F23 E23 D22 B29 C29 C25 C27 B28 B25 C26 B26 F17 E17 D16 F16 E15 F14 E14 F13 C17 B18 B17 B15 C13 B14 C14 C16 A13 A12 C12 B12 C10 C9 B9 B10 E13 E12 E10 F12 F11 E9 F9 F8 DQA0 DQA1 DQA2 DQA3 DQA4 DQA5 DQA6 DQA7 DQA8 DQA9 DQA10 DQA11 DQA12 DQA13 DQA14 DQA15 DQA16 DQA17 DQA18 DQA19 DQA20 DQA21 DQA22 DQA23 DQA24 DQA25 DQA26 DQA27 DQA28 DQA29 DQA30 DQA31 DQA32 DQA33 DQA34 DQA35 DQA36 DQA37 DQA38 DQA39 DQA40 DQA41 DQA42 DQA43 DQA44 DQA45 DQA46 DQA47 DQA48 DQA49 DQA50 DQA51 DQA52 DQA53 DQA54 DQA55 DQA56 DQA57 DQA58 DQA59 DQA60 DQA61 DQA62 DQA63

U7C

M10-P/(M9+X) AA0 (2/6) AA1

AA2 AA3 AA4 AA5 AA6 AA7 AA8 AA9 AA10 AA11 AA12/(AA13) AA13/(AA12) AA14/(NC) DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7 QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7

E22 B22 B23 B24 C23 C22 F22 F21 C21 A24 C24 A25 E21 B20 C19 J25 F29 E25 A27 F15 C15 C11 E11 J27 F30 F24 B27 E16 B16 B11 F10

NMAA0 NMAA1 NMAA2 NMAA3 NMAA4 NMAA5 NMAA6 NMAA7 NMAA8 NMAA9 NMAA10 NMAA11 NMAA12 NMAA13 NDQMA0 NDQMA1 NDQMA2 NDQMA3 NDQMA4 NDQMA5 NDQMA6 NDQMA7 NDQSA0 NDQSA1 NDQSA2 NDQSA3 NDQSA4 NDQSA5 NDQSA6 NDQSA7

C

RASA# CASA# WEA# CSA0# CSA1# CKEA CLKA0 CLKA0# CLKA1 CLKA1# DIMA0 DIMA1 MVREFD MVREFS/(NC)

A19 E18 E19 E20 F20 B19

NMRASA# NMCASA# NMWEA# NMCSA0# NMCSA1# NMCKEA 1 M11@ 1 M11@ 1 M11@ 1 M11@

NMRASA# NMCASA# NMWEA# NMCSA0# NMCSA1# NMCKEA 2 10_0402_5% NMCLKA0 2 10_0402_5% NMCLKA0# 2 10_0402_5% NMCLKA1 2 10_0402_5% NMCLKA1# NMCLKA0 NMCLKA0# NMCLKA1 NMCLKA1#

B21 CLKA0 R77 C20 CLKA0# R71 C18 CLKA1 R64 A18 CLKA1# R68 D30 B13 B7 B8 MVREFD MVREFS

B

NMDB0 NMDB1 NMDB2 NMDB3 NMDB4 NMDB5 NMDB6 NMDB7 NMDB8 NMDB9 NMDB10 NMDB11 NMDB12 NMDB13 NMDB14 NMDB15 NMDB16 NMDB17 NMDB18 NMDB19 NMDB20 NMDB21 NMDB22 NMDB23 NMDB24 NMDB25 NMDB26 NMDB27 NMDB28 NMDB29 NMDB30 NMDB31 NMDB32 NMDB33 NMDB34 NMDB35 NMDB36 NMDB37 NMDB38 NMDB39 NMDB40 NMDB41 NMDB42 NMDB43 NMDB44 NMDB45 NMDB46 NMDB47 NMDB48 NMDB49 NMDB50 NMDB51 NMDB52 NMDB53 NMDB54 NMDB55 NMDB56 NMDB57 NMDB58 NMDB59 NMDB60 NMDB61 NMDB62 NMDB63

D7 F7 E7 G6 G5 F5 E5 C4 B5 C5 A4 B4 C2 D3 D1 D2 G4 H6 H5 J6 K5 K4 L6 L5 G2 F3 H2 E2 F2 J3 F1 H3 U6 U5 U3 V6 W5 W4 Y6 Y5 U2 V2 V1 V3 W3 Y2 Y3 AA2 AA6 AA5 AB6 AB5 AD6 AD5 AE5 AE4 AB2 AB3 AC2 AC3 AD3 AE1 AE2 AE3

DQB0 DQB1 DQB2 DQB3 DQB4 DQB5 DQB6 DQB7 DQB8 DQB9 DQB10 DQB11 DQB12 DQB13 DQB14 DQB15 DQB16 DQB17 DQB18 DQB19 DQB20 DQB21 DQB22 DQB23 DQB24 DQB25 DQB26 DQB27 DQB28 DQB29 DQB30 DQB31 DQB32 DQB33 DQB34 DQB35 DQB36 DQB37 DQB38 DQB39 DQB40 DQB41 DQB42 DQB43 DQB44 DQB45 DQB46 DQB47 DQB48 DQB49 DQB50 DQB51 DQB52 DQB53 DQB54 DQB55 DQB56 DQB57 DQB58 DQB59 DQB60 DQB61 DQB62 DQB63

M10-P/(M9+X) (3/6)

AB0 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AB11 AB12/(AB13) AB13/(AB12) AB14/(NC) DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7 QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7 RASB# CASB# WEB# CSB0# CSB1# CKEB CLKB0 CLKB0# CLKB1 CLKB1#

N5 M1 M3 L3 L2 M2 M5 P6 N3 K2 K3 J2 P5 P3 P2 E6 B2 J5 G3 W6 W2 AC6 AD2 F6 B3 K6 G1 V5 W1 AC5 AD1 R2 T5 T6 R5 R6 R3 N1 N2 T2 T3

NMAB0 NMAB1 NMAB2 NMAB3 NMAB4 NMAB5 NMAB6 NMAB7 NMAB8 NMAB9 NMAB10 NMAB11 NMAB12 NMAB13 NDQMB0 NDQMB1 NDQMB2 NDQMB3 NDQMB4 NDQMB5 NDQMB6 NDQMB7 NDQSB0 NDQSB1 NDQSB2 NDQSB3 NDQSB4 NDQSB5 NDQSB6 NDQSB7 NMRASB# NMCASB# NMWEB# NMCSB0# NMCSB1# NMCKEB CLKB0 R39 CLKB0# R40 CLKB1 R38 CLKB1# R37 1 M11@ 1 M11@ 1 M11@ 1 M11@ NMRASB# NMCASB# NMWEB# NMCSB0# NMCSB1# NMCKEB 2 10_0402_5% 2 10_0402_5% 2 10_0402_5% 2 10_0402_5% NMCLKB0 NMCLKB0# NMCLKB1 NMCLKB1# +1.8VS NMCLKB0 NMCLKB0# NMCLKB1 NMCLKB1#

MEMORY INTERFACE A

MEMORY INTERFACE B

C

MEMVMODE0 MEMVMODE1 DIMB0 DIMB1 MEMTEST

C6 C7 E3 AA3 C8

MEMVMODE0 MEMVMODE1

15mil 15mil

R329 1 M11@ R333 1 M11@

2 4.7K_0402_5% 2 4.7K_0402_5%B

MEMTEST

15mil

R338 1 M11@

2 47_0402_1%

M11P_BGA708 M11@

M11P_BGA708 M11@

+2.5VS 1

+2.5VS NMCKEA 1 NMCKEB R347 M11@ 1K_0402_1% MVREFS 1 M11@ 2 R352 10K_0402_5% 1 M11@ 2 R315 10K_0402_5%

R341 M11@ 1K_0402_1% 2 MVREFD

20milC362 M11@

1

20milR339 M11@ 1K_0402_1% C368 M11@

1

1

1 R349 M11@ 1K_0402_1% 2

2 2

2

0.1U_0402_16V4ZA

0.1U_0402_16V4ZA

2

TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.5 4 3 2

Compal Electronics, Inc.ATI M10-P/M11-MEMORY(2/4) EAL20 LA-2461Sheet1

Size Document Number Custom Date:

R ev 0.3 14 of 47

, 04, 2004

5

4

3

2

1

+2.5VS B1 B30 A15 A21 A28 A3 A9 AA1 AA4 AA7 AA8 AD4 D5 D8 D11 D13 D14 D17 D20 D23 D26 E27 F4 G7 G10 G13 G15 G19 G22 G27 H10 H13 H15 H17 H19 H22 J1 J23 J24 J4 J7 J8 L27 L8 M4 N4 N7 N8 R1 T4 T7 T8 V4 V7 V8 D19 R4 +1.5VS AC11 AC20 H11 H20 L23 P8 Y23 Y8

U7D VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1/(CLKAFB) VDDR1/(CLKBFB)

M10-P/(M9+X) (4/6)VDDRH0 VDDRH1 VSSRH0 VSSRH1

+2.5VS

+1.5VS

F18 N6 F19 M6

1 1 1 1 1 1 C418 C420 C431 C430 C459 C458 C461 M11@ M11@ M11@ M11@ M11@ M11@ M11@ 22U_1206_16V4Z_V1 0.1U_0402_16V4Z 0.01U_0402_16V7K 2 2 2 2 2 2 2 0.01U_0402_16V7K 22U_1206_16V4Z_V1 0.1U_0402_16V4Z 0.01U_0402_16V7K

1

D

MPVDD MPVSS PVDD PVSS

A7 A6 AK28 AJ28

+VDD_MEMPLL1.8 +3VS +VDD_PLL1.8

ATI: 22Ux1, 0.1Ux2, 0.01Ux1, 1000Px1+2.5VS

D

20mil1 1 1 1 C421 C366 C357 C363 M11@ M11@ M11@ M11@ 0.1U_0402_16V4Z 0.01U_0402_16V7K 2 2 2 2 2 22U_1206_16V4Z_V1 0.1U_0402_16V4Z 0.01U_0402_16V7K C403 M11@ 1 1 C426 M11@ 0.1U_0402_16V4Z 2 2 10U_0805_10V4Z C355 M11@ 1

VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3

AC19 AC21 AC22 AC8 AD19 AD21 AD22 AD7

+3VS

+VDD_DAC2.5

I/O POWER

VDDR4 VDDR4 VDDR4 VDDR4 VDDR4

AC10 AC9 AD10 AD9 AG7

20mil, 120mA1 1

L21 1 2 +2.5VS M11@ CHB1608B121_0603

C429 C423 M11@ M11@ 0.1U_0402_16V4Z 2 2 10U_0805_10V4Z +1.5VSC

C

VDDC15/(VDDC18) VDDC15/(VDDC18) VDDC15/(VDDC18) VDDC15/(VDDC18) VDDC15/(VDDC18) VDDC15/(VDDC18) VDDC15/(VDDC18) VDDC15/(VDDC18)

VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP

AA23 AA24 AB30 AC23 AC27 AE30 AF27 J30 M23 M24 N30 P23 P27 T23 T24 T30 U27 V23 V24 W30 Y27 AE20 AE17 AF21 AE15 AJ20 AF20 AF15 AE19 AE16 AJ19 AE24 AE22 AE23 AE21 AF13 AF14 AG13 AG14 AH12

+VDD_PNLIO1.8

+VDD_PLL1.8 L19 1 2 +1.8VS M11@ CHB1608B121_0603 1

20mil, 30mA1 C395 M11@

20mil, 22mAC455 M11@

L22 1 2 +1.8VS M11@ CHB1608B121_0603

1 1 1 C379 C389 C422 M11@ M11@ M11@ 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 10U_0805_10V4Z 0.1U_0402_16V4Z

1 C452 M11@ 0.1U_0402_16V4Z 2 2 10U_0805_10V4Z

+VDD_PNLPLL1.8

+VDD_DAC1.8 L7 1 2 +1.8VS M11@ CHB1608B121_0603 1

change to +2.8V (max:350mA)+LVDDR25 +VDD_PNLIO1.8 +VDD_PNLPLL1.8 1 C33 M11@

20mil, 6mA

20mil, 74mAC432 M11@

LVDDR_25/(LVDDR_18_25) LVDDR_25/(LVDDR_18_25) LVDDR_18 LVDDR_18 LPVDD LVSSR LVSSR LVSSR LVSSR LPVSS VDD1DI VDD2DI VSS1DI VSS2DI TXVDDR TXVDDR TXVSSR TXVSSR TXVSSR

L20 1 2 +1.8VS M11@ CHB1608B121_0603

1 1 C57 C36 M11@ M11@ 0.1U_0402_16V4Z 2 2 2 10U_0805_10V4Z 0.1U_0402_16V4Z

1 C435 M11@ 0.1U_0402_16V4Z 2 2 10U_0805_10V4Z

+VDD_PNLPLL1.8

AK12 AJ12

TPVDD TPVSS

B

+VDD_DAC1.8 +VDD_DAC2.5

AH24 AG21 AH21 AF22

AVDD A2VDD A2VDD A2VDDQ

+VDD_MEMPLL1.8 +VDD_DAC1.8 +LVDDR25

B

20mil, 6mA1 2 @ CHB1608B121_0603 U36 5 VOUT VIN PG 2 GND EN +2.5VS 1 C28 M11@ 1

L6 1 2 +1.8VS M11@ CHB1608B121_0603

20mil, 83mAL18

AH22 AJ21 AF23

A2VSSN A2VSSN A2VSSQ

1 4 3

+3VS

C27 M11@ 0.1U_0402_16V4Z 2 2 10U_0805_10V4Z

AH23 AD24

AVSSN AVSSQ

1 C388 C396 M11@ M11@ 10U_0805_10V4Z 2 2 0.1U_0402_16V4Z

1

MIC5205-2.8BM5_SOT23-5 M11@

SA052050010(MIC5205-2.8BM5), max:150mAM11P_BGA708 M11@

A

A

TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.5 4 3 2

Compal Electronics, Inc.ATI M10-P/M11-POWER(3/4) EAL20 LA-2461Sheet1

Size Document Number Custom Date:

R ev 0.3 15 of 47

, 04, 2004

5

4

3

2

1

U7E

D

C

A10 A16 A2 A22 A29 AA30 AB1 AB23 AB24 AB27 AB4 AB7 AB8 AC12 AC14 AC16 AC18 AC4 AD12 AD16 AD18 AD25 AD30 AE27 AG11 AG15 AG18 AG22 AG27 AG5 AG9 AJ1 AJ30 AK2 AK29 C1 C28 C3 C30 D10 D12 D15 D18 D21 D24 D25 D27 D4 D6 D9 E4 F27

M10-P/(M9+X) (5/6)VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS H4 H8 H9 H12 H14 H18 H21 H23 H27 K1 K23 K24 K27 K30 K7 K8 L4 M30 M7 M8 N23 N24 N27 P4 R23 R24 R30 R7 R8 T1 T27 U23 U4 U8 V30 W23 W24 W27 W7 W8 Y4 G9 G12 G16 G18 G21 G24

+VGA_CORE M12 M13 M14 M17 M18 M19 N12 N13 N14 N17 N18 N19 P12 P13 P14 P17 P18 P19 U12 U13 U14 U17 U18 U19 V12 V13 V14 V17 V18 V19 W12 W13 W14 W17 W18 W19

U7F

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

M10-P/(M9+X) (6/6) VDDCM10-P&M9+X COMMONVDDC VDDC VDDC VDDC

+VGA_CORE AD15 AD13 AC17 AC15 AC13 T12 M15 W16 R19 R12 R13 T13 R14 T14 N15 P15 R15 T15 U15 V15 W15 H16 M16 N16 P16 R16 T16 U16 V16 R17 T17 R18 T18 T19

(+VGA_CORE = 1.2V)+VGA_CORE

22U_1206_16V4Z_V1

22U_1206_16V4Z_V1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.01U_0402_16V7K

CORE POWER

VDDCI VDDCI VDDCI VDDCI VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

L17 1 2 +VGA_CORE M11@ CHB1608B121_0603

1

C405 M11@

1

C369 M11@

1

C377 M11@

1

C398 M11@

1

C378 M11@

1

C390 M11@

1

0.01U_0402_16V7K

+VDDCI

C407 M11@

1 C402 M11@ 2

D

2

2

2

2

2

2

2

CORE POWER

+VDDCI

+VGA_CORE

20mil10U_0805_10V4Z 0.1U_0402_16V4Z 1 C370 M11@ 1 0.1U_0402_16V4Z C401 M11@ 1 1 C394 M11@ C701 + 470U_D2_2.5VM @ 1 + 2 2 C321 470U_D2_2.5VM M11@

M10-P ONLY

2

2

2

C

+2.5VS

22U_1206_16V4Z_V1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.01U_0402_16V7K

M11P_BGA708 M11@

B

AB22 AB9 J10 J12 J14 J15 J16 J17 J19 J21 K22 K9 M22 M9 P22 P9 R22 R9 T22 T9 U22 U9 V22 V9 Y22 Y9

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

1

C391 M11@

1

C349 M11@

1

C359 M11@

1

C380 M11@

1

0.01U_0402_16V7K 0.01U_0402_16V7K

C365 M11@

1

C450 M11@

2

2

2

2

2

2

M9+X ONLY

22U_1206_16V4Z_V1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C337 M11@

1

C453 M11@

1

C393 M11@

1

0.01U_0402_16V7K

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AA22 AA9 J11 J13 J18 J20 J22 J9 L22 L9 N22 N9 W22 W9

+2.5VS

C451 M11@

1

C338 M11@

1

C406 M11@

2

2

2

2

2

2

B

M11@ M11P_BGA708

A

A

TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.5 4 3 2

Compal Electronics, Inc.ATI M10-P/M11-POWER/GND(4/4) EAL20 LA-2461Sheet1

Size Document Number Custom Date: , 04, 2004

R ev 0.3 of 47

16

5

4

3

2

1

+2.5VS 0.1U_0402_16V4Z 1 C436 M11@ 1 C414 M11@ 1 0.1U_0402_16V4Z C416 M11@ 1 C447 M11@ 1 0.01U_0402_16V7K C438 M11@ 1 C449 M11@ 1 0.1U_0402_16V4Z C428 M11@ 1 C448 M11@ 1 C415 M11@

+2.5VS 0.1U_0402_16V4Z 1 22U_1206_16V4Z_V1 C350 M11@ 1 C343 M11@ 1 0.1U_0402_16V4Z C354 M11@ 1 C340 M11@ 1 0.01U_0402_16V7K C341 M11@ 1 C361 M11@ 1 0.1U_0402_16V4Z C360 M11@ 1 C351 M11@ 1 C339 M11@

22U_1206_16V4Z_V12

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

D

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.01U_0402_16V7K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.01U_0402_16V7K

0.1U_0402_16V4Z

D

NMDA[0..63] NMAA[0..13] NDQMA[0..7] NDQSA[0..7]

NMDA[0..63] B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10 B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ NMDA9 NMDA10 NMDA12 NMDA11 NMDA15 NMDA8 NMDA13 NMDA14 NMDA22 NMDA23 NMDA21 NMDA20 NMDA18 NMDA17 NMDA19 NMDA16 NMDA29 NMDA26 NMDA30 NMDA31 NMDA27 NMDA28 NMDA24 NMDA25 NMDA0 NMDA1 NMDA2 NMDA3 NMDA5 NMDA4 NMDA6 NMDA7 NMAA0 NMAA1 NMAA2 NMAA3 NMAA4 NMAA5 NMAA6 NMAA7 NMAA8 NMAA9 NMAA10 NMAA11 NMAA12 NMAA13 NDQMA4 NDQMA6 NDQMA5 NDQMA7 NDQSA4 NDQSA6 NDQSA5 NDQSA7 NMAA[0..13] NDQMA[0..7] NDQSA[0..7] NMAA0 NMAA1 NMAA2 NMAA3 NMAA4 NMAA5 NMAA6 NMAA7 NMAA8 NMAA9 NMAA10 NMAA11 NMAA12 NMAA13 U10

U5

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

N5 N6 M6 N7 N8 M9 N9 N10 N11 M8 L6 M7 N4 M5 B3 H12 H3 B12 B2 H13 H2 B13 N13 M13 L9 M10 M2 L2 L3 N2 N12 M11 M12

A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11 BA0 BA1 DM0 DM1 DM2 DM3 DQS0 DQS1 DQS2 DQS3 VREF MCL RFU1 RFU2 RAS# CAS# WE# CS# CKE CK CK# NC NC NC NC NC NC NC NC NC VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

C

+2.5VS 1 R80 M11@ 1K_0402_1%

NDQMA1 NDQMA2 NDQMA3 NDQMA0 NDQSA1 NDQSA2 NDQSA3 NDQSA0

20mil2 C50 M11@ NMRASA# NMCASA# NMWEA# NMCSA0# NMCKEA

VR_VREF_1

R74

M11@ 1

0.1U_0402_16V4Z

NMRASA# NMCASA# NMWEA# NMCSA0# NMCKEA

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDD VDD VDD VDD VDD VDD VDD VDD

1K_0402_1% 2 1

1K_0402_1% 2 1

B7 C6 B6 B5 C2 D3 D2 E2 K13 K12 J13 J12 G13 G12 F13 F12 F3 F2 G3 G2 J3 J2 K2 K3 E13 D13 D12 C13 B10 B9 C9 B8 C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11 D7 D8 E4 E11 L4 L7 L8 L11

N5 N6 M6 N7 N8 M9 N9 N10 N11 M8 L6 M7 N4 M5 B3 H12 H3 B12 B2 H13 H2 B13 N13 M13 L9 M10 M2 L2 L3 N2 N12 M11 M12

A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11 BA0 BA1 DM0 DM1 DM2 DM3 DQS0 DQS1 DQS2 DQS3 VREF MCL RFU1 RFU2 RAS# CAS# WE# CS# CKE CK CK# NC NC NC NC NC NC NC NC NC VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+2.5VS 1

R43 M11@ 1K_0402_1%

20milR47 M11@ 1 0.1U_0402_16V4Z 2 C24 M11@

VR_VREF_2

NMRASA# NMCASA# NMWEA# NMCSA0# NMCKEA

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDD VDD VDD VDD VDD VDD VDD VDD

B7 C6 B6 B5 C2 D3 D2 E2 K13 K12 J13 J12 G13 G12 F13 F12 F3 F2 G3 G2 J3 J2 K2 K3 E13 D13 D12 C13 B10 B9 C9 B8 C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11 D7 D8 E4 E11 L4 L7 L8 L11

NMDA39 NMDA38 NMDA37 NMDA36 NMDA35 NMDA34 NMDA33 NMDA32 NMDA51 NMDA49 NMDA50 NMDA48 NMDA54 NMDA55 NMDA53 NMDA52 NMDA44 NMDA46 NMDA43 NMDA45 NMDA42 NMDA47 NMDA41 NMDA40 NMDA63 NMDA61 NMDA62 NMDA58 NMDA57 NMDA60 NMDA56 NMDA59

C

2

+2.5VS NMCLKA1 NMCLKA1 C342 R322 1 M11@ 1 2 M11@ R319 1 M11@ 0.1U_0402_16V4Z NMCLKA1# NMCLKA1#

2

+2.5VS

NMCLKA0

NMCLKA0 C411 R360 1 M11@ 1 2 M11@ R355 1 M11@ 0.1U_0402_16V4Z 2 56.2_0402_1% 2 56.2_0402_1%

NMCLKA0#B

NMCLKA0# NMCSA1# NMCSA1#

C4 C11 H4 H11 L12 L13 M3 M4 N3 E7 E8 E10 K6 K7 K8 K9 L5 L10 E5

2 56.2_0402_1% 2 56.2_0402_1%

NMCSA1#

C4 C11 H4 H11 L12 L13 M3 M4 N3 E7 E8 E10 K6 K7 K8 K9 L5 L10 E5

B

VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH

HY5DU573222AFM-33_FBGA144 M11@

VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH HY5DU573222AFM-33_FBGA144 M11@

F6 F7 F8 F9 G6 G7 G8 G9 H6 H7 H8 H9 J6 J7 J8 J9

A

F6 F7 F8 F9 G6 G7 G8 G9 H6 H7 H8 H9 J6 J7 J8 J9

A

TitleTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.5 4 3 2

Compal Electronics, Inc.VGA DDR CHANNEL A EAL20 LA-2461Sheet1

Size Document Number Custom Date:

R ev 0.3 17 of 47

, 04, 2004

5

4

3

2

1

+2.5VS 0.1U_0402_16V4Z 1 22U_1206_16V4Z_V1 C292 M11@ 1 C298 M11@ 1 0.1U_0402_16V4Z C317 M11@ 1 C304 M11@ 1 0.01U_0402_16V7K C318 M11@ 1 C308 M11@ 1 0.1U_0402_16V4Z

+2.5VS

22U_1206_16V4Z_V1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.01U_0402_16V7K

C297 M11@

1

C319 M11@

1

C315 M11@

1

C293 M11@

1

C314 M11@

1

C300 M11@

1

C306 M11@

1

C316 M11@

1

0.01U_0402_16V7K

C305 M11@

1

C299 M11@

1

0.1U_0402_16V4Z

C312 M11@

1

C303 M11@

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

0.1U_0402_16V4ZD

0.1U_0402_16V4Z

0.01U_0402_16V7K

0.1U_0402_16V4Z

D

B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10

U2 NMDB[0..63] NMAB[0..13] NDQMB[0..7] NDQSB[0..7] NMDB[0..63] NMAB[0..13] NDQMB[0..7] NDQSB[0..7] NMAB0 NMAB1 NMAB2 NMAB3 NMAB4 NMAB5 NMAB6 NMAB7 NMAB8 NMAB9 NMAB10 NMAB11 NMAB12 NMAB13 NDQMB0 NDQMB3 NDQMB1 NDQMB2 NDQSB0 NDQSB3 NDQSB1 NDQSB2 N5 N6 M6 N7 N8 M9 N9 N10 N11 M8 L6 M7 N4 M5 B3 H12 H3 B12 B2 H13 H2 B13 N13 M13 L9 M10 M2 L2 L3 N2 N12 M11 M12 C4 C11 H4 H11 L12 L13 M3 M4 N3 E7 E8 E10 K6 K7 K8 K9 L5 L10 E5

U1

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11 BA0 BA1 DM0 DM1 DM2 DM3 DQS0 DQS1 DQS2 DQS3 VREF MCL RFU1 RFU2 RAS# CAS# WE# CS# CKE CK CK# NC NC NC NC NC NC NC NC NC VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

C

+2.5VS 1

R13 M11@ 1K_0402_1% 2

20mil0.1U_0402_16V4Z 2 C9 M11@ NMRASB# NMCASB# NMWEB# NMCSB0# NMCKEB

VR_VREF_3

0.1U_0402_16V4Z

R17 M11@ 1K_0402_1% 2

1

NMRASB# NMCASB# NMWEB# NMCSB0# NMCKEB

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDD VDD VDD VDD VDD VDD VDD VDD

NMCLKB0 C283 1 M11@ 0.1U_0402_16V4Z NMCLKB0#B

NMCLKB0 56.2_0402_1% R271 1 M11@ 2 1 M11@ 2 R272 56.2_0402_1% NMCLKB0# NMCSB1# NMCSB1#

2

C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11 D7 D8 E4 E11 L4 L7 L8 L11

2

B7 C6 B6 B5 C2 D3 D2 E2 K13 K12 J13 J12 G13 G12 F13 F12 F3 F2 G3 G2 J3 J2 K2 K3 E13 D13 D12 C13 B10 B9 C9 B8

NMDB7 NMDB4 NMDB6 NMDB5 NMDB0 NMDB1 NMDB2 NMDB3 NMDB24 NMDB26 NMDB29 NMDB31 NMDB30 NMDB28 NMDB25 NMDB27 NMDB14 NMDB15 NMDB13 NMDB12 NMDB9 NMDB11 NMDB8 NMDB10 NMDB21 NMDB23 NMDB22 NMDB20 NMDB16 NMDB18 NMDB17 NMDB19

NMAB0 NMAB1 NMAB2 NMAB3 NMAB4 NMAB5 NMAB6 NMAB7 NMAB8 NMAB9 NMAB10 NMAB11 NMAB12 NMAB13 NDQMB4 NDQMB7 NDQMB5 NDQMB6 NDQSB4 NDQSB7 NDQSB5 NDQSB6

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10

N5 N6 M6 N7 N8 M9 N9 N10 N11 M8 L6 M7 N4 M5 B3 H12 H3 B12 B2 H13 H2 B13 N13 M13 L9 M10 M2 L2 L3 N2 N12 M11 M12 C4 C11 H4 H11 L12 L13 M3 M4 N3 E7 E8 E10 K6 K7 K8 K9 L5 L1