Toshiba Satellite A80 COMPAL LA-2491

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Sakhir 10, 10C, 10GLA-2491 Schematics Document2 2

Intel Dothan / Alviso GM(PM) / DDR-1 / ICH6-M / Fix Bay (nVIDIA NV43M / NV44M / ATi M22 / M24)

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2004 / 11 /28 Rev:1.0

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Compal Electronics, Inc.Title

Cover SheetTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Sakhir LA-2491SheetE

Rev 1.0 1 of 51

Date:

, 06, 2004

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Compal confidentialFile Name : LA-2491 CRT/TV-OUT1

Fan Controlpage 4

Intel Dothan CPUpage 4,5 H_A#(3..31) 400 / 533 Mhz

Thermal Sensor ADM1032ARMpage 4

Clock Generator ICS954226page 141

page 15

FSB

H_D#(0..63)

NV44 / M24 VGA Board

page 16

Intel Alviso GM( GML,PM)PCBGA 1257page 6,7,8,9,10

DDR-1

DDR-SO-DIMM X2BANK 0, 1, 2, 3 page 11,12,13

LCD CONNpage 16

Signal Channel DDR-1

DMI RJ45 CONN2

page 28

MARVELL LAN 88E8036 88E8053

PCI-E BUS

USB 2.0

USB conn x 3 BT ConnAudio CKT ALC250-D

RJ11 CONNpage 292

page 27

page 31

Intel ICH6-MPCI BUS mBGA-609page 17,18,19,20

USB 2.0

page 31

AC-LINK

page 30

Docking Audio page

AMP & Audio Jack31 page 32

Mini PCI socketpage 29

TI ControllerPCI7411/4510page 23,24

SATA3

SATA to PATA 88SA8040page 21

PATA HDD conn SATA HDDpage 213

1394 Conn.page 24

Slot 0page 26

5in1 CardReader page 25 Slot

LPC BUSPATA

MODULE Connector22 page 32

Docking CONN.*RJ-11 / 45(LED*2) *COMPOSITE Video Out *TVOUT *LINE IN / OUT *PS/2 *Print port *1394 *USB *DC JACK

Power On/Off CKT.page 34

SMsC LPC47N217RTC CKT.page 19 page 34

ENE KB910/910Lpage 35

DC/DC Interface CKT.page 40

Int. KBD Power Circuit DC/DC4

Power OK CKT.page 39

page 44~51

Parellel Portpage 34

Serial Portpage 38

page 36

Touch Pad CONN. page

page 40 34

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BIOSpage 37

Compal Electronics, Inc.Title

Block DiagramsTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Sakhir LA-2491SheetE

Rev 1.0 2 of 51

Date:

, 06, 2004

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STATE

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# HIGH LOW LOW LOW LOW HIGH HIGH LOW LOW LOW HIGH HIGH HIGH LOW LOW HIGH HIGH HIGH HIGH LOW

+VALW ON ON ON ON ON

+V ON ON ON OFF OFF

+VS ON ON OFF OFF OFF

Clock ON LOW OFF1

Voltage RailsPower Plane VIN1

Full ONDescription Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU 1.05V switched power rail 1.25V switched power rail for DDR terminator 1.5V always on power rail 1.5V switched power rail 1.8V switched power rail 2.5V power rail for DDR 2.5V switched power rail 3.3V always on power rail 3.3V power rail 3.3V switched power rail 5V always on power rail 5V switched power rail 5V switched power rail for Direct CD 5V switched power rail for Module Bay 12V always on power rail RTC power S1 N/A N/A ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON S3 N/A N/A OFF OFF OFF ON OFF OFF ON OFF ON ON OFF ON OFF OFF OFF ON ON S5 N/A N/A OFF OFF OFF ON* OFF OFF OFF OFF ON* OFF OFF ON* OFF OFF OFF ON* ON

S1(Power On Suspend) S3 (Suspend to RAM) S4 (Suspend to Disk) S5 (Soft OFF)

B+ +CPU_CORE +1.05VS +DDRVTT +1.5VALW +1.5VS +1.8VS +DDRVCC +2.5VS +3VALW +3V +3VS +5VALW +5VS +5VCD +5VMOD +12VALW +RTCVCC

OFF OFF

Board ID / SKU ID Table for AD channelVcc Ra/Rc/ReBoard ID

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0 1 2 3 4 5 6 7

3.3V +/- 5% 100K +/- 5% Rb / Rd / Rf 0 8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5% NC

V AD_BID min 0 V 0.216 V 0.436 V 0.712 V 1.036 V 1.453 V 1.935 V 2.500 V

V AD_BID typ 0 V 0.250 V 0.503 V 0.819 V 1.185 V 1.650 V 2.200 V 3.300 V

V AD_BID max 0 V 0.289 V 0.538 V 0.875 V 1.264 V 1.759 V 2.341 V 3.300 V

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Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

BOARD ID TableBoard ID 0 1 2 3 4 5 6 7 PCB Revision 0.1 0.2 0.3 1.0

External PCI DevicesDevice CardBus 1394 SD Mini-PCI IDSEL#AD20 AD20 AD20 AD18

REQ#/GNT#2 2 2 1

Interrupts PIRQA/PIRQB PIRQA/PIRQB PIRQA/PIRQB PIRQG/PIRQH

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EC SM Bus1 addressDeviceSmart Battery

EC SM Bus2 addressDeviceADM1032 2'nd Battery Docking

SKU ID TableSKU_ID_CHECK_1 SKU_ID_CHECK_0

Address0001 011X b

Address1001 110X b 1001 011X b 1010 000X b

EEPROM(24C16/02) 1010 000X b(24C04)

1011 000Xb

ICH6M SM Bus addressDevice4

Address1101 001Xb 1001 000Xb 1001 001Xb

0 1 2 3 4 5 6

10 10C 10G 10GC 10J

7 1-Button 1 3 5 7 11

6 3-Buttons 12 13

5 7-Buttons 0 2 4 6 10

Clock Generator ( ICS 952623) DDR DIMM0 DDR DIMM2

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Compal Electronics, Inc.Title

NotesTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Sakhir LA-2491SheetE

Rev 1.0 3 of 51

Date:

, 06, 2004

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H_D#[0..63] JP7A 6 H_A#[3..31] H_A#[3..31] H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 6 6 H_ADSTB#0 H_ADSTB#1

H_D#[0..63]

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+3VS

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P4 U4 V3 R3 V2 W1 T4 W2 Y4 Y1 U1 AA3 Y3 AA2 AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1 R2 P3 T2 P1 T1 U3 AE5 A16 A15

A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31#

Dothan

ADDR GROUP

DATA GROUP

6 H_REQ#[0..4]

H_REQ#[0..4]

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REQ0# REQ1# REQ2# REQ3# REQ4# ADSTB0# ADSTB1# ITP_CLK0 ITP_CLK1 BCLK0 BCLK1

14 CLK_CPU_BCLK 14 CLK_CPU_BCLK#

B15 B14

HOST CLK

6 6 6 6 6 6 6 6 6 6 6B

H_ADS# H_BNR# H_BPRI# H_BR0# H_DEFER# H_DRDY# H_HIT# H_HITM# H_LOCK# H_CPURST#

H_IERR# H_CPURST# H_RS#0 H_RS#1 H_RS#2

N2 L1 J3 N4 L4 H2 K3 K4 A4 J2 B11 H1 K1 L2 M3

ADS# BNR# BPRI# BR0# DEFER# DRDY# HIT# HITM# IERR# LOCK# RESET# RS0# RS1# RS2# TRDY#

CONTROL GROUP

H_RS#[0..2]

H_RS#[0..2]

D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#

A19 A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26 D25 J26 T24 AD20 C23 K24 W25 AE24 C22 L24 W24 AE25

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

U3 2200P_0402_50V7K

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THERMDA THERMDC

2 3 8 7

D+ DSCLK SDATA

VDD1 ALERT# THERM# GND

1 6 4 5

30,34,39 EC_SMB_CK2 30,34,39 EC_SMB_DA2

ADM1032ARM_RM8

+1.05VSC

ITP_TDI ITP_TDO H_CPURST# ITP_TMS PRO_CHOT# H_PWRGOOD H_IERR#

R508 R29 R28 R27 R31 R24 R23

2 2 2 2 2 2 2

1

150_0402_5%

1 @ 54.9_0402_1% 1 @ 54.9_0402_1% 1 1 1 140.2_0402_1% 56_0402_5% 200_0402_5% 56_0402_5%

+3VS

ITP_DBRRESET#

R26

2

1

150_0402_5%

ITP_TRST# ITP_TCK TEST1

R509 R30 R25 R46

2 2 2 2

1 1

680_0402_5% 27.4_0402_1%B

6

H_TRDY#

1 @ 1K_0402_5% 1 @ 1K_0402_5%

C8 B8