'TMS320C6201 Test and Evaluation Board Technical Reference' · Test and Evaluation Board Technical...
Transcript of 'TMS320C6201 Test and Evaluation Board Technical Reference' · Test and Evaluation Board Technical...
TMS320C6201Test and Evaluation Board
Technical Reference
Literature Number: SPRU235ADecember 1997
Printed on Recycled Paper
IMPORTANT NOTICE
Texas Instruments (TI) reserves the right to make changes to its products or to discontinue anysemiconductor product or service without notice, and advises its customers to obtain the latestversion of relevant information to verify, before placing orders, that the information being reliedon is current.
TI warrants performance of its semiconductor products and related software to the specificationsapplicable at the time of sale in accordance with TI’s standard warranty. Testing and other qualitycontrol techniques are utilized to the extent TI deems necessary to support this warranty.Specific testing of all parameters of each device is not necessarily performed, except thosemandated by government requirements.
Certain applications using semiconductor products may involve potential risks of death,personal injury, or severe property or environmental damage (“Critical Applications”).
TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, ORWARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICESOR SYSTEMS OR OTHER CRITICAL APPLICATIONS.
Inclusion of TI products in such applications is understood to be fully at the risk of the customer.Use of TI products in such applications requires the written approval of an appropriate TI officer.Questions concerning potential risk applications should be directed to TI through a local SCsales office.
In order to minimize risks associated with the customer’s applications, adequate design andoperating safeguards should be provided by the customer to minimize inherent or proceduralhazards.
TI assumes no liability for applications assistance, customer product design, softwareperformance, or infringement of patents or services described herein. Nor does TI warrant orrepresent that any license, either express or implied, is granted under any patent right, copyright,mask work right, or other intellectual property right of TI covering or relating to any combination,machine, or process in which such semiconductor products or services might be or are used.
Copyright 1997, Texas Instruments Incorporated
iii
Preface
Read This First
About This Manual
This manual describes the operation of the TMS320C6201 (’C6201) test andevaluation board (TEB). The ’C6201 TEB is a low-cost desktop card that helpsyou evaluate certain characteristics of the ’C6201 digital signal processor(DSP) to determine if the DSP meets your application requirements. You cancreate your software to run on the board and expand the system using theprototype area.
This manual tells you how to install and operate the ’C6201 TEB with yoursystem. It also describes key features of the TEB and helps you understandthe TEB’s key components.
How to Use This Manual
This book contains the following types of information:
Introductory material , consisting of Chapters 1 and 2. Chapter 1provides an overview of the ’C6201 TEB and its components. Chapter 2tells you how to install the TEB.
Topical material , consisting of Chapter 3, provides descriptions ofhardware functions.
Reference material , consisting of Appendixes A and B, provides PAL
code and schematics.
Notational Conventions
This document uses the following conventions.
Program listings, program examples, and interactive displays are shownin a special typeface.
Device names are abbreviated with a C, followed by the last two to fouralphanumeric characters in the name. For example, TMS320C6x iswritten as ’C6x and TMS320C6201 is written as ’C6201.
Information About Cautions / Related Documentation / Related Documentation From Texas Instruments
iv
Information About Cautions
This book contains cautions.
This is an example of a caution statement.
A caution statement describes a situation that could potentiallydamage your software or equipment.
The information in a caution is provided for your protection. Please read eachcaution carefully.
Related Documentation
You can use the following book to supplement this user’s guide:
Programming Atmel’s AT29 Flash Family, Flash Application Note (AN-3)(Atmel literature number 0518B)
Related Documentation From Texas Instruments
The following books describe the ’C6x devices and related support tools. Toobtain a copy of any of these TI documents, call the Texas InstrumentsLiterature Response Center at (800) 477-8924. When ordering, please identifythe book by its title and literature number.
XDS51x Emulator Installation Guide (literature number SPNU070)describes the installation of the XDS510 , XDS510PP , andXDS510WS emulator controllers. The installation of the XDS511emulator is also described.
JTAG/MPSD Emulation Technical Reference (literature number SPDU079)provides the design requirements of the XDS510 emulator controller,discusses JTAG designs (based on the IEEE 1149.1 standard), andmodular port scan device (MPSD) designs.
TMS320C6x C Source Debugger User’s Guide (literature numberSPRU188) tells you how to invoke the ’C6x simulator and emulatorversions of the C source debugger interface. This book discussesvarious aspects of the debugger, including command entry, codeexecution, data management, breakpoints, profiling, and analysis.
Related Documentation From Texas Instruments
v Read This First
TMS320C6x C Source Debugger User’s Guide (for SPARCstations)(literature number SPRU224) tells you how to invoke the ’C6x simulatorand emulator versions of the C source debugger interface forSPARCstations. This book discusses various aspects of the debugger,including command entry, code execution, data management,breakpoints, profiling, and analysis.
TMS320C62xx Technical Brief (literature number SPRU197) gives anintroduction to the ’C62xx digital signal processor, development tools,and third-party support.
TMS320C6201 Digital Signal Processor Data Sheet (literature numberSPRS051) describes the features of the TMS320C6xx and providespinouts, electrical specifications, and timings for the device.
TMS320C62xx Peripherals Reference Guide (literature number SPRU190)describes common peripherals available on the TMS320C62xx digitalsignal processors. This book includes information on the internal dataand program memories, the external memory interface (EMIF), the hostport, serial ports, direct memory access (DMA), clocking andphase-locked loop (PLL), and the power-down modes.
TMS320C62xx CPU and Instruction Set Reference Guide (literaturenumber SPRU189) describes the ’C62xx CPU architecture, instructionset, pipeline, and interrupts for the TMS320C62xx digital signalprocessors.
TMS320C62xx Programmer’s Guide (literature number SPRU198)describes ways to optimize C and assembly code and includesapplication program examples.
TMS320C6x Optimizing C Compiler User’s Guide (literature numberSPRU187) describes the ’C6x C compiler. This C compiler accepts ANSIstandard C source code and produces assembly language source codefor the ’C6x generation of devices. This book also describes theassembly optimizer, which helps you optimize your assembly code.
TMS320C6x Assembly Language Tools User’s Guide (literature numberSPRU186) describes the assembly language tools (assembler, linker,and other tools used to develop assembly language code), assemblerdirectives, macros, common object file format, and symbolic debuggingdirectives for the ’C6x generation of devices.
FCC Warning / Trademarks
vi
FCC Warning
This equipment is intended for use in a laboratory test environment only. Itgenerates, uses, and can radiate radio frequency energy and has not beentested for compliance with the limits of computing devices pursuant to subpartJ of part 15 of FCC rules, which are designed to provide reasonable protectionagainst radio frequency interference. Operation of this equipment in otherenvironments may cause interference with radio communications, in whichcase the user at his own expense will be required to take whatever measuresmay be required to correct this interference.
Trademarks
320 Hotline On-line, XDS510, and XDS510WS are trademarks of TexasInstruments Incorporated.
ABEL is a trademark of Data I/O.
AT and PC are trademarks of International Business Machines Corporation.
PAL is a registered trademark of Advanced Micro Devices, Inc.
Solaris and SunOS are trademarks of Sun Microsystems, Inc.
SPARC and SPARCstation are trademarks of SPARC International, Inc., butlicensed exclusively to Sun Microsystems, Inc.
UNIX is a registered trademark in the United States and other countries,licensed exclusively through X/Open Company Limited.
Windows and Windows NT are registered trademarks of MicrosoftCorporation.
If You Need Assistance
vii Read This First
If You Need Assistance . . .
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DocumentationWhen making suggestions or reporting errors in documentation, please include the following information that is on the titlepage: the full title of the book, the publication date, and the literature number.
Mail: Texas Instruments Incorporated Email: [email protected] Documentation Services, MS 702P.O. Box 1443Houston, Texas 77251-1443
Note: When calling a Literature Response Center to order documentation, please specify the literature number of thebook.
If You Need Assistance ...
Contents
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Contents
1 Overview of the TMS320C6201 Test and Evaluation Board 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . Provides an overview of the TMS320C6201 test and evaluation board, including its keyfeatures and major functions.
1.1 Key Features of the TMS320C6201 TEB 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Functional Overview of the TMS320C6201 TEB 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Installing the TMS320C6201 Test and Evaluation Board 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . Describes the minimum hardware configuration required for the TMS320C6201 test andevaluation board.
2.1 The TMS320C6201 TEB 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Host Requirements 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 TMS320C6201 TEB Kit Components 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 TMS320C6201 TEB Connection 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 TMS320C6201 TEB Installation 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 TMS320C6201 Test and Evaluation Board Operation 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Describes the TMS320C6201 test and evaluation board and its various interfaces and keycomponents.
3.1 Custom Power Supply 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Power Requirements 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 Reset Generation 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4 Clock Generation 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5 Interrupt Generation 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6 External Memories 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.7 Host Port Connection 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8 Serial Ports and Timers Connection 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.9 Emulation Port Connection 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.10 Prototyping Area 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.11 Shunt Jumpers and DIP Switches 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A TMS320C6201 TEB PAL Equations A-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Contains the programmable logic source for the TMS320C6201 TEB PAL equations.
B TMS320C6201 TEB Schematics B-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Contains the schematics for the TMS320C6201 TEB.
Tables
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Figures
1–1 TMS320C6201 TEB Connectivity 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1 TMS320C6201 TEB 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2 Attaching AC Cord Into Power Supply 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3 Connecting the Power Supply to the TEB 2-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–4 Connecting the Emulator to the TEB 2-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1 Power Supply DC Connector 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tables
2–1 Default TEB Shunt Jumper Settings 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2 Default TEB DIP Switch Settings 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1 TEB Fuse Ratings 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2 TEB Memories 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3 TEB Shunt Jumpers 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–4 TEB DIP Switches 3-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-1Overview of the TMS320C6201 Test and Evaluation Board
Overview of the TMS320C6201Test and Evaluation Board
The TMS320C6201 test and evaluation board (TEB) helps you evaluate cer-tain characteristics of the TMS320C6201 (’C6201) fixed-point digital signalprocessor (DSP) to ensure that it meets your application requirements. TheTEB is self-contained, only requiring connections to an AC power supply andto your own emulation hardware and software. The TEB is platform indepen-dent and uses either an XDS510 emulator controller for a PC or anXDS510WS emulator controller for a UNIX workstation.
The ’C6201 TEB carries a ’C6201 DSP on board to allow full-speed verificationof ’C6201 code. You can also use the TEB to design your own prototype sys-tems. The ’C6201 DSP has 128 Kbyte on-chip SRAM that consists of 64 Kbyteinternal program/cache and 64 Kbyte internal data memory. The TEB uses the’C6201’s 32-bit external memory interface to facilitate accesses to on-boardsynchronous and asynchronous memories. A PC or UNIX windows-orienteddebugger simplifies code development and debugging. For more informationabout the debugger, see the TMS320C6201 C Source Debugger User’s Guideor the TMS320C6x C Source Debugger User’s Guide for SPARCStation.
The TEB also has a ’C6201 16-bit host access port, a serial and timer accessport, an IEEE Standard 1149.1-compliant JTAG connector for accessing the’C6201’s scan-based emulation features, and a through-hole area for designprototyping. You can also use the TEB as a reference when designing yourown systems.
Topic Page
1.1 Key Features of the TMS320C6201 TEB 1-2. . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Functional Overview of the TMS320C6201 TEB 1-3. . . . . . . . . . . . . . . . . .
Chapter 1
Key Features of the TMS320C6201 TEB
1-2
1.1 Key Features of the TMS320C6201 TEB
The ’C6201 TEB has the following features:
’C6201 capable of executing 1600 million instructions per second (MIPS)
Varied instruction cycle times of the ’C6201:
5-ns instruction cycle time when using the DSP’s internal memories
6-ns instruction cycle time when using synchronous dynamic RAM(SDRAM) and one-half rate external synchronous burst static RAM(SBSRAM)
6.7-ns instruction cycle time when using the TEB’s external SBSRAM,regardless of which other TEB memories are used
512K bytes 6.7-ns SBSRAM
8M bytes 12-ns SDRAM
256K bytes 12-ns asynchronous static RAM (ASRAM)
128K bytes 200-ns flash programmable erasable ROM (PEROM)
16-bit host port header
Access to the ’C6201’s serial ports and timers via a header
Emulator connector
Prototyping area
Functional Overview of the TMS320C6201 TEB
1-3Overview of the TMS320C6201 Test and Evaluation Board
1.2 Functional Overview of the TMS320C6201 TEB
Figure 1–1 shows the basic block diagram and interconnects of the ’C6201TEB. The interconnects include the external memory, host port, emulation in-terfaces, and serial ports and timers.
The ’C6201 DSP interfaces to the memories through a 32-bit data bus. Head-ers are situated between the synchronous and asynchronous memories to al-low easy examination of the external memory interface’s address, data, andcontrol signals. The TEB’s control signals are also available at these headers.Additional headers between the asynchronous memories and the prototypingarea allow for access to asynchronous control signals and the data bus, whichmay be used in the prototyping area.
Use the host port header to connect your host processor to the ’C6201’s hostport interface. This allows your host processor to access the ’C6201’s internalmemory. The serial ports and timers header allows access to the ’C6201’s seri-al ports and timers.
An emulation connector provides access to the IEEE Standard 1149.1 (JTAG)scan-based emulation port of the ’C6201. This port is a superset of the IEEE1149.1 standard and is used by either an XDS510 or an XDS510WS emulator.
Functional Overview of the TMS320C6201 TEB
1-4
Figure 1–1. TMS320C6201 TEB Connectivity
Host portinterfaceheader
BOOTMODEconfigurationDIP switches
BOOTMODE[4:0]
Host port dataHD[15:0]
Emulation port
Address EA[21:2]
Data ED[31:0]
Control
Buffering and prototypearea headers
PEROM128KB
JTAGemulatorconnector
’C6201
ASRAM256KB
SBSRAM512KB
Buffering andobservation headers
SDRAM8MB
Host control
Serial portsand timers
accessheader
Serial ports[1:0]
Timers[1:0]
2-1
Installing the TMS320C6201Test and Evaluation Board
This chapter provides installation instructions for the ’C6201 TEB.
Topic Page
2.1 The TMS320C6201 TEB 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Host Requirements 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 TMS320C6201 TEB Kit Components 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4 TMS320C6201 TEB Connection 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5 TMS320C6201 TEB Installation 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 2
The TMS320C6201 TEB
2-2
2.1 The TMS320C6201 TEB
The ’C6201 TEB is 5 inches x 12 inches and is intended for desktop use. Itmeets the following specifications:
Instruction cycles of 7.5 ns (frequency equal to 133 MHz). This is accom-plished using a 33.25-MHz oscillator and operating the ’C6201’s phase-locked loop (PLL) clock in multiply-by-four mode.
Configuration of the ’C6201 boot process using the TEB’s on-board DIPswitches. These switches are set for the following:
Use of the ’C6201’s memory map 1 Memory at address 0 is ’C6201 internal RAM Boot-load startup process using 8-bit PEROM with default timing in
CE1 external address space
Use of the emulator’s TCLK signal
Figure 2–1 shows the layout of the ’C6201 TEB.
The T
MS
320C6201 T
EB
2-3Installing the T
MS
320C6201 Test and E
valuation Board
Figure 2–1. TMS320C6201 TEB
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Reset switch S5
Shunt jumpers JP3
Powerconnector
J10
OscillatorU3
Emulation connector J2
BOOTMODEconfigurationDIP switches S4
Host port header J4
Serial ports and timers access header J12
External emulator (TCLK)clock J3
External ’C6201clock J1
Host Requirements
2-4
2.2 Host Requirements
The TEB is platform independent and can be used with an XDS510 emulatorcontroller for a PC or an XDS510WS emulator controller for a UNIX worksta-tion. The XDS51x Emulator Installation Guide lists the minimum hardware re-quirements for your emulator. The installation instructions included with youremulator software lists the minimum software requirements for your emulator.
2.3 TMS320C6201 TEB Kit Components
The kit contains the following items:
’C6201 TEB
Custom power supply
TMS320C6201 Test and Evaluation Board Technical Reference (this doc-ument)
Diskette containing TEB-related files
2.4 TMS320C6201 TEB Connection
Before you apply power to the TEB or connect the TEB to your emulator, seeTable 2–1 and Table 2–2 to ensure that all shunt jumpers and DIP switchesare set to their default positions. Table 3–3 and Table 3–4 contain completedescriptions of all shunt jumpers and DIP switches used on the TEB. Seethese tables before you change any default settings.
Host Requirements / TMS320C6201 TEB Kit Components / TMS320C6201 TEB Connection
TMS320C6201 TEB Connection
2-5Installing the TMS320C6201 Test and Evaluation Board
Table 2–1. Default TEB Shunt Jumper Settings
A–B indicates HIGH (1), B–C indicates LOW (0)
Name Position Setting Description
ROM protect JP1 1–2 Flash PEROM write disabled
TCLK select JP2 2–3 Use XDS51x emulator’s TCLK signal
NMI JP3.1 B–C Nonmaskable interrupt inactive
EXT_INT4EXT_INT5EXT_INT6EXT_INT7
JP3.2JP3.3JP3.4JP3.5
B–CB–CB–CB–C
Interrupts EXT_INT4—EXT_INT7 in-active
PLLFREQ1PLLFREQ2PLLFREQ3
JP3.6JP3.7JP3.8
B–CB–CB–C
25 MHz < CLKOUT1 ≤ 135 MHz
CLKMODE0CLKMODE1
JP3.9JP3.10
A–BA–B
PLL multiply-by-four mode
RSV0RSV1RSV2RSV3RSV4
JP3.11JP3.12JP3.13JP3.14JP3.15
A–BA–BA–BA–BB–C
Reserved
EMU0EMU1
JP3.16JP3.17
A–BA–B
TI emulation support
LENDIAN JP3.18 A–B Little-endian mode addressing
ARDY JP3.19 A–B External controller ready (to avoid stall-ing)
HOLD– JP3.20 A–B Connects ’C6201 to the system
UnusedUnused
JP3.21JP3.22
No ShuntNo Shunt
TINP0TINP1
JP3.23JP3.24
A–BA–B
Timer inputs
TMS320C6201 TEB Connection
2-6
Table 2–2. Default TEB DIP Switch Settings
OFF indicates HIGH (1), ON indicates LOW (0)
Name Position Setting Description
BOOTMODE0BOOTMODE1BOOTMODE2BOOTMODE3BOOTMODE4
S4.1S4.2S4.3S4.4S4.5
OFFONOFFOFFON
Boot configuration settings for memory map1 with internal RAM at address 0 and 8-bitPEROM boot process
SWUSER S4.6 OFF User-defined input to U8 PAL
TMS320C6201 TEB Installation
2-7Installing the TMS320C6201 Test and Evaluation Board
2.5 TMS320C6201 TEB Installation
The ’C6201 TEB is connected to a power supply and an emulator. The follow-ing steps show how to connect the TEB to both.
Never disconnect or reconnect any cables or other hardwaredevices while power is applied to the emulator or TEB. Doing socan cause damage to your emulator and/or TEB.
Step 1: Install your emulation hardware and software.
Step 2: Ensure the emulator power is off. If you have an XDS510WS emula-tor controller (for a UNIX workstation), switch off the power. If youhave an XDS510 emulator controller (for a PC), power down theemulator by shutting down Windows and turning off your PC.
Step 3: Insert the female end of the AC line cord into the power supply.
Figure 2–2. Attaching AC Cord Into Power Supply
AC cord
Power supply
TMS320C6201 TEB Installation
2-8
Step 4: Connect the power supply’s male 6-pin connector into J10 of theTEB.
Figure 2–3. Connecting the Power Supply to the TEB
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Reset S5Shunt jumpers JP3
Powerconnector
J10J3
J1
OscillatorU3
Emulation connector J2
DIP switchesS4
Host port header J4
Serial ports and timers access header J12
Power supply
TMS320C6201 TEB Installation
2-9Installing the TMS320C6201 Test and Evaluation Board
Step 5: With moderate downward pressure, connect the 14-pin keyed con-nector from your emulator to J2 on the TEB.
Figure 2–4. Connecting the Emulator to the TEB
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Reset S5
Shunt jumpers JP3Power
connectorJ10
J3
J1
OscillatorU3
Emulation connector J2
DIP switchesS4
Host port header J4
Serial ports and timers access header J12
Emulator connector
TMS320C6201 TEB Installation
2-10
Step 6: Turn on power to the emulator. If you have an XDS510WS emulatorcontroller (for a UNIX workstation), switch on the power. If you havean XDS510 emulator controller (for a PC), turn on your PC.
Step 7: Plug the male end of the power supply’s AC line cord into an AC out-let. This applies power to the TEB. An LED on the power supply andone on the TEB indicates that power is applied.
If you need to disconnect the TEB, unplug the TEB, then turn off power to theemulator (using the power switch if you have an XDS510WS or by shuttingdown Windows and turning off your PC if you have an XDS510).
3-1
TMS320C6201 Test and EvaluationBoard Operation
This chapter describes the ’C6201 TEB, its key components, and how they op-erate. It also provides additional information on the TEB’s various interfaces.
The ’C6201 TEB consists of the following components:
Custom power supply TMS320C6201 TEB
Memory control Power Reset generation Clock generation Interrupt generation ’C6201 external memory interface ’C6201 host port interface Serial ports and timers interface Emulation interface Prototyping area Shunt jumpers and DIP switches
3.5-in floppy diskette
Topic Page
3.1 Custom Power Supply 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Power Requirements 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Reset Generation 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4 Clock Generation 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5 Interrupt Generation 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.6 External Memories 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.7 Host Port Connection 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.8 Serial Ports and Timers Connection 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.9 Emulation Port Connection 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.10 Prototyping Area 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.11 Shunt Jumpers and DIP Switches 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 3
Power Requirements
3-2
3.1 Custom Power Supply
A custom power supply provides 2.5-, 3.3-, and 5.0-VDC regulated supply volt-ages to the TEB when connected to an AC wall outlet. An LED on top of thepower supply illuminates when it has been properly connected to AC power.The LED blinks when the power supply is connected to a wall outlet where theDC outlet is not connected to the TEB. The TEB’s power supply must beloaded to regulate the voltages measured at its DC outlet. Voltages at the DCoutlet without the load of the TEB appear unstable.
Figure 3–1. Power Supply DC Connector
65
4
321
Front view
2.5 VGnd3.3 V
Gnd5.0 VGnd
3.2 Power Requirements
LED D1 (located next to the power jack on the TEB) illuminates when poweris applied to the 6-pin DC power jack J10. See Figure 2–4 for details about ap-plying power to the TEB. Table 3–1 lists the appropriate fuse current ratingsto protect the TEB components.
Table 3–1. TEB Fuse Ratings
Voltage Label
Schematicreference
designation Rating Purpose of Supply Voltage
2.5 VCC2 F2 7.0 A ’C6201 internals
3.3 VCC3 F1 4.0 A ’C6201 I/Os and TEB 3.3-V components
3.3 P_VCC3 F5 0.75 A Prototype area 3.3-V components
5.0 VCC5 F3 0.25 A TEB 5.0-V components
5.0 P_VCC5 F4 1.5 A Prototype area 5.0-V components
Custom Power Supply / Power Requirements
Reset Generation
3-3TMS320C6201 Test and Evaluation Board Operation
Use only fuses with ratings listed in Table 3–1 to avoid damage tothe TEB.
Do not draw more current than allowed by the fuses. This candamage the power supply and the TEB.
3.3 Reset Generation
At power up, power down, and during brownout conditions, a supply voltagesupervisory circuit forces the ’C6201 DSP into a reset condition. Pressing thepush-button switch S5 also forces a reset. In either case, the ’C6201’s resetline is active (low) for a period of at least 200 ms.
3.4 Clock Generation
The ’C6201 DSP operates at frequencies up to 200 MHz. Two options for gen-eration of the clock signal CLKIN are provided on the TEB.
A 68-Ω resistor installed in location R2 selects oscillator U3.
Removing R2 and installing it as R3 selects the SMA connector J1 as thesource for the CLKIN signal.
These options, combined with the ’C6201’s internal phase-locked loop (PLL),allow you to experiment with different clock frequencies. Use of the PLL in themultiply-by-four mode for a CLKOUT1 frequency other than 133 MHz requiresthe replacement of components R1, C2, and C3. See the TMS320C6201 Digi-tal Signal Processor Data Sheet for more information.
The factory default configuration of the TEB uses a 33.25-MHz oscillator toprovide input to the ’C6201’s PLL, which is set to operate in multiply-by-fourmode. R2 is installed to select U3 as the source for the ’C6201’s PLL. Shuntjumpers JP3.10 (CLKMODE1) and JP3.9 (CLKMODE0) select the clock multi-ply-by-four mode. Shunt jumpers JP3.8 (PLLFREQ3)–JP3.6 (PLLFREQ1) se-lect a CLKOUT1 frequency range of 25–135 MHz. The oscillator and the PLLprovide a CLKOUT1 signal that has a period of approximately 7.5 ns, a fre-quency of 133 MHz, and a duty cycle of approximately 50%.
Power Requirements / Reset Generation / Clock Generation
Interrupt Generation
3-4
You can operate the ’C6201 internally at frequencies up to 200 MHz by reconfi-guring shunt jumpers JP3.10–JP3.6 and replacing the CLKIN source. Youmust also replace oscillator U3 with a different frequency 5.0-V oscillator. Youcan use SMA connector J1 by removing and installing the 68 Ω resistor R2 inthe location of R3. When changing frequencies, see the TMS320C6201 DigitalSignal Processor Data Sheet to achieve optimal performance for your desiredconfiguration of the TEB.
3.5 Interrupt Generation
Pressing the push-button switch S5 generates a manual reset of the ’C6201.Shunt jumpers JP3.1 (NMI) and JP3.2 (EXT_INT4)–JP3.5 (EXT_INT7) pullthe ’C6201’s external interrupts up or down. The factory default shunt jumpersettings must be pulled low because these interrupts are rising-edge sensitive.
Figure 2–1, page 2-3, shows solder connections for the interrupts at the upperright of the prototype area, to the right of U26. You must remove the appropri-ate interrupt shunt jumper(s) to control these interrupts with non-TEB circuitry(for example, prototype circuitry).
3.6 External Memories
The TEB provides four different types of memory for program execution anddata storage. The TEB’s memory types, their speeds and organizations, andthe selected ’C6201 chip enable signal are listed in Table 3–2:
Table 3–2. TEB Memories
Memory Type Designation
Timing (ns) Organization Total
’C6201CE
SBSRAM U10 6.7 128KB x 32 bits 512KB CE2
SDRAM U11–U14 12 2MB x 8 bits 8MB CE0
ASRAM U20–U21 12 64KB x 16 bits 256KB CE3
ROM U22–U25 200 32KB x 8 bits 128KB CE1
See the TMS320C6201 Digital Signal Processor Data Sheet for a descriptionof the chip enable signals and the processor memory map.
Clock Generation / Interrupt Generation / External Memories
Host Port Connection
3-5TMS320C6201 Test and Evaluation Board Operation
3.7 Host Port Connection
Header J4 connects to the TEB and an off-board (user supplied and pro-grammed) host. The header is an AMP 2–767004–2 and the mating connectorpart number is AMP 767003–9.
3.8 Serial Ports and Timers Connection
Header J12 allows access to the ’C6201’s serial ports and timers. The headeris an AMP 2–767004–2 and the mating connector part number is AMP767003–9.
Note:
Timer input 0 (TINP0) and timer input 1 (TINP1) are pulled high by the factorydefault configuration of shunt jumpers JP3.23 and JP3.24, respectively.
3.9 Emulation Port Connection
Emulation connector J2 connects the ’C6201’s emulation port and either theXDS510 or XDS510WS emulator. Shunt jumpers JP3.16 and JP3.17 pull theEMU0 and EMU1 signal up or down. The factory default configuration causesthese signals to be pulled up. For more information about emulation signals,see the JTAG/MPSD Emulation Technical Reference.
SMA connector J3 allows you to provide an alternative TCK signal. To use thealternative TCK signal, shunt jumper JP2 must be moved from its factory de-fault position to connect pins 1 and 2.
Host Port Connection / Serial Ports and Timers Connection / Emulation Port Connection
Prototyping Area
3-6
3.10 Prototyping Area
Figure 2–1 shows the through-hole area for prototyping located at the left endof the TEB. This area includes two sockets for user-programmable 3.3-Vdc22V10 PAL devices (U26 and U27). Fused 3.3-Vdc (PVCC3) and 5.0-Vdc(PVCC5) supply connections are provided at both the top and bottom edges ofthe prototyping area. Fuses protect against attempts to draw more currentthan is allowed by the power supply’s design. Ground connections are pro-vided at the extreme left end of the prototyping area.
Connectors J8 and J9 provide connectivity to the ’C6201’s external memoryinterface’s data, address, and control busses. These 32-bit connectors pro-vide a direct connection with the modern test equipment cables. (The headerpart number is AMP 2–767004–2 and the mating connector part number isAMP 767003–9.) All 32 bits of data are available at J8. Only 19 bits of addressare available at J9 because the TEB’s prototyping area shares the ’C6201’sexternal address space CE1 with the on-board PEROM. Consequently, onlyasynchronous devices may be interfaced to J8 and J9. PAL U8 logic equa-tions (Appendix A) control buffers between the asynchronous memory portionof the TEB and the TEB’s prototyping area.
The ’C6201’s external interrupts are available as test points NMI andEXT_INT4–EXT_INT7. See section 3.5, Interrupt Generation, for detailsabout the use of these test points.
Use only fuses with ratings given in Table 3–1 to avoid damage tothe TEB.
Do not draw more current than allowed by the fuses. This candamage the power supply and the TEB.
Shunt Jumpers and DIP Switches
3-7TMS320C6201 Test and Evaluation Board Operation
3.11 Shunt Jumpers and DIP Switches
You can configure the on-board ’C6201 and TEB devices by changing the set-tings of shunt jumpers and DIP switches described in Table 3–3 andTable 3–4.
Table 3–3. TEB Shunt Jumpers
Name Position Description
ROM protect JP1 Write protects Flash PEROM1–2 Writes disabled2–3 Writes enabled
TCLK select JP2 Selects JTAG clock1–2 SMA connector (J3)2–3 Emulation connector (J2)
NMI JP3.1 Nonmaskable interruptA–B ActiveB–C InactiveNONE Controlled by other logic (prototyping area)
EXT_INT4EXT_INT5EXT_INT6EXT_INT7
JP3.2JP3.3JP3.4JP3.5
External interrupts: edge-driven (rising edge)A–B ActiveB–C InactiveNONE Controlled by other logic (prototyping area)
PLLFREQ1PLLFREQ2PLLFREQ3
JP3.6JP3.7JP3.8
Selects one of three frequency ranges for the ’C6201 CLKOUT1 signal
JP3.8 JP3.7 JP3.6 Frequency Range
B–C B–C B–C 25–135 MHzB–C B–C A–B 35–160 MHzB–C A–B B–C 40–200 MHz
CLKMODE0CLKMODE1
JP3.9JP3.10
Clock mode select. Selects the multiplication factor of the input clock fre-quency. CLKOUT1 is 1x or 4x CLKIN:
JP3.10 JP3.9 Clock Mode
B–C B–C PLL multiply-by-one modeB–C A–B ReservedA–B B–C ReservedA–B A–B PLL multiply-by-four mode
Shunt Jumpers and DIP Switches
3-8
Table 3–3. TEB Shunt Jumpers (Continued)
Name Position Description
RSV0RSV1RSV2RSV3RSV4
JP3.11JP3.12JP3.13JP3.14JP3.15
Reserved
EMU0EMU1
JP3.16JP3.17
TI emulation support
LENDIAN JP3.18 Selects endianess of addressingB–C Big endianA–B Little endian
ARDY JP3.19 Asynchronous memory ready signal
HOLD– JP3.20 Hold request from host (external memory interface bus arbitration)
UNUSEDUNUSED
JP3.21JP3.22
UnusedUnused
TINP0TINP1
JP3.23JP3.24
Timer input 0Timer input 1
Note: A–B indicates HIGH (1)B–C indicates LOW (0)
Table 3–4. TEB DIP Switches
Name Position Description
BOOTMODE0BOOTMODE1BOOTMODE2BOOTMODE3BOOTMODE4
S4.1S4.2S4.3S4.4S4.5
Boot mode configuration. See the TMS320C62xx PeripheralsReference Guide for a complete description.
SWUSER S4.6 User-defined input to U8 PAL
A-1
Appendix A
TMS320C6201 TEB PAL Equations
This appendix contains the programmable logic source for the TMS320C6201test and evaluation board PAL equations. These were compiled with DATAI/O ABEL version 4.0.
Appendix A
Running Title—Attribute Reference
A-2
module U8_MLATitle ’PAL NAME Memory Logic Block A (PAL MLA)PAL # U8, D600555–1741*DWG NAME TMS320C6201 Test & Evaluation BoardASSY # D600550–0001BCOMPANY Texas Instruments, Incorporated
SYNTHESIS TOOL: ABEL–4 Design Environment v1.0’
U8 device ’P22V10C’; ”The PALLV22V10 is a 28–pin PLCC
”NC pin 1; NO CONNECT clkout1 pin 2; ”Clock out 1 from C6201 ce1_ pin 3; ”Chip enable 1 from C6201 awe_ pin 4; ”Asynchronous write enable from C6201 aoe_ pin 5; ”Asynchronous output enable from C6201 ea21 pin 6; ”EMIF address bit 21 from C6201 ce3_ pin 7; ”Chip enable 3 from C6201 ”NC pin 8; NO CONNECT tp2 pin 9; ”Test point(2) input – undefined tp3 pin 10; ”Test point(3) input – undefined tp4 pin 11; ”Test point(4) input – undefined tp5 pin 12; ”Test point(5) input – undefined swuser pin 13; ”Switch input – user defined GND pin 14; ”Ground ”NC pin 15; NO CONNECT reset_ pin 16; ”Reset a_dir pin 17; ”Asynchronous direction a_oe_ pin 18; ”Asynchronous buffer output enable romce_ pin 19; ”ROM Chip Enable p_ce_ pin 20; ”Prototype chip enable p_dir pin 21; ”Prototype buffer direction ”NC pin 22; NO CONNECT p_dboe_ pin 23; ”Prototype data buffer output enable p_aboe_ pin 24; ”Prototype addr buffer output enable tp6 pin 25; ”Test point(6) output – undefined tp7 pin 26; ”Test point(7) output – undefined tp8 pin 27; ”Test point(8) output – undefined VCC pin 28; ”Power
TMS320C6201 TEB PAL Equations
Running Title—Attribute Reference
A-3 Chapter Title—Attribute Reference
Equations
”Because the TMS320C6201 may be in part of a write cycle (i.e., setup or hold ”time) when awe_ is inactive, the aoe_ signal should be used to determine the ”direction of the access.
”axoez axwez Access”––––– ––––– –––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––” 0 0 Invalid combination with the DSP ” Should not happen so disable the buffers
” 0 1 Read from asynchronous type to the DSP ” Should cause buffers to output towards the DSP
” 1 0 Write (strobe) to asynchronous type from the DSP ” Should cause buffers to output towards async type
” 1 1 Could be part of a write cycle (i.e., write setup or hold time)” Should cause buffers to output towards async type
a_dir = aoe_; ”A–>B (i.e., DSP to external memories) when 1, ”B–>A (i.e., external memories to DSP) when 0 a_oe_ = (ce1_ & ce3_ & awe_ & aoe_) # (!awe_ & !aoe_);
romce_ = ce1_ # ea21; ”Select flash ROM when ea21 = 0 p_ce_ = ce1_ # !ea21; ”Select Prototype area when ea21 = 1 p_dir = !(!ce1_ & ea21) # aoe_; p_dboe_ = (awe_ & aoe_) # (!awe_ & !aoe_) # ce1_ # !ea21; p_aboe_ = 0;
Test_Vectors ([ ce1_, ce3_,aoe_, awe_] –> [a_dir, a_oe_]) [ 1 , 1 , 0 , 0 ] –> [ 0 , 1 ]; [ 1 , 1 , 0 , 1 ] –> [ 0 , 0 ]; [ 1 , 1 , 1 , 0 ] –> [ 1 , 0 ]; [ 1 , 0 , 1 , 1 ] –> [ 1 , 0 ]; [ 0 , 1 , 1 , 1 ] –> [ 1 , 0 ]; [ 1 , 1 , 1 , 1 ] –> [ 1 , 1 ];
TMS320C6201 TEB PAL Equations
TMS320C6201 TEB PAL Equations
Running Title—Attribute Reference
A-4
Test_Vectors ([ce1_, ea21, aoe_, awe_] –> [romce_, p_ce_, p_dir, p_dboe_, p_aboe_]) [ 0 , 0 , 0 , 0 ] –> [ 0 , 1 , 1 , 1 , 0 ]; [ 0 , 0 , 0 , 1 ] –> [ 0 , 1 , 1 , 1 , 0 ]; [ 0 , 0 , 1 , 0 ] –> [ 0 , 1 , 1 , 1 , 0 ]; [ 0 , 0 , 1 , 1 ] –> [ 0 , 1 , 1 , 1 , 0 ]; [ 0 , 1 , 0 , 0 ] –> [ 1 , 0 , 0 , 1 , 0 ]; [ 0 , 1 , 0 , 1 ] –> [ 1 , 0 , 0 , 0 , 0 ]; [ 0 , 1 , 1 , 0 ] –> [ 1 , 0 , 1 , 0 , 0 ]; [ 0 , 1 , 1 , 1 ] –> [ 1 , 0 , 1 , 1 , 0 ];
[ 1 , 0 , 0 , 0 ] –> [ 1 , 1 , 1 , 1 , 0 ]; [ 1 , 0 , 0 , 1 ] –> [ 1 , 1 , 1 , 1 , 0 ]; [ 1 , 0 , 1 , 0 ] –> [ 1 , 1 , 1 , 1 , 0 ]; [ 1 , 0 , 1 , 1 ] –> [ 1 , 1 , 1 , 1 , 0 ]; [ 1 , 1 , 0 , 0 ] –> [ 1 , 1 , 1 , 1 , 0 ]; [ 1 , 1 , 0 , 1 ] –> [ 1 , 1 , 1 , 1 , 0 ]; [ 1 , 1 , 1 , 0 ] –> [ 1 , 1 , 1 , 1 , 0 ]; [ 1 , 1 , 1 , 1 ] –> [ 1 , 1 , 1 , 1 , 0 ];
end
TMS320C6201 TEB PAL Equations
B-1
Appendix A
TMS320C6201 TEB Schematics
This appendix contains the schematics for the TMS320C6201 TEB.
Appendix B
TM
S320C
6201 TE
B S
chematics
B-2
IC’S U2,U5,U6,U7,U9TEST POINTS TP1SWITCHES S1,S2,S3RESISTORS R4,R97
D.C.B.A.UNUSED REFERENCE DESIGNATORS:4.
C
ECNxxxxx(E) M. DAWKINSC
J. CLARK9–11–97ECN10289(B) M. DAWKINS 9–8–97
FORMAL RELEASE
B
8.BETWEEN REVISIONS OF THE SCHEMATICSPAGE ORDER AND NUMBERING MAY CHANGE
21
CC
201918
CC
WITH REV 2.X OF THE C6201 SILICONTHIS REVISION OF THE BOARD IS COMPATIBLE
TEST POINTS TP24K.
C
17
6–6–97
6–6–97
6–6–97
6–6–97
6–6–97
6–6–97
6–6–97
1–20–97
ECN970401(E) M. DAWKINS 4–3–97 J. CLARKA
7.
6.
2.
MUST CONNECT TO THE GROUND PLANE.ALL FOUR SHIELD CONNECTIONS OF J1 AND J3
OR DOWN(GND) FOR CONTROL OF THESE SIGNALS.APPROPRIATE, MUST NOT BE PULLED UP(VCC3)SHUNTS FOR NMI AND EXT_INT4–EXT_INT7, AS
CAPACITANCE VALUES ARE IN MICROFARADS.
IS TOO LARGE TO SHOW ON A SINGLE SHEET.THIS IS A 352–CONTACT BGA DEVICE THATU1A–U1I COMPRISE A SINGLE TMS320C6201.5.
TANTALUM CAPS CT11
G. CONNELLY
RESISTORS R108SWITCHES S5I.
H.G.F.E.D.C.B.A.
FILTER L1SHUNTS JP3CONNECTORS/HEADERS J12FUSES F5DIODES D1
CERAMIC CAPS C71
IC’S U32J.
M. DAVIS
G. CONNELLY
CC
CCCCCC
CCC
1615
141312111098
765
D600550
J. CLARK
M. JACKSON
J. WHISONANT
R. LERNER
C
4
ENGR–MGR
MFGC CC
321DATE
DATE
DATE
DATE
DATE
DATE
DATE
RLSE
QA
ENGR
CHK
DWN
USED ONNEXT ASSY
APPLICATIONSH
REV
SH
REV
SH
REV
REVISION STATUS OF SHEETS
1.
3.
RESISTANCE VALUES ARE IN OHMS.
HIGHEST REFERENCE DESIGNATOR USED:
NOTES, UNLESS OTHERWISE SPECIFIED: REVISIONS
APPROVEDDATEDESCRIPTIONREV
ofSheetDate:
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TitleHOUSTON, TEXAS
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SEMICONDUCTOR GROUPSOFTWARE DEVELOPMENT SYSTEMS
TEXAS INSTRUMENTS
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A
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B S
chematics
B-3
TM
S320C
6201 TE
B S
chematics
VCC3
CLOCKEXT. ’C6201
CLOCKEXT. JTAG
VCC3
GNDGND
GND
VCC5
GNDVCC3
GND
VCC2
(CP)
(CS)
(RS)
’C6201 CLOCK/CONTROL BLOCK
INUM2
RSV1
NMIINUM0
RSV2
EXT_INT4
INUM3
PD–
PLLFREQ2
EXT_INT7
PLLFREQ3
EXT_INT5
RSV4
EXT_INT6INUM1
RSV0
RESET–
CLKMODE0
RSV3
IACK
PLLFREQ1 CLKOUT1CLKOUT2
CLKMODE1
EMU1
EMU0
20KR108 20KR107 20KR106
A23RSV8
B22RSV7
C21RSV6
C8RSV5
A6RSV4
D3PD
B9RSV3
C11RSV2
G2RSV1
T2RSV0
C12PLLG
D12PLLV
W2TDO
AF20CLKOUT2
AF22CLKOUT1
AA1INUM3
W4INUM2
AA2INUM1
AB1INUM0
Y2IACK
Y1EMU1
W3EMU0
T1TRST
R3TCK
R4TDI
L3TMS
B10PLLFREQ1
A9PLLFREQ3
D11PLLFREQ2
A11PLLF
C6CLKMODE1
C5CLKMODE0
C10CLKIN
U3EXT_INT7
V2EXT_INT6
W1EXT_INT5
U4EXT_INT4
L2NMI
K2RESET
U1A
C6201_CLOCK_CONTROL
1E/D
8OUT
14VDD
7GND
OSC
U3
14
13
12
11
10
9
8
7
6
5
4
3
2
1
HDR 7X2
J2
2GND
3OUT
1IN
ACF153
L1
SMAJ1
SMAJ3
32
1
HDR 3X1
JP2
NO_POPR3
68R2
16R1
+10CT1
.0039C2
.22C3
.01C1
10GND
32Y4
52Y3
72Y2
92Y1
121Y4
141Y3
161Y2
181Y1
20VCC
192OE
11OE
172A4
152A3
132A2
112A1
81A4
61A3
41A2
21A1
74LVTH240
U4
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chematics
B-4
VCC3
GND
’C6201 BOOT CONTROL
BOOTMODE0
BOOTMODE4
BOOTMODE2BOOTMODE3
BOOTMODE1
SWUSER
TOUT0TOUT1
DMAC0DMAC1DMAC2DMAC3
TINP0TINP1
K4TINP0
K24TINP1
E2DMAC0
D1DMAC1
F4DMAC2
D2DMAC3
M4TOUT0
H24TOUT1
C4BOOTMODE0
D5BOOTMODE1
A3BOOTMODE2
B4BOOTMODE3
D8BOOTMODE4
U1B
C6201_BOOT_CONTROL
S4
10KR5
10KR10 10KR9 10KR8 10KR7 R6 10K
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A
TM
S320C
6201 TE
B S
chematics
B-5
TM
S320C
6201 TE
B S
chematics
VCC3VCC3
GND
’C6201 HPIF BLOCK
HD8
HD12
HD0HD1
HD9
HD14
HD0
HD2
HD4
HD6
HD11
HD10HD9
HD7HD8
HD3
HD13
HD12HD11
HD2
HD1
HD3
HD6
HD13HD14
HD5HD5HD4
HD15
HD7
HD10HCNTRL1HCNTRL0HHWILHBE1–HBE0–HR/W–HDS1–
HCS–HDS2–
HAS–
HINT–
HD15
HRDY–
HD[0..15]
C22HAS
B21HD0
B13HD15
B14HD14
C14HD13
B15HD12
D15HD11
B16HD10
A17HD9
B17HD8
D16HD7
B18HD6
A19HD5
C18HD4
B19HD3
C19HD2
B20HD1
F23HCNTRL1
D25HCNTRL0
C26HHWIL
E23HBE1–
D24HBE0–
C23HR/W
D22HDS1
A24HDS2
B23HCS
J24HRDY
H26HINT
U1E
C6201_HPIF
20
19
21
18
22
17
23
16
24
15
25
14
26
13
27
12
28
11
29
10
30
9
31
8
32
7
33
6
34
5
35
4
36
3
37
2
38
1
MICTORJ4
10K
R12
10K
R11
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 214
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-6
’C6201 SERIAL IF
GND
TOUT0
TOUT1
BOOTMODE0BOOTMODE1BOOTMODE2BOOTMODE3BOOTMODE4
TINP1
TINP0
P3FSX0
P4FSR0
R1DX0
J1DR0
L1CLKX0
M2CLKR0
L4CLKS0
F25FSX1
E26FSR1
G23DX1
D26DR1
F26CLKX1
H23CLKR1
E25CLKS1
U1F
C6201_MCSP
20
19
21
18
22
17
23
16
24
15
25
14
26
13
27
12
28
11
29
10
30
9
31
8
32
7
33
6
34
5
35
4
36
3
37
2
38
1
MICTORJ12
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 215
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-7
TM
S320C
6201 TE
B S
chematics
VCC3
’C6201 EBUS BLOCK
CE1–CE0–
CE2–CE3–
SSCLKSDCLK
EA[2..21]
ED[0..31]
HOLDA–
HOLD–
ARE–
LENDIAN
ARDY
SSWE–SSOE–SSADS–SDA10SDWE–SDCAS–SDRAS–
AWE–AOE–
BE3–BE2–BE1–BE0–
ED31ED30ED29ED28ED27ED26ED25ED24ED23ED22ED21ED20ED19ED18ED17ED16 EA21ED15 EA20ED14 EA19ED13 EA18ED12 EA17ED11 EA16ED10 EA15ED9 EA14ED8 EA13ED7 EA12ED6 EA11ED5 EA10ED4 EA9ED3 EA8ED2 EA7ED1 EA6ED0 EA5
EA4EA3EA2
AE20SDCLK
AD17SSCLK
AF24SDRAS AD22SDCAS AF23SDWE
AF21SSOE
AC24AOE AD23AWE
AD21SDA10 AC20SSADS
AD19SSWE
Y24ARE
A7HOLDA
AE22CE3
H3LENDIAN
AB2ED31
AC1ED30
AA4ED29
AD1ED28
AC3ED27
AD4ED26
AF3ED25
AE4ED24
AD5ED23
AF4ED22
AE5ED21
AD6ED20
AE6ED19
AD7ED18
AC8ED17
AF7ED16
AD9ED15
AD10ED14
AF9ED13
AC11ED12
AE10ED11
AE11ED10
AF11ED9
AE14ED8
AF15ED7
AE15ED6
AF16ED5
AC15ED4
AE17ED3
AF18ED2
AF19ED1
AC17ED0
AA25HOLD
W23ARDY
AD26CE2
AB24CE1
AC26CE0
AB25BE3
AA24BE2
Y23BE1
AA26BE0
J26EA21
K25EA20
L24EA19
K26EA18
M26EA17
M25EA16
P25EA15
P24EA14
R25EA13
T26EA12
R23EA11
U26EA10
U25EA9
T23EA8
V26EA7
V25EA6
W26EA5
V24EA4
W25EA3
Y26EA2
U1C
C6201_EMIF
33R37
33R40 33R39 33R38
10KR63 10KR62 10KR61 10KR60 10KR59 10KR58 10KR57 10KR56 10KR55 10KR54 10KR53 10KR52
33R51
33R43
33R50 33R49 33R48 33R47 33R46 33R45 33R44
33R42 33R41
33R36 33R35 33R34 33R33
33R32 33R31 33R30 33R29 33R28 33R27 33R26 33R25 33R24 33R23 33R22 33R21 33R20 33R19 33R18 33R17 33R16 33R15 33R14 33R13
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RevDocument NumberSize
Title
Wednesday, October 29, 1997 216
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-8
GND
GND
VCC3
VCC3
SBSRAM
ED[0..31]
EA[2..21]
SSWE–SSADS–
SSOE–
SSCLKBE3–BE2–BE1–BE0–
CE2–
EA18EA17
ED31ED30ED29ED28ED27ED26ED25ED24ED23ED22ED21ED20ED19ED18ED17ED16ED15ED14EA16ED13EA15ED12EA14ED11EA13ED10EA12ED9EA11ED8EA10ED7EA9ED6EA8ED5EA7ED4EA6ED3EA5ED2EA4ED1EA3ED0EA2
64ZZ
66NC
16NC
43NC
42NC
39NC
38NC 30
DQP4
1DQP3
80DQP2
51DQP1
50A16
49A15
29DQ32
28DQ31
25DQ30
24DQ29
23DQ28
22DQ27
19DQ26
18DQ25
13DQ24
12DQ23
9DQ22
8DQ21
7DQ20
6DQ19
3DQ18
2DQ17
79DQ16
78DQ15
75DQ14
74DQ13
73DQ12
72DQ11
69DQ10
68DQ9
63DQ8
62DQ7
59DQ6
58DQ5
57DQ4
56DQ3
53DQ2
52DQ1
31MODE
88GW#
87BWE#
85ADSC#
84ADSP#
83ADV#
86OE#
97CE2
92CE2#
98CE#
89CLK
96BW4#
95BW3#
94BW2#
93BW1#
48A14
47A13
46A12
45A11
44A10
81A9
82A8
99A7
100A6
32A5
33A4
34A3
35A2
36A1
37A0
GVT71128G36T
U10
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RevDocument NumberSize
Title
Wednesday, October 29, 1997 217
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-9
TM
S320C
6201 TE
B S
chematics
VCC3
VCC3 VCC3
VCC3
VCC3VCC3
VCC3 VCC3
GND GND
GNDGND
SDRAM
SDA10
CE0–
CE0–CE0–
SDCLK
SDCLKSDCLK
SDCLK
EA[2..21]
ED[0..31]
BE2–
SDWE–SDCAS–SDRAS–
BE3–
SDA10
SDWE–SDCAS–SDRAS–
BE1–
SDA10
SDWE–SDCAS–SDRAS–
SDWE–SDCAS–SDRAS–
BE0–
SDA10
CE0–
ED31ED23ED30ED22ED29EA13ED21EA13ED28ED20ED27ED19ED26EA11ED18EA11ED25EA10ED17EA10ED24EA9ED16EA9
EA8EA8EA7EA7EA6EA6EA5EA5EA4EA4EA3EA3EA2EA2
ED15ED7ED14ED6ED13EA13ED5EA13ED12ED4ED11ED3ED10EA11ED2EA11ED9EA10ED1EA10ED8EA9ED0EA9
EA8EA8EA7EA7EA6EA6EA5EA5EA4EA4EA3EA3EA2EA2
42VSSQ
38VSSQ
7VSSQ
3VSSQ
23VSS
44VSS
43DQ7
41DQ6
39DQ5
37DQ4
8DQ3
6DQ2
4DQ1
2DQ0
40VCCQ
36VCCQ
9VCCQ
5VCCQ
22VCC
1VCC
32CLK
31CKE
12W
13CAS
14RAS
15CS
33DQM
16A11
17A10
29A9
28A8
27A7
26A6
25A5
24A4
21A3
20A2
19A1
18A0
TMS626812DGE
U14
42VSSQ
38VSSQ
7VSSQ
3VSSQ
23VSS
44VSS
43DQ7
41DQ6
39DQ5
37DQ4
8DQ3
6DQ2
4DQ1
2DQ0
40VCCQ
36VCCQ
9VCCQ
5VCCQ
22VCC
1VCC
32CLK
31CKE
12W
13CAS
14RAS
15CS
33DQM
16A11
17A10
29A9
28A8
27A7
26A6
25A5
24A4
21A3
20A2
19A1
18A0
TMS626812DGE
U13
42VSSQ
38VSSQ
7VSSQ
3VSSQ
23VSS
44VSS
43DQ7
41DQ6
39DQ5
37DQ4
8DQ3
6DQ2
4DQ1
2DQ0
40VCCQ
36VCCQ
9VCCQ
5VCCQ
22VCC
1VCC
32CLK
31CKE
12W
13CAS
14RAS
15CS
33DQM
16A11
17A10
29A9
28A8
27A7
26A6
25A5
24A4
21A3
20A2
19A1
18A0
TMS626812DGE
U12
42VSSQ
38VSSQ
7VSSQ
3VSSQ
23VSS
44VSS
43DQ7
41DQ6
39DQ5
37DQ4
8DQ3
6DQ2
4DQ1
2DQ0
40VCCQ
36VCCQ
9VCCQ
5VCCQ
22VCC
1VCC
32CLK
31CKE
12W
13CAS
14RAS
15CS
33DQM
16A11
17A10
29A9
28A8
27A7
26A6
25A5
24A4
21A3
20A2
19A1
18A0
TMS626812DGE
U11
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RevDocument NumberSize
Title
Wednesday, October 29, 1997 218
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-10
GND
MEMORY LOGIC
GND
VCC3
CE3–
P_ABOE–
ROMCE–
CE1–
P_DBOE–
EA21 P_CE–P_DIR
SWUSERRESET–
CLKOUT1
AOE–AWE– A_OE–
A_DIR
TPTP5
TP GND
TPTP2 TPTP3 TPTP4 TP TP6
TP TP7 TP TP8
22NC
15NC8
NC
1NC
14GND
27I/O9
26I/O8
25I/O7
24I/O6
23I/O5
21I/O4
20I/O3
19I/O2
18I/O1
17I/O0
28VCC
16I11
13I10
12I9
11I8
10I7
9I6
7I5
6I4
5I3
4I2
3I1
2CLK/I0
PALLV22V10–JC
U8
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 219
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-11
TM
S320C
6201 TE
B S
chematics
VCC3
GND GND
VCC3
DRIVEN EBUS – DATA
A_DIRA_OE–
B_ED[0..31]
ED[0..31]
B_ED4B_ED19
B_ED31
B_ED0
B_ED20
B_ED26
B_ED15
B_ED3
B_ED6B_ED23B_ED7
B_ED8
B_ED10
B_ED14
B_ED16B_ED1
B_ED18
B_ED27B_ED28B_ED29
B_ED17
B_ED9
B_ED11
B_ED2
B_ED13
B_ED5
B_ED12
B_ED30
B_ED21B_ED22
B_ED24B_ED25
ED16
ED14
ED27
ED1ED2
ED15
ED20
ED0
ED3
ED5ED6
ED4
ED7ED8
ED23ED24ED25
ED22
ED26ED9
ED17ED18
ED28ED29
ED10ED11
ED19
ED30ED31
ED12ED13
ED21
45GND
39GND
34GND
28GND
21GND
15GND
10GND
4GND
232B8
222B7
202B6
192B5
172B4
162B3
142B2
132B1
121B8
111B7
91B6
81B5
61B4
51B3
31B2
21B1
262A8
272A7
292A6
302A5
322A4
332A3
352A2
362A1
371A8
381A7
401A6
411A5
431A4
441A3
461A2
471A1
242DIR
252OE
11DIR
481OE
42VCC
31VCC
18VCC
7VCC
U16
SN74ALVCH16245
45GND
39GND
34GND
28GND
21GND
15GND
10GND
4GND
232B8
222B7
202B6
192B5
172B4
162B3
142B2
132B1
121B8
111B7
91B6
81B5
61B4
51B3
31B2
21B1
262A8
272A7
292A6
302A5
322A4
332A3
352A2
362A1
371A8
381A7
401A6
411A5
431A4
441A3
461A2
471A1
242DIR
252OE
11DIR
481OE
42VCC
31VCC
18VCC
7VCC
U15
SN74ALVCH16245
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 2110
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-12
VCC3
GND
VCC3
GND GNDGND
DRIVEN EBUS – ADDR
B_DMAC3B_DMAC2B_DMAC1B_DMAC0
DMAC3DMAC2DMAC1DMAC0
B_CE3–B_CE2–B_CE1–B_CE0–
CE3–
CE0–CE1–CE2–
B_EA[2..21]
EA[2..21]
B_BE3–B_BE2–B_BE1–B_BE0–
BE3–BE2–BE1–BE0–
B_EA17EA17
B_EA19B_EA18
EA19EA18
B_EA21EA21B_EA20EA20
B_EA16EA16B_EA15EA15B_EA14EA14B_EA13EA13B_EA12EA12B_EA11EA11B_EA10EA10B_EA9EA9B_EA8EA8B_EA7EA7B_EA6EA6B_EA5EA5B_EA4EA4B_EA3EA3B_EA2EA2
45GND
39GND
10GND
4GND
34GND
28GND
21GND
15GND
244OE
253OE
482OE
11OE
234Y4
224Y3
204Y2
194Y1
173Y4
163Y3
143Y2
133Y1
122Y4
112Y3
92Y2
82Y1
61Y4
51Y3
31Y2
21Y1
264A4
274A3
294A2
304A1
323A4
333A3
353A2
363A1
372A4
382A3
402A2
412A1
431A4
441A3
461A2
471A1
42VCC
31VCC
18VCC
7VCC
U18
SN74ALVCH16244
45GND
39GND
10GND
4GND
34GND
28GND
21GND
15GND
244OE
253OE
482OE
11OE
234Y4
224Y3
204Y2
194Y1
173Y4
163Y3
143Y2
133Y1
122Y4
112Y3
92Y2
82Y1
61Y4
51Y3
31Y2
21Y1
264A4
274A3
294A2
304A1
323A4
333A3
353A2
363A1
372A4
382A3
402A2
412A1
431A4
441A3
461A2
471A1
42VCC
31VCC
18VCC
7VCC
U17
SN74ALVCH16244
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 2111
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-13
TM
S320C
6201 TE
B S
chematics
VCC3
DRIVEN CONTROL
VCC3
GND GND
B_HOLDA–HOLDA–
SDCLKB_CLKOUT2
B_ARE–
B_SSWE–
B_CLKOUT1
B_SDCLK
AWE–
B_SSOE–
ARE–
SDWE–
CLKOUT2
B_SDWE–
B_AWE–
SSOE–
B_SSADS–SDA10 B_SDA10
CLKOUT1
SDRAS–
SSADS–
AOE– B_AOE–
B_SDRAS–B_SDCAS–SDCAS–
SSWE–
SSCLK B_SSCLK
10KR105
45GND
39GND
10GND
4GND
34GND
28GND
21GND
15GND
244OE
253OE
482OE
11OE
234Y4
224Y3
204Y2
194Y1
173Y4
163Y3
143Y2
133Y1
122Y4
112Y3
92Y2
82Y1
61Y4
51Y3
31Y2
21Y1
264A4
274A3
294A2
304A1
323A4
333A3
353A2
363A1
372A4
382A3
402A2
412A1
431A4
441A3
461A2
471A1
42VCC
31VCC
18VCC
7VCC
U19
SN74ALVCH16244
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 2112
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-14
GND
GND
GND GND GNDVCC3
SHUNTS & OBSERVATION CONNECTORS
P_CE–ROMCE–
A_DIR
B_ARE–
B_CLKOUT1
HOLD–B_HOLDA–
B_CLKOUT2
B_DMAC3B_DMAC2B_DMAC1B_DMAC0
TINP1TINP0
B_EA[2..21]
B_CLKOUT1
PD–B_SSCLK
B_CE3– CE3–
CE2–CE1–CE0–
RSV4
B_SDCLK
B_ED[0..31]
AOE–
EMU1
HOLD–
ARDYB_BE3–B_BE2–B_BE1–B_BE0–
B_SSOE–B_SSWE–
B_SSADS–B_SDA10
B_SDWE–B_SDCAS–B_SDRAS–B_AWE–B_AOE–B_CE2–B_CE1–B_CE0–
RESET–
NMI
INUM3INUM2INUM1INUM0
IACK
ARDYLENDIAN
EMU0
RSV3
RSV0RSV1RSV2
CLKMODE1CLKMODE0
PLLFREQ2PLLFREQ1
PLLFREQ3
EXT_INT7EXT_INT6EXT_INT5EXT_INT4
B_EA17B_EA16B_EA15B_EA14B_EA13B_EA12B_EA11B_EA10B_EA9B_EA8B_EA7B_EA6B_EA5B_EA4B_EA3B_EA2
B_EA21
B_EA19B_EA18
B_EA20
B_ED31B_ED15B_ED30B_ED14B_ED29B_ED13B_ED28B_ED12B_ED27B_ED11B_ED26B_ED10B_ED25B_ED9B_ED24B_ED8B_ED23B_ED7B_ED22B_ED6B_ED21B_ED5B_ED20B_ED4B_ED19B_ED3B_ED18B_ED2B_ED17B_ED1B_ED16B_ED0
20KR89
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JP3C
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JP3B
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JP3A
20
19
21
18
22
17
23
16
24
15
25
14
26
13
27
12
28
11
29
10
30
9
31
8
32
7
33
6
34
5
35
4
36
3
37
2
38
1
MICTORJ5
20
19
21
18
22
17
23
16
24
15
25
14
26
13
27
12
28
11
29
10
30
9
31
8
32
7
33
6
34
5
35
4
36
3
37
2
38
1
MICTORJ6
20
19
21
18
22
17
23
16
24
15
25
14
26
13
27
12
28
11
29
10
30
9
31
8
32
7
33
6
34
5
35
4
36
3
37
2
38
1
MICTORJ7
20KR88
20KR78
10KR87 10KR86 NO_POPR85 NO_POPR84 10KR83 10KR82 10KR81 4.7KR80 4.7KR79
20KR77 20KR76 20KR75 20KR74 10KR73 10KR72 10KR71 10KR70 10KR69 10KR68 10KR67 10KR66 10KR65 10KR64
TP TP11
TP TP10
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 2113
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-15
TM
S320C
6201 TE
B S
chematics
VCC3 VCC3
GNDGND
ASRAM
B_AOE–B_AWE–
B_CE3–
B_ED[0..31]
B_EA[2..21]
B_BE3–B_BE2–
B_AOE–B_AWE–B_BE1–B_BE0–B_CE3–
B_ED31B_ED15B_ED30B_ED14B_ED29B_ED13B_ED28B_EA17B_ED12B_EA17B_ED27B_EA16B_ED11B_EA16B_ED26B_EA15B_ED10B_EA15B_ED25B_EA14B_ED9B_EA14B_ED24B_EA13B_ED8B_EA13B_ED23B_EA12B_ED7B_EA12B_ED22B_EA11B_ED6B_EA11B_ED21B_EA10B_ED5B_EA10B_ED20B_EA9B_ED4B_EA9B_ED19B_EA8B_ED3B_EA8B_ED18B_EA7B_ED2B_EA7B_ED17B_EA6B_ED1B_EA6B_ED16B_EA5B_ED0B_EA5
B_EA4B_EA4B_EA3B_EA3B_EA2B_EA2
12GND
34GND
38I/O16
37I/O15
36I/O14
35I/O13
32I/O12
31I/O11
30I/O10
29I/O9
16I/O8
15I/O7
14I/O6
13I/O5
10I/O4
9I/O3
8I/O2
7I/O1
33VDD
11VDD
28NU
41OE
17WE
40UB
39LB
6CE
18A15
19A14
20A13
21A12
24A11
25A10
26A9
27A8
42A7
43A6
44A5
1A4
2A3
3A2
4A1
5A0
TC55V1664AJ
U21
12GND
34GND
38I/O16
37I/O15
36I/O14
35I/O13
32I/O12
31I/O11
30I/O10
29I/O9
16I/O8
15I/O7
14I/O6
13I/O5
10I/O4
9I/O3
8I/O2
7I/O1
33VDD
11VDD
28NU
41OE
17WE
40UB
39LB
6CE
18A15
19A14
20A13
21A12
24A11
25A10
26A9
27A8
42A7
43A6
44A5
1A4
2A3
3A2
4A1
5A0
TC55V1664AJ
U20
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 2114
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-16
GND
GNDGND
GND
VCC3
VCC3VCC3
VCC3VCC3
FLASH ROM
B_AOE–
B_AOE–B_AOE–
ROM_WE–
ROMCE–
ROM_WE–
ROMCE–ROM_WE–
ROMCE–
ROM_WE–
B_ED[0..31]
B_EA[2..21]
B_AWE–
ROM_WE–B_AOE–
ROMCE–
B_EA16B_EA15B_EA16B_EA14B_EA15B_EA13B_EA14
B_ED31B_EA12B_EA13B_ED30B_EA11B_ED23B_EA12B_ED29B_EA10B_ED22B_EA11B_ED28B_EA9B_ED21B_EA10B_ED27B_EA8B_ED20B_EA9B_ED26B_EA7B_ED19B_EA8B_ED25B_EA6B_ED18B_EA7B_ED24B_EA5B_ED17B_EA6
B_EA4B_ED16B_EA5B_EA3B_EA4B_EA2B_EA3
B_EA2
B_EA16B_EA15B_EA16B_EA14B_EA15B_EA13B_EA14
B_ED15B_EA12B_EA13B_ED14B_EA11B_ED7B_EA12B_ED13B_EA10B_ED6B_EA11B_ED12B_EA9B_ED5B_EA10B_ED11B_EA8B_ED4B_EA9B_ED10B_EA7B_ED3B_EA8B_ED9B_EA6B_ED2B_EA7B_ED8B_EA5B_ED1B_EA6
B_EA4B_ED0B_EA5B_EA3B_EA4B_EA2B_EA3
B_EA2
32
1
HDR 3X1
JP1
16GND
22I/O7
21I/O6
20I/O5
19I/O4
18I/O3
15I/O2
14I/O1
13I/O0
32VCC
2WE
25OE
23CE
31A14
30A13
3A12
27A11
24A10
28A9
29A8
4A7
5A6
6A5
7A4
8A3
9A2
10A1
11A0
AT29LV256–JC
U25
16GND
22I/O7
21I/O6
20I/O5
19I/O4
18I/O3
15I/O2
14I/O1
13I/O0
32VCC
2WE
25OE
23CE
31A14
30A13
3A12
27A11
24A10
28A9
29A8
4A7
5A6
6A5
7A4
8A3
9A2
10A1
11A0
AT29LV256–JC
U24
16GND
22I/O7
21I/O6
20I/O5
19I/O4
18I/O3
15I/O2
14I/O1
13I/O0
32VCC
2WE
25OE
23CE
31A14
30A13
3A12
27A11
24A10
28A9
29A8
4A7
5A6
6A5
7A4
8A3
9A2
10A1
11A0
AT29LV256–JC
U23
16GND
22I/O7
21I/O6
20I/O5
19I/O4
18I/O3
15I/O2
14I/O1
13I/O0
32VCC
2WE
25OE
23CE
31A14
30A13
3A12
27A11
24A10
28A9
29A8
4A7
5A6
6A5
7A4
8A3
9A2
10A1
11A0
AT29LV256–JC
U22
10KR90
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 2115
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-17
TM
S320C
6201 TE
B S
chematics
PROTOTYPE AREA DRIVEN EBUS – DATA
VCC3
GND GND
VCC3
B_ED[0..31]
PB_ED[0..31]
P_DIRP_DBOE–
B_ED20
B_ED22
B_ED27
B_ED9B_ED10
B_ED7
B_ED3 B_ED19
B_ED23
B_ED18B_ED1
B_ED25
B_ED29B_ED13
B_ED15
B_ED4
B_ED26
B_ED14
B_ED12
B_ED0
B_ED11
B_ED17
B_ED8
B_ED21B_ED5
B_ED24
B_ED30
B_ED28
B_ED2
B_ED31
B_ED6
B_ED16
PB_ED4PB_ED19
PB_ED31
PB_ED0
PB_ED20
PB_ED26
PB_ED15
PB_ED3
PB_ED6PB_ED23PB_ED7
PB_ED8
PB_ED10
PB_ED14
PB_ED16PB_ED1
PB_ED18
PB_ED27PB_ED28PB_ED29
PB_ED17
PB_ED9
PB_ED11
PB_ED2
PB_ED13
PB_ED5
PB_ED12
PB_ED30
PB_ED21PB_ED22
PB_ED24PB_ED25
45GND
39GND
34GND
28GND
21GND
15GND
10GND
4GND
232B8
222B7
202B6
192B5
172B4
162B3
142B2
132B1
121B8
111B7
91B6
81B5
61B4
51B3
31B2
21B1
262A8
272A7
292A6
302A5
322A4
332A3
352A2
362A1
371A8
381A7
401A6
411A5
431A4
441A3
461A2
471A1
242DIR
252OE
11DIR
481OE
42VCC
31VCC
18VCC
7VCC
U29
SN74ALVTH16245
45GND
39GND
34GND
28GND
21GND
15GND
10GND
4GND
232B8
222B7
202B6
192B5
172B4
162B3
142B2
132B1
121B8
111B7
91B6
81B5
61B4
51B3
31B2
21B1
262A8
272A7
292A6
302A5
322A4
332A3
352A2
362A1
371A8
381A7
401A6
411A5
431A4
441A3
461A2
471A1
242DIR
252OE
11DIR
481OE
42VCC
31VCC
18VCC
7VCC
U28
SN74ALVTH16245
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 2116
A
Texas Instruments
TMS302C6201 TEST AND EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-18
PROTOTYPE AREA DRIVEN EBUS – ADDR/CTRL
PAL BPAL A
VCC3
GND
VCC3
VCC3
GND
VCC3 VCC3
GNDGND
P_ABOE–
PB_ARE–B_ARE–
PB_EA[2..20]
PB_BE3–PB_BE2–PB_BE1–PB_BE0–
B_AOE–B_AWE–
PB_AOE–PB_AWE–
B_EA[2..21]
B_BE3–B_BE2–B_BE1–B_BE0–
PB_EA17B_EA17
PB_EA19PB_EA18
B_EA19B_EA18
PB_EA20B_EA20
PB_EA16B_EA16PB_EA15B_EA15PB_EA14B_EA14PB_EA13B_EA13PB_EA12B_EA12PB_EA11B_EA11PB_EA10B_EA10PB_EA9B_EA9PB_EA8B_EA8PB_EA7B_EA7PB_EA6B_EA6PB_EA5B_EA5PB_EA4B_EA4PB_EA3B_EA3PB_EA2B_EA2
22NC
15NC8
NC
1NC
14GND
27I/O9
26I/O8
25I/O7
24I/O6
23I/O5
21I/O4
20I/O3
19I/O2
18I/O1
17I/O0
28VCC
16I11
13I10
12I9
11I8
10I7
9I6
7I5
6I4
5I3
4I2
3I1
2CLK/I0
PALLV22V10–JC
U27
TPI11B
TPI10B
TPI9B
TPI8B
TPI7B
TPI6B
TPI5B
TPI4B
TPI3B
TPI2B
TPI1B
TPCLK/I0B
TP IO9B
TP IO8B
TP IO7B
TP IO6B
TP IO5B
TP IO4B
TP IO3B
TP IO2B
TP IO1B
TP IO0B
10KR96 10KR95 10KR94 10KR93 10KR92 10KR91
22NC
15NC8
NC
1NC
14GND
27I/O9
26I/O8
25I/O7
24I/O6
23I/O5
21I/O4
20I/O3
19I/O2
18I/O1
17I/O0
28VCC
16I11
13I10
12I9
11I8
10I7
9I6
7I5
6I4
5I3
4I2
3I1
2CLK/I0
PALLV22V10–JC
U26
TPI11A
TPI10A
TPI9A
TPI8A
TPI7A
TPI6A
TPI5A
TPI4A
TPI3A
TPI2A
TPI1A
TPCLK/I0A
TP IO9A
TP IO8A
TP IO7A
TP IO6A
TP IO5A
TP IO4A
TP IO3A
TP IO2A
TP IO1A
TP IO0A
45GND
39GND
10GND
4GND
34GND
28GND
21GND
15GND
244OE
253OE
482OE
11OE
234Y4
224Y3
204Y2
194Y1
173Y4
163Y3
143Y2
133Y1
122Y4
112Y3
92Y2
82Y1
61Y4
51Y3
31Y2
21Y1
264A4
274A3
294A2
304A1
323A4
333A3
353A2
363A1
372A4
382A3
402A2
412A1
431A4
441A3
461A2
471A1
42VCC
31VCC
18VCC
7VCC
U31
SN74ALVTH16244
45GND
39GND
10GND
4GND
34GND
28GND
21GND
15GND
244OE
253OE
482OE
11OE
234Y4
224Y3
204Y2
194Y1
173Y4
163Y3
143Y2
133Y1
122Y4
112Y3
92Y2
82Y1
61Y4
51Y3
31Y2
21Y1
264A4
274A3
294A2
304A1
323A4
333A3
353A2
363A1
372A4
382A3
402A2
412A1
431A4
441A3
461A2
471A1
42VCC
31VCC
18VCC
7VCC
U30
SN74ALVTH16244
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 2117
A
TEXAS INSTRUMENTS
TMS320C6201 TEST AND EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-19
TM
S320C
6201 TE
B S
chematics
P_VCC5P_VCC3
GND
PROTOTYPE AREA – CONNECTORS
GND
GND
EXT_INT4
EXT_INT7EXT_INT6EXT_INT5
NMI
PB_EA[2..20]
P_CE–
B_CLKOUT1
B_HOLDA–HOLD–
ARDYPB_ARE–
PB_BE3–PB_BE2–PB_BE1–PB_BE0–
PB_AOE–PB_AWE–
PB_ED[0..31]
B_HOLDA–HOLD–PB_ARE–ARDYP_CE–PB_AOE–PB_AWE–PB_BE3–PB_BE2–PB_BE1–PB_BE0–
PB_EA18PB_EA19PB_EA20
PB_EA17PB_EA16PB_EA15PB_EA14PB_EA13PB_EA12PB_EA11PB_EA10PB_EA9PB_EA8PB_EA7PB_EA6PB_EA5PB_EA4PB_EA3PB_EA2
PB_ED24
PB_ED28
PB_ED20
PB_ED17
PB_ED27
PB_ED9PB_ED8
PB_ED21
PB_ED10
PB_ED28
PB_ED19
PB_ED29
PB_ED31
PB_ED2
PB_ED15
PB_ED11
PB_ED3
PB_ED14 PB_ED30
PB_ED21PB_ED5PB_ED4
PB_ED17
PB_ED27
PB_ED6
PB_ED26
PB_ED15
PB_ED16
PB_ED12
PB_ED22
PB_ED18
PB_ED25
PB_ED1
PB_ED7PB_ED24
PB_ED19
PB_ED23
PB_ED0
PB_ED18
PB_ED30
PB_ED23PB_ED22
PB_ED25
PB_ED31
PB_ED20
PB_ED29
PB_ED26
PB_ED13
PB_ED16
PB_EA5PB_EA4
PB_EA11PB_EA10
PB_EA12
PB_EA17
PB_EA2
PB_EA7
PB_EA9
PB_EA3
PB_EA8
PB_EA6
PB_EA15PB_EA14
PB_EA16
PB_EA13
B_CLKOUT1PB_EA20PB_EA19PB_EA18
PB_ED9PB_ED10
PB_ED8
PB_ED2
PB_ED11
PB_ED3
PB_ED14
PB_ED4PB_ED5PB_ED6
PB_ED12
PB_ED1
PB_ED7
PB_ED0
PB_ED13
TP P_GND
TP P_VCC3
TP P_VCC5
20
19
21
18
22
17
23
16
24
15
25
14
26
13
27
12
28
11
29
10
30
9
31
8
32
7
33
6
34
5
35
4
36
3
37
2
38
1
MICTOR
J9
20
19
21
18
22
17
23
16
24
15
25
14
26
13
27
12
28
11
29
10
30
9
31
8
32
7
33
6
34
5
35
4
36
3
37
2
38
1
MICTOR
J8
TP TP12
TPEXT_INT7
TPEXT_INT6
TPEXT_INT5
TPEXT_INT4
TPNMI
TP PB_EA19
TP PB_EA18
TP PB_EA20
TPPB_EA17
TPPB_EA16
TPPB_EA15
TPPB_EA14
TPPB_EA13
TPPB_EA12
TPPB_EA11
TPPB_EA10
TPPB_EA9
TPPB_EA8
TPPB_EA7
TPPB_EA6
TPPB_EA5
TPPB_EA4
TPPB_EA3
TPPB_EA2
TP PB_AWE–
TP B_HOLDA–
TP PB_BE1–
TP PB_ARE–
TP B_CLKOUT1
TP P_CE–
TP PB_BE2–
TP PB_BE0–
TP HOLD–
TP ARDY
TP PB_AOE–
TP PB_BE3–
TP PB_ED24
TPPB_ED15
TPPB_ED14
TPPB_ED13
TPPB_ED12
TPPB_ED11
TPPB_ED10
TPPB_ED9
TPPB_ED8
TPPB_ED7
TPPB_ED6
TPPB_ED5
TPPB_ED4
TPPB_ED3
TPPB_ED2
TPPB_ED1
TPPB_ED0
TP PB_ED31
TP PB_ED30
TP PB_ED29
TP PB_ED28
TP PB_ED27
TP PB_ED26
TP PB_ED25
TP PB_ED23
TP PB_ED22
TP PB_ED21
TP PB_ED20
TP PB_ED19
TP PB_ED18
TP PB_ED17
TP PB_ED16
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 2118
A
TEXAS INSTRUMENTS
TMS320C6201 TEST AND EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-20
GNDPOWER SUPPLYLOAD FOR 5 VOLT
VCC3
GND
GND
VCC5
43
21
P_VCC3 P_VCC5
FUSED PROTOTYPE POWER
POWER_ON
GND
GND
VCC3
GND
GND
GND
VCC2
VCC2
VCC3
VCC5
VCC5
FUSED MAIN POWER
’C6201 POWER & GND BLOCKS
RESET–
LEDD1
AC18CVDD
AC13CVDD
AC9CVDD
V4CVDD
N4CVDD
J4CVDD
V23CVDD
P23CVDD
J23CVDD
D18CVDD
D14CVDD
D9CVDD
AE25CVDD
AD24CVDD
AC23CVDD
B25CVDD
C24CVDD
D23CVDD
AC4CVDD
C1DVDD
AD3CVDD
F3DVDD
M3DVDD
AE2CVDD
N3DVDD
Y4DVDD
D4CVDD
AB3DVDD
AB4DVDD
C3CVDD AC6
DVDD
AF5DVDD
B2CVDD
AF6DVDD
E1CVDD
AC10DVDD
H4CVDD
AD11DVDD
F1CVDD
AD13DVDD
K1CVDD
AD15DVDD
M1CVDD
AF17DVDD
P2CVDD
AE18DVDD
U1CVDD
AD18DVDD
T3CVDD
AC19DVDD
T4CVDD
AE21DVDD
AD8CVDD
AC21DVDD
AE8CVDD
AC22DVDD
AC12CVDD
AC25DVDD
AE12CVDD
AB26DVDD
AF12CVDD
W24DVDD
AD14CVDD
U24DVDD
N25CVDD
T24DVDD
M24CVDD
R26DVDD
K23CVDD
N23DVDD
D20CVDD
L25DVDD
C20CVDD
J25DVDD
A20CVDD
H25DVDD
A16CVDD
G25DVDD
C15CVDD
G24DVDD
A12CVDD
A22DVDD
B12CVDD
A21DVDD
B11CVDD
D17DVDD
D6CVDD
A18DVDD
A5CVDD
A15DVDDB6
CVDD
A10DVDD
D7CVDD
B7DVDD
U1H
C6201_POWER
B8NC
A8NC
C9NC
D10NC
D21NC
R2NC
E4NC
G1NC
H2NC
H1NC
J2NC
K3NC
U1G
C6201_NC
P26VSS
N26VSS
P1VSS
N1VSS
AF14VSS
AF13VSS
A14VSS
A13VSS
AD25VSS
AE26VSS
AE24VSS
AF26VSS
AF25VSS
B24VSS
C25VSS
B26VSS
A26VSS
A25VSS
AE3VSS
AF2VSS
AD2VSS
AF1VSS
AE1VSS
B3VSS
C2VSS
A2VSS
B1VSS
A1VSS
E3VSS
G4VSS
F2VSS
G3VSS
J3VSS
N2VSS
U2VSS
V1VSS
V3VSS
Y3VSS
AA3VSS
AC2VSS
AC5VSS
AC7VSS
AE7VSS
AF8VSS
AE9VSS
AF10VSS
AD12VSS
AE13VSS
AC14VSS
AE16VSS
AD16VSS
AC16VSS
AE19VSS
AD20VSS
AE23VSS
AB23VSS
AA23VSS
Y25VSS
U23VSS
T25VSS
R24VSS
N24VSS
L26VSS
M23VSS
L23VSS
G26VSS
F24VSS
E24VSS
D19VSS
C17VSS
C16VSS
C13VSS
D13VSS
C7VSS
B5VSS
A4VSS
U1D
C6201_GROUND
TP TP24
TP TP23
TP TP22
TP TP21
TP TP20
TP TP19
TPTP18 TPTP17 TPTP16 TPTP15 TPTP14 TPTP13
30 R104 30 R103 30 R102 30 R101
2
1
NO POP
J11
S5
55.0V
32.5V
13.3V
6GND
4GND
2GND
POWER
J10
8RESET 5
PFO
7RESET
3GND
1MR
4PFI
2VCC
ADM708TAR
U32
1.5AF5 0.5AF4
4.0AF1
0.25AF3 7.0AF2
20KR98
10KR99
1KR100
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 2119
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-21
TM
S320C
6201 TE
B S
chematics
’C6201 THERMAL BALLS
GNDGND
V18THB
V17THB
V16THB
V15THB
V14THB
V13THB
V12THB
V11THB
V10THB
V9THB
U18THB
U17THB
U16THB
U15THB
U14THB
U13THB
U12THB
U11THB
U10THB
U9THB
T18THB
T17THB
T16THB
T15THB
T14THB
T13THB
T12THB
T11THB
T10THB
T9THB
R18THB
R17THB
R16THB
R15THB
R14THB
R13THB
R12THB
R11THB
R10THB
R9THB
P18THB
P17THB
P16THB
P15THB
P14THB
P13THB
P12THB
P11THB
P10THB
P9THB
N18THB
N17THB
N16THB
N15THB
N14THB
N13THB
N12THB
N11THB
N10THB
N9THB
M18THB
M17THB
M16THB
M15THB
M14THB
M13THB
M12THB
M11THB
M10THB
M9THB
L18THB
L17THB
L16THB
L15THB
L14THB
L13THB
L12THB
L11THB
L10THB
L9THB
K18THB
K17THB
K16THB
K15THB
K14THB
K13THB
K12THB
K11THB
K10THB
K9THB
J18THB
J17THB
J16THB
J15THB
J14THB
J13THB
J12THB
J11THB
J10THB
J9THB
C6201_THERMAL_BALLS
U1I
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 2120
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
TM
S320C
6201 TE
B S
chematics
B-22
GND
GNDGND
GND
GND GND GND
VCC3
VCC3VCC5
VCC2
VCC2
VCC2
VCC3
DECOUPLING
+NO_POPCT11+
NO_POPCT10
+22CT9+
22CT8+
22CT7+
22CT6+
22CT5+
22CT4
+4.7CT3+
4.7CT2
.1
C66
.1
C65
.1
C64
.1
C63
.1
C62
.1
C71
.1
C70
.1
C69
.1
C68
.1
C67
.1
C53
.1
C52
.1
C51
.1
C50
.1
C49
.1
C61
.1
C60
.1
C59
.1
C58
.1
C57
.1
C56
.1
C55
.1
C54
.1
C38
.1
C37
.1
C36
.1
C35
.1
C34
.1
C48
.1
C47
.1
C46
.1
C45
.1
C44
.1
C43
.1
C42
.1
C41
.1
C40
.1
C39
.1
C23
.1
C22
.1
C21
.1
C20
.1
C19
.1
C33
.1
C32
.1
C31
.1
C30
.1
C29
.1
C28
.1
C27
.1
C26
.1
C25
.1
C24
.1
C8
.1
C7
.1
C6
.1
C5
.1
C4
.1
C18
.1
C17
.1
C16
.1
C15
.1
C14
.1
C13
.1
C12
.1
C11
.1
C10
.1
C9
ofSheetDate:
RevDocument NumberSize
Title
Wednesday, October 29, 1997 2121
A
TEXAS INSTRUMENTS
TMS320C6201 TEST & EVALUATION BOARD
CD600552
11
22
33
44
E
E
D
D
C
C
B
B
A
A
Index
Index-1
Index
AASRAM 1-2, 1-4, 3-4
assistance from Texas Instruments vii
attachingAC cord to power supply 2-7emulator to TEB 2-9power supply to TEB 2-8
Bboot process 2-2, 2-6
BOOTMODE0–BOOTMODE4 DIP switches 1-4,2-6, 3-8
Ccautions iv, 2-7, 3-3, 3-6
changing default settings 2-4
CLKIN signal 3-3
clock 3-3
connectingAC cord to power supply 2-7emulator to TEB 2-9power supply to TEB 2-8
connectionsemulation port 3-5host port header 3-5required 1-1serial ports and timers access header 3-5
connectivity 1-4
conventions, notational iii
custom power supply 2-4, 3-2
Ddata bus 1-3
DC outlet 3-2
debugger 1-1
defaultschanging 2-4DIP switch 2-6oscillator 3-3shunt jumper 2-5
design prototyping 1-1
dimensions, TEB 2-2
DIP switchesBOOTMODE0–BOOTMODE4 1-4, 2-6, 3-8changing default settings 2-4default settings 2-2, 2-6descriptions 3-8on the TEB layout diagram 2-3SWUSER 2-6
disconnecting the TEB 2-10
documentationabout this manual iiihow to use this manual iiirelated iv to v
DSP, features 1-1
Eemulation signals 3-5
emulator 1-1, 2-2
emulator connector 1-2, 2-3, 3-5
external ’C6201 clock 2-3
external emulator (TCLK) clock 2-3
external memories 3-4
Index
Index-2
FFCC warning vi
flash memory 1-2, 2-5, 3-7
fuse ratings 3-2
Ggeneration
clock 3-3interrupt 3-4reset 3-3
ground connections 3-6
Hheaders 1-3
See also individual header names
host access port 1-1
host port headerdescription 1-3, 3-5in connectivity diagram 1-4on the TEB layout diagram 2-3size 1-2
host requirements 2-4
Iinformation about cautions iv
installationconnecting AC cord to power supply 2-7connecting emulator to TEB 2-9connecting power supply to TEB 2-8TEB 2-7 to 2-10
instruction cycle time 1-2, 2-2
interrupt generation 3-4
JJTAG connector 1-1
Kkit components 2-4
Llayout, TEB 2-3LEDs 2-10, 3-2
Mmanual reset 3-4memory
connectivity 1-4types 3-4
memory map 1 2-2, 2-6multiply-by-four mode 2-2, 3-3
Nnon-TEB circuitry 3-4notational conventions iii
Ooperation, TEB 3-1 to 3-8oscillator 2-3, 3-3
PPAL equations A-1 to A-4PEROM 1-2, 1-4, 2-2, 2-6PLL 2-2, 3-3power connector 2-3power requirements 3-2power supply 2-4, 3-2programmable devices 3-6prototyping area 1-2, 3-6
Rreconfiguring
on-board devices 3-7shunt jumpers 3-4
related documentation iv to vrequirements
host 2-4power 3-2
reset line 3-3reset switch 2-3resetting the ’C6201 DSP 3-3, 3-4ROM 3-4
Index
Index-3
SSBSRAM 1-2, 1-4, 3-4
scan-based emulation 1-1
schematics B-1 to B-14
SDRAM 1-2, 1-4, 3-4
serial ports and timers access headerdescription 1-3, 3-5in connectivity diagram 1-4on the TEB layout diagram 2-3
shunt jumperschanging default settings 2-4, 3-7default settings 2-5descriptions 3-7 to 3-8on the TEB layout diagram 2-3reconfiguring 3-4
SMA connector 3-3, 3-5
specifications, TEB 2-2
SWUSER DIP switch 2-6
TTCK signal 3-5
TCLK signal 2-2, 2-5
TEBcomponents 3-1connectivity diagram 1-4disconnecting 2-10functional overview 1-3 to 1-4fuse ratings 3-2headers 1-3 to 1-4installation 2-7 to 2-10interconnects 1-3 to 1-4key features 1-2kit components 2-4layout 2-3LEDs 2-10, 3-2memory 1-2, 3-4operation 3-1 to 3-8purpose iii, 1-1required connections 1-1schematics B-1 to B-14specifications 2-2
test points 3-6
Wwarning, FCC vi
XXDS510 1-1, 2-4, 3-5XDS510WS 1-1, 2-4, 3-5