TLI4970 Programming Guide - Infineon Technologies

Application Note 1 Revision 1.3www.infineon.com/sensors 2017-09-18

TLI4970 Programming GuideMini ature coreless magnetic current sensor for AC and DC measurements wi th digi tal interface and fast overcurrent detecti on

About this document

Scope and purposeThis document covers the “How to communicate/program” the TLI4970 current sensor. It also gives an overviewof how to establish an SPI communication, an overview about the Serial Inspection and ConfigurationInterface (SICI) and describes the available user settings which may be adopted via EEPROM.

Intended audienceThis manual is written for experienced hardware and software engineers when considering integrating theTLI4970 into their system.

Communication

Application Note 2 Revision 1.3 2017-09-18

TLI4970 Programming GuideCommunication

About this document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.2 Package and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 Basic application connectivity (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.1 Protocol description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.2 Functional interface description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.3 Interface summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62.4 SPI dataframe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62.4.1 Sensor current value transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62.4.2 Sensor status transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72.5 Communication timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82.6 Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3 Serial Inspection and Configuration Interface (SICI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.1 Communication timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.2 14-bit current readout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.3 Programming example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.4 Available commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.5 Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4 EEPROM user settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164.1 EEPROM map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Table of contents



Introduction

1 IntroductionThe goal of this application note is to give a guideline “How to communicate/program” the TLI4970 currentsensor.

1.1 Block diagramFigure 1 shows a simplified block diagram of the TLI4970:

Figure 1 Block diagram

The device can be accessed by using a three-wire SPI interface explained in Chapter 2, or a one-wire PWMinterface described in Chapter 3.

DIFF.HALL ADC

ADCT

SMUX

IP-

IP+ VDDGND

DSP

EEPROM

Supply, Biasing,Reset, Oscillator ,

Bandgap

Digital

IF DOUT

SCLK

FOCcompensation

Fast OverCurrent detection

DAC

galvanic separation

CS



Introduction

1.2 Package and pin configurationThe package and pinout are as can be seen in Figure 2:

Figure 2 Pin configuration PG-TISON-8

Table 1 Pin definition and functionPin No. Name Pin Type Function1 GND GND Ground2 VDD VDD Supply voltage3 DOUT O SPI data out4 SCLK I Serial clock input5 CS I Chip select input (Low-Active)6 FOC I/O Fast overcurrent detection output (open drain output)1)

1) Generally used as output, can be used as input for SICI communication. For further detail see Chapter 3

7 IP+ I Positive current terminal pin (current-in)8 IP- O Negative current terminal pin (current-out)

7

8

1

2345

6



Basic application connectivity (SPI)

2 Basic application connectivity (SPI)This chapter gives an overview of how to establish an SPI communication.All SPI frames have a 16-bit length. A parity bit in each SPI frame allows the detection of transmission errorsand increases the reliability of the measured data. The transmission of the data is triggered by the CS-pin.

2.1 Protocol descriptionThe internal data register is continuously updated with the internal update rate fUPDATE. When CS is pulled tolow, the actual value from the data register is written into the SPI output register. The sensor starts to transmitthe data when clock pulses are applied to the SCLK pin and the CS-pin is still low. During the next 16 clockpulses, the data word is sent out via the DOUT pin. If there are more than 16 clock pulses sent by the SPI-Masterand the CS-pin stays low, the sensor sends 0’s for all additional clock pulses. The CS-pin has to return to thehigh state for at least the time tCSON before pulling it low again in order to trigger the next sample readout.The clock pulses are ignored and the DOUT pin is in high ohmic state, when the CS-pin is in “high” state. Dueto multiple chips can be readout on the same data bus by sequentially selecting the addressed sensor via theCS-pin.

2.2 Functional interface descriptionWhile the IC is starting, following commands can be read:• IC in reset state: This may be due to low supply or the internal PLL is not locked (required for SPI

operation). As a result the output driver can not be activated by activating CS. If there is no data transmission, the SPI master will read back “FFFFH”

• IC starts with HW self tests: The SPI DO pin will start responding to SPI accesses. This can be seen as the read-back value changes to “83FFH”.

• IC starts with FW self tests: After HW self test FW self test start. The read-back value changes to “83C0H” (this value depends on HW/FW version). Actual FW/HW version is 0/0.

• IC is in unlocked state: After HW and FW self tests the IC changes to unlocked state. The read-back value changes to “8000H” (this value depends on HW/FW version and on EEPROM lock state), which means the IC is operational. HW version 0, FW version 0 and lock bits are not set. Optional C040H, C080H and 80C0H may be read out in case one or both lock bits are set.This value stays until current data is available, which can be seen as the MSB of the SPI response is zero. If the IC starts up completely before a first SPI readout is initiated, at least once the IC status is delivered. In the case shown above “8000H” is given.

This ends the startup phase. Once finished:• IC starts transmitting data: After finishing the startup the IC starts transmitting sensor data (this can be

seen as MSB of data frames is zero).




2.3 Interface summaryTable 2 gives an overview of the SPI received values and its meaning:

2.4 SPI dataframeThere are two different types of SPI frames sent from the sensor. The “Sensor Status Word” and the “SensorValue Word”. The two types are distinguished by the STATUS bit and the DATA section which contain differentinformation. For details see Table 3:

2.4.1 Sensor current value transmissionThe actual measurement current value is returned in the Sensor Value Word.

Table 2 SPI interface summarySPI Out CommentFFFFH Reset state

83FFH HW BIST state

83C0H FW BIST state. HW/FW version 0/0

8000H FW BIST state. HW/FW version 0/0

C040H IFX-locked IC, wait for data

80C0H IFX+User-Locked IC, wait for data

≤ 7FFFH Sensor data

Table 3 SPI frame content15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SPI-BITPOS

status =1

data = 0

odd

parity

Status or data content

0 PAR FOC CURRENT Data out

1 PAR HW OL OT COM RESERVED SICI Res Status out

Table 4 Value word fieldsField Bit Description0 15 Status

Status identifier of a Sensor Status Word

PAR 14 Parity bitOdd parity of current value.This bit is set in a way, that the sum of all bits in the Status Word is odd

FOC 13 FOC-stateOvercurrent comparator value0B No overcurrent1B Overcurrent detected

CURRENT 12:0 Current valueActual measured current value




2.4.2 Sensor status transmissionThe “Sensor Status Word” contains information about temperature and load conditions and is sent under thefollowing conditions:• Once after start-up (“Sensor restarted”)• During the sensor start-up phase when a command is sent (“Sensor busy”)• If an internal error occurred (“Sensor fail”)

Table 5 Status word fieldsField Bit Description1 15 Status

Status identifier of a Sensor Status Word

PAR 14 Parity bitOdd parity of current value.This bit is set in a way, that the sum of all bits in the Status Word is odd

HW 13 Hardware error0B OK1B Internal error; sensor not usable

OL 12 Overload error0B OK1B Overload (current outside IPFSR range)

OT 11 Temperature error0B OK1B Temperature out of range

COM 10 Communication error0B OK1B No multiple of 16 SCLK cycles detected in last frame

RESERVED 9:20

ReservedReserved for future use

SICI 1 Communication error0B OK1B Invalid SICI command after algorithm freeze




2.5 Communication timingIt is not recommended to place capacitors on the SPI communication lines due to the delay caused in on theCS line.The timing for SPI communication is as seen Figure 3 and Table 6:

Figure 3 SPI timing

Table 6 SPI timing parameters1) (5MHz SPI clock speed)

1) All timing parameters are valid on the sensor pin with the specified test load only. Different loading due to PCB mounting might result in different timing

Parameter Symbol Values Unit Note or Test ConditionMin. Typ. Max.

SPI period tSPI 200 - - ns

SCLK duty cycle tCLH / tCLL 45 - 55 %

CS setup time tCSS 75 - - ns RL ≥ 100 kΩCL ≤ 50 pF to GND

CS hold time tCSH 75 - - ns RL ≥ 100 kΩCL ≤ 50 pF to GND

Data setup time tDS - - 65 ns

Delay between CS rising edge and end of DOUT data

tDZ - - 75 ns

CS high time tCSON 300 - - ns

SCLK

DOUT

CS

tSPI

tCLH tCLLtCSS

tDS tDZ

tCSH

tCSON

MSB LSB




2.6 Typical application circuitIn order to establish a 3 wire Serial Peripheral Interface (SPI) connection a typical application circuit would beas seen in Figure 4 and Table 7:

Figure 4 Typical circuit for SPI connectivity

Table 7 Typical SPI application circuit - valuesSymbol Value UnitCS 100 nF

RL1)

1) Included internally

100 kΩ

RPU1) 47 kΩ

VDD 3.3 V

2:VDD

1:GND

3:DOUT

4:SCLK

5:CS

6:FOC

7:IP+

8:IP-

Sensor Microcontroller

CS

RPU RL

VDD

GND

SPI-Data-In

SCLK

CS1

Interrupt -In

Pow

erInterface C

ontrollerLogic I/O



Serial Inspection and Configuration Interface (SICI)

3 Serial Inspection and Configuration Interface (SICI)This chapter gives an overview about the Serial Inspection and Configuration Interface (SICI). This interface isavailable and functional in parallel with the SPI interface mode. For this the FOC pin is used. Furthermore itgives some programming examples and a list of the available commands.The transmission is based on transmitting a single bit to the sensor and immediately receiving a bit. These bitsform a 16-bit command word, similar to the SPI interface. This makes the interface bit-synchronous (and thusrobust) and very flexible in timing (within some quite large boundaries).

3.1 Communication timingA microcontroller needs to perform the following steps 16 times to send/receive 16 bits (starting with MSB).• Send a single low/high PWM transmission, with at least 30/70 (or 70/30) duty cycle:

– 0 is sent as a short low and long high PWM pulse (e.g. 2 µs low, 6 µs high)– 1 is sent as a long low and short high PWM pulse (e.g. 6 µs low, 2 µs high)

The initial pulse length (T1/T2) and the overall period T determines the read-out time “Delta-T”. An example of a 1-bit transmission can be seen in Figure 5:

Figure 5 SICI duty cycle

• Send a short low pulse (marks the end of the transmitted PWM and syncs the sensor to send a bit):– If the sensor transmits a 1, it pulls the output low for the time difference given by the transmitted PWM

(e.g. Figure 5 6 µs - 2 µs = 4 µs)– If the sensor transmits a 0, it does not pull the output low

By checking the output after the read-out time (determined by the time given by the previous PWM transmission of a bit “Delta-T”, for this case 4 µs), the microcontroller can determine if a 0 or 1 is transmitted by the sensor. See Figure 6 for a 1-bit response example from the TLI4970:

Figure 6 TLI4970 response (1 bit)

Sensor Response(‚1' bit)




Figure 7 shows us a transmission through the FOC pin as could be seen using an oscilloscope.

Figure 7 SICI communication example

Following transfer speeds can be achieved:• Fastest bit transmission: PWM is ~0.1 µs/~0.2 µs, check after ~0.1 µs, wait ~0.1 µs (gives ~2 MBit/s)• Typical bit transmission: PWM is ~0.4 µs/~1.6 µs, check after ~1.1 µs, wait ~0.4 µs (gives ~285 kBit/s)• Slowest bit transmission: PWM is ~60 µs/~90 µs, check after ~29 µs, wait ~21 µs (gives ~5 kBit/s)• Slowest mode may be useful in distorted environments and/or with high (capacitive) loads on FOCPlease take care to wait between SICI frames to allow the IC to decode and process the data. You may startanother SICI command within this time, but it must be finalized after this wait time.Minimum wait time between cycles for read/write and test commands (except EEPROM):• 25 µs (EEPROM commands may take longer, check EEPROM specification for these!)

Figure 8 SICI minimum waiting time

3.2 14-bit current readoutThe SICI interface offers the possibility to read out a 14-bit current value. The sensitivity of the 14-bit readoutwill be increased to 6,25 mA/LSB. Please refer to table Table 9 for details.

3.3 Programming exampleProgramming requires two single program pulses. One pulse is required to program the “1” and one pulse toprogram the “0”.During programming the whole EEPROM has to be written, therefore first all EEPROM values should be read.Once read, modify the desired lines, and program the EEPROM.Once read, an algorithm-freeze (AABFH) is be done. After the algorithm frozen has been read through SPI, theEEPROM is refreshed (8018H). Then the EEPROM lines have to be set as required - in this example line 01H is setto 9FFFH. The programming voltage (20 V typ.) has to be applied to the CS pin and the intelligent program “0”command has to be sent via SICI (801BH).Observe the DOUT pin: it will be on “high” during the programming (busy) and will be set to “low” when theprogramming is finalized. Afterwards further commands can be set.

FOC Signal [V]

MSB … ... one bit frame … … LSB 16 bit are required, starting with MSB ……...

‚0' from Sensor µC

‚1' from PGSISI µC

‚1' from Sensor µC

‚0' from PGSISI µC




Take care not to interfere with any other SICI commands until DOUT is “low” again.A refresh EEPROM command (8018H) is needed before the second programming pulse can be sent. After theline 01H is set again to 9FFFH.Then the intelligent program “1” command (801AH) has to be sent1).DOUT has to be set to “low” before continuing.The programming voltage should be removed from the CS pin.A reset has to be performed (either by a power-cycle or by sending the soft-reset command 7FFFH).The IC will perform a power-up including all BISTs.

1) It is mandatory to program first all '0', and then all '1'

Table 8 SICI interface summarySPI Out 1-wire-in Comment

AABFH Freeze algorithm processing

8000H Freeze pending

803FH Algorithm frozen

8018H Refresh EEPROM content, wait 100 µs

8101H Write 9FFFH to location 01HSet Vprog on CS pin, wait until settled9FFFH

801AH Apply programming for “0”Wait until DOUT toggles from “1” to “0”

8018H Refresh/restore EEPROM content, wait 100 µs

8101H Write 9FFFH to location 01H

9FFFH

801BH Apply programming for “1”Wait until DOUT toggles from 1 to 0Remove Vprog on CS pin

7FFFH Reset ICWait until power-on/BIST done




3.4 Available commandsTable 9 and Table 10 give an overview of the available SICI commands:

Table 9 SICI USR commands reference15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Comment0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Default

Returns data/status frame

0 1 1 FOC-Level FOC-Hys.1)

1) Bit 7 and 6 are the 2 MSB of the FOC-Hysteresis of the OVCH setting and shall be set to 11 (1111 for OVCH highest hysteresis)

FOC-Filter 0 0 FOC2)3)4)

Overwrite FOC-Level/Filter

2) More details see Table 143) 5-bit over current threshold in steps of 3 A. “00001”...3 A to “11110”...90 A, for both “+/-” current directions

symmetrically. If set to “0b11111” it works as a positive current detector. If set to “00000” it works as a negative current detector

4) When written once, this EEPROM value will be no longer refreshed

0 1 x1.5 xen HP PR LP-Setting INV 0 0 0 SR 0 1 Filter4)

Overwrite LP Filter setting

0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 Readout16-bit readout word containing current values (bits 15:2) and DTA_V_STAT (bits 1:0). 6,25 mA/LSB

0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Soft ResetIC restarts

Table 10 SICI programming commands reference1)

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Comment1 EDC ADDR 0 0 0 0 0 0 0 0 Memory

Read addressEDC2): 1B = “off’, 0B = “on’

1 EDC ADDR 0 0 0 0 0 0 0 1 MemoryWrite addressNext word must be a 16-bit dataEDC2): 1B = “off’, 0B = “on

1 1 ADDR 0 0 0 0 0 0 1 0 MemoryRead EDC2) of ADDR3)

1 1 ADDR 0 0 0 0 0 0 1 1 MemoryWrite EDC2) of ADDR3)

Next word must be a 16-bit data

1 0 x x x prog x x 0 1 1 0 0 0 EEPROMRefresh EEPROM

1 0 x x x prog x x 0 1 1 0 1 0 EEPROMProgram zeroes




SICI commands can be used at any time, except the IC is user-locked or the self test fails. See Figure 9:

Figure 9 Flow diagram to send a 1-Wire command

A lock or defect condition can be determined by a SPI readout after power-on: the very first command is eitheran error or a status containing the HW version, FW version and EEPROM lock state.

1 0 x x x prog x x 0 1 1 0 1 1 EEPROMProgram ones

1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 LOCKAlgorithm unfreeze

1 0 1 0 1 0 1 0 1 0 1 1 1 1 1 1 LOCKAlgorithm freeze

1) Requires USR lockbit not set. All SICI USR commands in Table 9 are also available2) EDC (Error Detection and Correction) only works for EEPROM lines3) Only for EEPROM lines

Table 10 SICI programming commands reference1) (cont’d)

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Comment

Self Test Ok

USR Lock

All Commands

Yes

No

No

YesAll USR

Commands

Power-onReset

IC Locked




3.5 Typical application circuitIn order to establish a SICI connection a typical application circuit would be as seen in Figure 10:

Figure 10 Typical circuit for SICI connectivity

Sensor and microcontroller must use an open-drain output, so they can actively pull only a 0 Volt level; the3.3 Volt level is achieved by an external pull-up resistor (a recommended value is > 4.7 kΩ).

Table 11 Typical SICI application circuit - valuesSymbol Value UnitCS 100 nF

RPU 4.7 kΩ

VDD 3.3 V

Vprog 20 V

2:VDD

1:GND

3:DOUT

4:SCLK

5:CS

6:FOC7:IP+

8:IP-

Sensor

MasterMicrocontroller or

Programmer

CS

RPU

VDD

SICIout

Fast overcurrent

SICIin

Gate driver signal generated by master

FOC Level detect by external master

FOC detect in applicat ion

or 1-wire data-in

1-wire data-out,not needed (low) in

applicat ion

to EEPROMGenerate Vpulse

Vprog



EEPROM user settings

4 EEPROM user settingsThis chapter describes the available user settings which may be adopted via EEPROM.

4.1 EEPROM mapFigure 11 gives an overview of all the user-available EEPROM bits:

Figure 11 EEPROM map

Table 12 General settingsSymbol Comment Default valueINVERT Inversion of IP current direction1)

1) Offset calibration fails if changed

Off = “1”

Reserved Reserved value, do not modify

X1_5nX2XEN

“00” = 50 A range; “11” = 25 A range

HP, PR Decimation filter behavior2)

2) Possible values see Table 13

1.1 kHz “Both on = 11”

LP_Setting IIR lowpass filter setting 2) 1.1 kHz = “011”

Table 13 EEPROM map description bandwidthHP (high pass filter) PR (prediction filter) LP_Setting

(low pass filter)Bandwidth

1 1 7 70 Hz

1 1 6 130 Hz

1 1 5 260 Hz

1 1 4 530 Hz

1 1 3 1.1 kHz

1 1 2 2.4 Hz

1 1 1 5.2 kHz

1 1 0 6.9 kHz

0 0 0 10 kHz

0 1 0 18 kHz

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 access FW headerDec Hex

0 00 X1_5nX2 XEN HP PR INVERT R/W eep_0

1 01 FOC_off R/W eep_1

2 02 SD_DBLSP FOC_PP USR_LOCK R/W eep_2

3 03 R/W eep_3

13 0D R eep_13

14 0E R eep_14

15 0F R eep_15

CHIP_ID_(31:16)

CHIP_ID_(47:32)

Reserved Reserved

Reserved

CHIP_ID_(15:0)

OVCF (3…0)

ADDR/BIT

LP_Setting ICSTAT (2…0)

OVCL OVCH (3…0)

GAIN(15...0)

Reserved

Reserved

SR_FOC SR_DIO



EEPROM user settings

Table 14 Fast overcurrent pathSymbol Comment Default ValueOVCL 5-bit overcurrent threshold 3…60 A in steps of 3 A.

“00001”…3 A to “11110”…90 A, for both “+/-”current directions symmetricallyIf set to “11111” it works as a positive current detectorIf set to “00000” it works as a negative current detector

54 A = “10010”

OVCH 4-bit hysteresis level Max setting = “1111”

OVCF Glitch filter 150 ns…1550 ns (“0001”…“1111”) in steps of 100 ns or off (“0000”)

750 ns = “0111”

FOC_off Disable FOC output pin, SPI flag still available Disable = “1”

Table 15 Pin/Pad configurationSymbol Comment Default ValueSR_DIO Set driver strength of DOUT pad (“11”…max / “01” or

“10”…mid / “00”…off)Max = “11”

SR_FOC Set driver strength of FOC pad (“11”…max / “01” or “10”…mid)1)

1) Take care, do not program to off = “00”

Max = “11”

FOC_PP Enable push-pull mode of FOC pad Off = “0”

Table 16 MiscellaneousSymbol Comment Default ValueSD_DBLSPD Double tracking speed and halve accuracy if set to b1 for

temperature stress and hall channelsRecommendation: do not change the bit by programming the eep

Default = “0”

USR_LOCK When enabled (=1) EEPROM line 0 to line 3 cannot be reprogrammed

Off = “0”

IC_STAT 3 bit to determine the test/production state of a IC by IFX; - can be also used by customer to show a modified state

CHIP_ID 48-bit read-only unique ID

GAIN 16-bit value for sensitivity fine adjustment Default: programmed by IFX



Revision history

5 Revision history

Revision Date Changes1.3 2017-09-18 updated sici interface summary

1.2 2017-05-22 Chapter 3.3 (Programming example): Changed FFFFH to 9FFFH.Table 8 (SICI interface summary): FFFFH and 7FFFH to 9FFFH and merged double rows.Table 9 (SICI USR commands reference): Changed FOC-Level, FOC-Hys and FOC-Filter.Figure 11 (EEPROM map): Replaced figure.Table 12 (General settings): Changed HP, PR defaults and LP_Setting comment and default.Table 13: Inserted new table “EEPROM map description bandwidth”.Table 14 (Fast overcurrent path): Changed OVCL comment and deleted footnote; Added OVCH row.Table 16 Miscellaneous: Changed comment for USR_LOCK. Add SD_DBLSPD and GAIN rows.Updated to EDD 4.2.

1.1 2012-10-17 Initial document issue.General format overview.



Terminology

AADC Analog to Digital Converter

BBIST Built-In Self-Test

DDSP Digital Signal Processor

EEDC Error Detection and Correction

EEP Electrically Erasable Programmable Read-Only Memory

EEPROM

FFW Firmware

HHW Hardware

IIC Integrated Circuit

ID Identification

IFX Infineon Technologies

IIR Infinite Impulse Response Filter

LLP Low Pass

LSB Least Significant Bit

MMSB Most Significant Bit

PPLL Phase-Locked Loop

PWM Pulse-Width Modulation

RROM Read-Only Memory

SSICI Serial Inspection and Configuration Interface

SPI Serial Peripheral Interface

UUSR User

Trademarks of Infineon Technologies AGAll referenced product or service names and trademarks are the property of their respective owners.

Edition 2017-09-18Published by Infineon Technologies AG81726 Munich, Germany

© 2017 Infineon Technologies AG.All Rights Reserved.

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TLI4970 Programming Guide - Infineon Technologies

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