tl783.pdf

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TL783SLVS036N SEPTEMBER 1981REVISED JANUARY 2015

TL783 High-voltage Adjustable Regulator1 Features 3 Description

The TL783 device is an adjustable three-terminal1 Output Adjustable From 1.25 V to 125 V when

high-voltage regulator with an output range of 1.25 VUsed with an External Resistor Dividerto 125 V and a DMOS output transistor capable of

700-mA Output Current sourcing more than 700 mA. It is designed for use in Full Short-Circuit, Safe-Operating-Area, and high-voltage applications where standard bipolar

regulators cannot be used. Excellent performanceThermal-Shutdown Protectionspecifications, superior to those of most bipolar 0.001%/V Typical Input Voltage Regulationregulators, are achieved through circuit design and

0.15% Typical Output Voltage Regulation advanced layout techniques. 76-dB Typical Ripple Rejection

Device Information(1)2 Applications PART NUMBER PACKAGE (PIN) BODY SIZE (NOM)

10.17 mm 9.02 mm Electronic Point of Sale TO-220 (3)10.16 mm 8.70 mm Medical, Health, and Fitness Applications TL783

PFM (3) 9.40 mm 8.00 mm Printers TO-263 (3) 10.18 mm 8.41 mm Applications and White Goods

(1) For all available packages, see the orderable addendum atthe end of the data sheet.

4 Simplified Schematic

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,intellectual property matters and other important disclaimers. PRODUCTION DATA.

TL783SLVS036N SEPTEMBER 1981REVISED JANUARY 2015 www.ti.com

Table of Contents8.2 Functional Block Diagram ......................................... 81 Features .................................................................. 18.3 Feature Description................................................... 82 Applications ........................................................... 18.4 Device Functional Modes.......................................... 83 Description ............................................................. 1

9 Application and Implementation .......................... 94 Simplified Schematic............................................. 19.1 Application Information.............................................. 95 Revision History..................................................... 29.2 Typical Application .................................................. 126 Pin Configuration and Functions ......................... 3

10 Power Supply Recommendations ..................... 167 Specifications......................................................... 411 Layout................................................................... 167.1 Absolute Maximum Ratings ...................................... 4

11.1 Layout Guidelines ................................................. 167.2 ESD Ratings.............................................................. 411.2 Layout Example .................................................... 167.3 Recommended Operating Conditions....................... 4

12 Device and Documentation Support ................. 167.4 Thermal Information .................................................. 412.1 Trademarks ........................................................... 167.5 Electrical Characteristics........................................... 512.2 Electrostatic Discharge Caution............................ 167.6 Typical Characteristics .............................................. 612.3 Glossary ................................................................ 168 Detailed Description .............................................. 8

13 Mechanical, Packaging, and Orderable8.1 Overview ................................................................... 8Information ........................................................... 16

5 Revision History

Changes from Revision M (April 2008) to Revision N Page

Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementationsection, Power Supply Recommendations section, Layout section, Device and Documentation Support section, andMechanical, Packaging, and Orderable Information section. ................................................................................................. 1

Deleted Ordering Information table. ....................................................................................................................................... 1

2 Submit Documentation Feedback Copyright 19812015, Texas Instruments Incorporated

Product Folder Links: TL783

OU

T

KTT (TO-263) PACKAGE

(TOP VIEW)

IN

OUT

ADJ

KTE (PowerFLEX ) PACKAGE

(TOP VIEW)

IN

OUT

ADJO

UT

TM

KC (TO-220) PACKAGE

(TOP VIEW)

OUTIN

ADJOU

T

TL783www.ti.com SLVS036N SEPTEMBER 1981REVISED JANUARY 2015

6 Pin Configuration and Functions

Pin FunctionsPIN

TYPE DESCRIPTIONKC KTE KTTNAME TO-220 PowerFLEX TO-263Voltage adjustment pin. Connect a

ADJ 1 1 1 I/O resistor divider to determine the outputvoltage.

IN 3 3 3 I Supply InputOUT 2 2 2 O Voltage Output

Copyright 19812015, Texas Instruments Incorporated Submit Documentation Feedback 3



7 Specifications

7.1 Absolute Maximum Ratingsover operating temperature range (unless otherwise noted) (1)

MIN MAX UNITVl VO Input-to-output differential voltage 125 VTJ Operating virtual junction temperature 150 CTstg Storage temperature range 65 150 C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under Recommended OperatingConditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD RatingsVALUE UNIT

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) 2500V(ESD) Electrostatic discharge VCharged device model (CDM), per JEDEC specification JESD22-C101, 1000all pins (2)

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating ConditionsMIN MAX UNIT

Vl VO Input-to-output differential voltage 125 VIO Output current 15 700 mATJ Operating virtual junction temperature 0 125 C

7.4 Thermal InformationTL783

THERMAL METRIC (1) KTE KTT KC UNIT3 PINS

RJA Junction-to-ambient thermal resistance 23 25.3 19RJC(top) Junction-to-case (top) thermal resistance N/A 18 17 C/WRJP Junction-to-exposed-pad thermal resistance 2.7 1.94 3

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.




7.5 Electrical CharacteristicsVl VO = 25 V, IO = 0.5 A, TJ = 0C to 125C (unless otherwise noted)

PARAMETER TEST CONDITIONS (1) MIN TYP MAX UNITTJ = 25C 0.001 0.01Vl VO = 20 V to 125 V,Input voltage regulation (2) %/VP rated dissipation TJ = 0C to 125C 0.004 0.02

Ripple rejection VI(PP) = 10 V, VO = 10 V, f = 120 Hz 66 76 dBVO 5 V 7.5 25 mVIO = 15 mA to 700 mA,

TJ = 25C VO 5 V 0.15% 0.5% Output voltage regulationVO 5 V 20 70 mVIO = 15 mA to 700 mA,

P rated dissipation VO 5 V 0.3% 1.5%Output voltage change with temperature 0.4%

Output voltage long-term drift 1000 hours at TJ = 125C, Vl VO = 125 V 0.2%Output noise voltage f = 10 Hz to 10 kHz, TJ = 25C 0.003%Minimum output current to maintain regulation Vl VO = 125 V 15 mA

Vl VO = 25 V, t = 1 ms 1100Vl VO = 15 V, t = 30 ms 715Peak output current mAVl VO = 25 V, t = 30 ms 700 900Vl VO = 125 V, t = 30 ms 100 250

ADJ input current 83 110 AVl VO = 15 V to 125 V, IO = 15 mA to 700 mA,Change in ADJ input current 0.5 5 AP rated dissipationVl VO = 10 V to 125 V, IO = 15 mA to 700 mA,Reference voltage (OUT to ADJ) (3) 1.2 1.27 1.3 VP rated dissipation

(1) Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must betaken into account separately.

(2) Input voltage regulation is expressed here as the percentage change in output voltage per 1-V change at the input(3) Due to the dropout voltage and output current-limiting characteristics of this device, output current is limited to less than 700 mA at

input-to-output voltage differentials of less than 25 V.



100

0.01

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10

00.1 1 10 100 1000

Co = 10 F

Rip

ple

Reje

cti

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d

B

f Frequency kHz

Co = 0

VI(AV) = 25 V

VI(PP) = 10 V

VO = 10 V

IO = 500 mA

TJ = 25C

0 100 200 300 400 500 600 700 800

Rip

ple

Reje

cti

on

(d

B)

IO Output Current (mA)

100

80

60

40

20

0

VI(AV) = 25 V

DVI(PP) = 10 V

VO = 10 V

f = 120 Hz

Co = 0

TJ = 25C

0 10 20 30 40

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VI VO = 25 V

TJ = 25C

0 10 20 30 40 50 60 70 80 90

100

80

60

40

20

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120

Rip

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Reje

cti

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(d

B)

VO Output Voltage (V)

VI(AV) VO = 25 V

DVI(PP) = 10 V

IO = 100 mA

f = 120 Hz

Co = 0

TJ = 25C

100

2

1.8

1.6

1.4

1.2

1

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0250 50 75 100 125

Ou

tpu

t C

urr

en

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imit

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VI VO Input-to-Output Voltage Differential (V)

tw = 1 ms

TJ = 0C

TJ = 25C

TJ = 125C

0.2

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1.2

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0 25 50 75 100

Ou

tpu

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urr

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imit

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)

VI VO Input-to-Output Voltage Differential (V)

tw = 30 ms

TJ = 0C

TJ = 25C

TJ = 125C

125


7.6 Typical Characteristics

Figure 1. Output Current Limit Figure 2. Output Current Limitvs vs

Input-to-Output Voltage Differential Input-to-Output Voltage Differential

Figure 4. Ripple RejectionFigure 3. Output Current Limitvsvs

Output VoltageTime

Figure 5. Ripple Rejection Figure 6. Ripple Rejectionvs vs

Output Current Frequency



0.2

0.3

0.4

0.50 25 50 75 100 125 150

O

utp

ut

Vo

ltag

e D

evia

tio

n

(%)

0.1

0

DV

O

TJ Virtual Junction Temperature ( C)

VI = 25 V

VO = 5 V

IO = 15 mA to 700 mA

6

4

2

00 25 50 75

O

utp

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rren

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100 125

I O

VI Input Voltage (V)

TJ = 25C

TJ = 125C

TJ = 0C

86

84

82

800 25 50 75

88

90

100 125


VI = 25 V

VO = VrefIO = 500 mA

AD

J In

pu

t C

urr

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t

(mA

)

20

10

5

075 50 25 0 25 50

Dro

po

ut

Vo

ltag

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(V)

75 100 125

25

15


DVO = 100 mV

IO = 700 mA

IO = 600 mA

IO = 500 mA

IO = 250 mA

IO = 100 mA

IO = 15 mA

1

f Frequency (kHz)

VI = 35 V

VO = 10 V

IO = 500 mA

TJ = 25C

101 102 103 104 105 106 107

101

102

103

104

101

102

Ou

tpu

t Im

ped

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)W

Zo

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1.28

1.27

1.26

1.25

1.24

1.23

1.22

75 50 25 0 25 50 75 100 125 150

R

efe

ren

ce

Vo

ltag

e

(V)


VI = 20 V

IO = 15 mA

Vre

f

175


Typical Characteristics (continued)

Figure 8. Reference VoltageFigure 7. Output Impedancevsvs

Virtual Junction TemperatureFrequency

Figure 9. Input Current at ADJ Figure 10. Dropout Voltagevs vs

Virtual Junction Temperature Virtual Junction Temperature

(1) This is the minimum current required to maintain voltageFigure 11. Output Voltage Deviationregulation.vs Figure 12. Output CurrentVirtual Junction Temperature vs

Input Voltage



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8 Detailed Description

8.1 OverviewThe TL783 device is an adjustable three-terminal high-voltage regulator with an output range of 1.25 V to 125 Vand a DMOS output transistor capable of sourcing more than 700 mA. It is designed for use in high-voltageapplications where standard bipolar regulators cannot be used. Excellent performance specifications, superior tothose of most bipolar regulators, are achieved through circuit design and advanced layout techniques.

As a state-of-the-art regulator, the TL783 device combines standard bipolar circuitry with high-voltage double-diffused MOS transistors on one chip, to yield a device capable of withstanding voltages far higher than standardbipolar integrated circuits. Because of its lack of secondary-breakdown and thermal-runaway characteristicsusually associated with bipolar outputs, the TL783 maintains full overload protection while operating at up to125 V from input to output. Other features of the device include current limiting, safe-operating-area (SOA)protection, and thermal shutdown. Even if ADJ is disconnected inadvertently, the protection circuitry remainsfunctional.

Only two external resistors are required to program the output voltage. An input bypass capacitor is necessaryonly when the regulator is situated far from the input filter. An output capacitor, although not required, improvestransient response and protection from instantaneous output short circuits. Excellent ripple rejection can beachieved without a bypass capacitor at the adjustment terminal.

8.2 Functional Block Diagram

8.3 Feature Description Output Adjustable From 1.25 V to 125 V when Used with an External Resistor Divider 700-mA Output Current Full Short-Circuit, Safe-Operating-Area, and Thermal-Shutdown Protection 0.001%/V Typical Input Voltage Regulation 0.15% Typical Output Voltage Regulation 76-dB Typical Ripple Rejection

8.4 Device Functional Modes

8.4.1 Active ModeThe TL783 acts as a high-voltage adjustable regulator. The device works to keep the voltage at the OUT pin 1.25V higher than the voltage at the ADJ pin. Therefore, a resistor divider can be used to set the output voltage.



50 mF

82 W

+

VI = 70 to 125 V

10 W

1 kW

TIP30C

TIPL762

VO = 50 V

at 0.5 A

TL783

3.3 kW, 1W

10 kWIN

OUT

ADJ

10 mF

0.1 mF

IN

OUT

ADJ

R2

8.2 kW, 2W

125 V

120 V, 1.5 W

7.5 kW, 1 W

VI = 145 to 200 V

TIP150

TL783R1

82 W

+


9 Application and Implementation

NOTEInformation in the following applications sections is not part of the TI componentspecification, and TI does not warrant its accuracy or completeness. TIs customers areresponsible for determining suitability of components for their purposes. Customers shouldvalidate and test their design implementation to confirm system functionality.

9.1 Application Information

9.1.1 General Configurations

Figure 13. 125-V Short-Circuit-Protected Off-Line Regulator

Figure 14. 50-V Regulator With Current Boost



VI

Load

R

IV

ref

R

IN

OUT

ADJ

TL783

50 mF+

125 V

10 W

1 kW TIPL762

1 W

R2

TL783

R1

82 W

10 kWIN

OUT

ADJ O ref

R2V V 1

R1

= +


Application Information (continued)

Figure 15. Adjustable Regulator With Current Boost and Current Limit

Figure 16. Current-Sinking Regulator



V +

INPUT

V

TL081

R2

OUTPUT

VCC

1 mF

+

TL783

82 W

IN

OUT

ADJ

OFFSET ref

R2V V I

82

= +

VI

1 mF

R

TL783

Load

IN

OUT

ADJ

I=V

ref

R



Figure 17. Current-Sourcing Regulator

Figure 18. High-Voltage Unity-Gain Offset Amplifier



VI

TL783

IN OUT

ADJ

1 mF(see Note A)

0 to 8 kW

10 mF

R2

R1

82 W++

O ref

R2V V 1

R1

= +

6.25 W

48 V

82 W

3.9 kW

VI = 90 V

TL783

TL783

IN

OUT

ADJ

IN

OUT

ADJ



Figure 19. 48-V 200-mA Float Charger

9.2 Typical ApplicationThe TL783 is typically used as an adjustable regulator.

A. Needed if device is more than 4 inches from filter capacitor

Figure 20. 1.25-V to 115-V Adjustable Regulator

9.2.1 Design Requirements Input and output decoupling capacitors for noise filtering. Resistor divider consisting of R1 and R2 to set the output voltage.




Typical Application (continued)9.2.2 Detailed Design Procedure

The internal reference (see Simplified Schematic) generates 1.25 V nominal (Vref) between OUT and ADJ. Thisvoltage is developed across R1 and causes a constant current to flow through R1 and the programming resistorR2, giving an output voltage of:

VO = Vref (1 + R2 / R1) + lI(ADJ) (R2)

orVO Vref (1 + R2 / R1)

The TL783 was designed to minimize the input current at ADJ and maintain consistency over line and loadvariations, thereby minimizing the associated (R2) error term.

To maintain II(ADJ) at a low level, all quiescent operating current is returned to the output terminal. This quiescentcurrent must be sunk by the external load and is the minimum load current necessary to prevent the output fromrising. The recommended R1 value of 82 provides a minimum load current of 15 mA. Larger values can beused when the input-to-output differential voltage is less than 125 V (see the output-current curve in Figure 12) orwhen the load sinks some portion of the minimum current.

9.2.2.1 Bypass CapacitorsThe TL783 regulator is stable without bypass capacitors; however, any regulator becomes unstable with certainvalues of output capacitance if an input capacitor is not used. Therefore, the use of input bypassing isrecommended whenever the regulator is located more than four inches from the power-supply filter capacitor. A1-F tantalum or aluminum electrolytic capacitor usually is sufficient.Adjustment-terminal capacitors are not recommended for use on the TL783 because they can seriously degradeload transient response, as well as create a need for extra protection circuitry. Excellent ripple rejection presentlyis achieved without this added capacitor.

Due to the relatively low gain of the MOS output stage, output voltage dropout may occur under large-loadtransient conditions. The addition of an output bypass capacitor greatly enhances load transient response andprevents dropout. For most applications, it is recommended that an output bypass capacitor be used, with aminimum value of:

Co (F) = 15 / VOLarger values provide proportionally better transient-response characteristics.



IN

TL783

OUT VO

R1

R2

ADJ

VI

Co


Typical Application (continued)9.2.2.2 Protection CircuitryThe TL783 regulator includes built-in protection circuits capable of guarding the device against most overloadconditions encountered in normal operation. These protective features are current limiting, safe-operating-areaprotection, and thermal shutdown. These circuits protect the device under occasional fault conditions only.Continuous operation in the current limit or thermal shutdown mode is not recommended.

The internal protection circuits of the TL783 protect the device up to maximum-rated VI as long as certainprecautions are taken. If Vl is switched on instantaneously, transients exceeding maximum input ratings mayoccur, which can destroy the regulator. Usually, these are caused by lead inductance and bypass capacitorscausing a ringing voltage on the input. In addition, when rise times in excess of 10 V/ns are applied to the input,a parasitic npn transistor in parallel with the DMOS output can be turned on, causing the device to fail. If thedevice is operated over 50 V and the input is switched on, rather than ramped on, a low-Q capacitor, such astantalum or aluminum electrolytic, should be used, rather than ceramic, paper, or plastic bypass capacitors. A Qfactor of 0.015, or greater, usually provides adequate damping to suppress ringing. Normally, no problems occurif the input voltage is allowed to ramp upward through the action of an ac line rectifier and filter network.

Similarly, when an instantaneous short circuit is applied to the output, both ringing and excessive fall times canresult. A tantalum or aluminum electrolytic bypass capacitor is recommended to eliminate this problem. However,if a large output capacitor is used, and the input is shorted, addition of a protection diode may be necessary toprevent capacitor discharge through the regulator. The amount of discharge current delivered is dependent onoutput voltage, size of capacitor, and fall time of Vl. A protective diode (see Figure 21) is required only forcapacitance values greater than:

Co (F) = 3 104 / (VO)2

Care always should be taken to prevent insertion of regulators into a socket with power on. Power should beturned off before removing or inserting regulators.

Figure 21. Regulator With Protective Diode



TJ = 25C

Co = 0

Co = 10 mF

0 1 2 3 4

Time ( s)m

O

utp

ut

Vo

ltag

e D

evia

tio

n

(V)

VO

Ch

an

ge in

In

pu

t Vo

ltag

e

(V)

0.4

0.2

0

0.2

1

0.5

0

D

VI = 35 V

VO = 10 V

Co = 1 mF

TJ = 25C

O

utp

ut

Cu

rren

t

(A)

I O

6

4

2

0

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00 40 80 120 160 200 240

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VO

D

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TL783

R1

Rline

RL

R2

VO

IN OUT

ADJ


Typical Application (continued)9.2.2.3 Load RegulationThe current-set resistor (R1) should be located close to the regulator output terminal, rather than near the load.This eliminates long line drops from being amplified, through the action of R1 and R2, to degrade load regulation.To provide remote ground sensing, R2 should be near the load ground.

Figure 22. Regulator With Current-Set Resistor

9.2.3 Application Curves

Figure 24. Load Transient ResponseFigure 23. Line Transient Response



OUTPUTIN

PU

T

OU

TP

UT

AD

J/G

ND

R2

R1Cadj

Gro

und

Ground

Power


10 Power Supply RecommendationsA decoupling capacitor is needed on the IN pin of the TL783 if the TL783 is more than 4 inches from its powersupply's filter capacitor. The differential input and output voltage levels are detailed in Recommended OperatingConditions.

11 Layout

11.1 Layout GuidelinesInput and output traces should be thick enough to handle desired currents, which can reach up to 700 mA on theoutput. ADJ pin traces can be smaller because the adjustment current is negligible.

11.2 Layout Example

Figure 25. Layout Example

12 Device and Documentation Support

12.1 TrademarksAll trademarks are the property of their respective owners.

12.2 Electrostatic Discharge CautionThese devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.

12.3 GlossarySLYZ022 TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable InformationThe following pages include mechanical, packaging, and orderable information. This information is the mostcurrent data available for the designated devices. This data is subject to change without notice and revision ofthis document. For browser-based versions of this data sheet, refer to the left-hand navigation.



PACKAGE OPTION ADDENDUM

www.ti.com 28-Oct-2014

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead/Ball Finish(6)

MSL Peak Temp(3)

Op Temp (C) Device Marking(4/5)

Samples

TL783CKC OBSOLETE TO-220 KC 3 TBD Call TI Call TI 0 to 125 TL783CTL783CKCE3 OBSOLETE TO-220 KC 3 TBD Call TI Call TI 0 to 125 TL783C

TL783CKCSE3 ACTIVE TO-220 KCS 3 50 Pb-Free(RoHS)

CU SN N / A for Pkg Type 0 to 125 TL783C

TL783CKTER OBSOLETE PFM KTE 3 TBD Call TI Call TI 0 to 125 TL783TL783CKTTR ACTIVE DDPAK/

TO-263KTT 3 500 Green (RoHS

& no Sb/Br)CU SN Level-3-245C-168 HR 0 to 125 TL783C

TL783CKTTRG3 ACTIVE DDPAK/TO-263

KTT 3 500 Green (RoHS& no Sb/Br)

CU SN Level-3-245C-168 HR 0 to 125 TL783C

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

PACKAGE OPTION ADDENDUM


Addendum-Page 2

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominalDevice Package

TypePackageDrawing

Pins SPQ ReelDiameter

(mm)Reel

WidthW1 (mm)

A0(mm)

B0(mm)

K0(mm)

P1(mm)

W(mm)

Pin1Quadrant

TL783CKTTR DDPAK/TO-263

KTT 3 500 330.0 24.4 10.8 16.3 5.11 16.0 24.0 Q2

PACKAGE MATERIALS INFORMATION


Pack Materials-Page 1

*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TL783CKTTR DDPAK/TO-263 KTT 3 500 340.0 340.0 38.0

PACKAGE MATERIALS INFORMATION


Pack Materials-Page 2

MECHANICAL DATA

MPFM001E OCTOBER 1994 REVISED JANUARY 2001

1POST OFFICE BOX 655303 DALLAS, TEXAS 75265

KTE (R-PSFM-G3) PowerFLEX PLASTIC FLANGE-MOUNT

0.360 (9,14)0.350 (8,89)

0.080 (2,03)0.070 (1,78)

0.010 (0,25) NOM0.040 (1,02)

Seating Plane

0.050 (1,27)

0.001 (0,03)0.005 (0,13)

0.010 (0,25)NOM

Gage Plane

0.010 (0,25)

0.031 (0,79)0.041 (1,04)

4073375/F 12/00

NOM

31

0.350 (8,89)0.220 (5,59)

0.360 (9,14)

0.295 (7,49)NOM 0.320 (8,13)

0.310 (7,87)

0.025 (0,63)0.031 (0,79)

Thermal Tab(See Note C)

0.004 (0,10)M0.010 (0,25)0.100 (2,54)

36

0.410 (10,41)0.420 (10,67)

0.200 (5,08)

0.365 (9,27)0.375 (9,52)

NOTES: A. All linear dimensions are in inches (millimeters).B. This drawing is subject to change without notice.C. The center lead is in electrical contact with the thermal tab.D. Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).E. Falls within JEDEC MO-169

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1Features2Applications3Description4Simplified SchematicTable of Contents5Revision History6Pin Configuration and Functions7Specifications7.1Absolute Maximum Ratings7.2ESD Ratings7.3Recommended Operating Conditions7.4Thermal Information7.5Electrical Characteristics7.6Typical Characteristics

8Detailed Description8.1Overview8.2Functional Block Diagram8.3Feature Description8.4Device Functional Modes8.4.1Active Mode

9Application and Implementation9.1Application Information9.1.1General Configurations

9.2Typical Application9.2.1Design Requirements9.2.2Detailed Design Procedure9.2.2.1Bypass Capacitors9.2.2.2Protection Circuitry9.2.2.3Load Regulation

9.2.3Application Curves

10Power Supply Recommendations11Layout11.1Layout Guidelines11.2Layout Example

12Device and Documentation Support12.1Trademarks12.2Electrostatic Discharge Caution12.3Glossary

13Mechanical, Packaging, and Orderable Information

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