Dealing With Abstraction: Reducing Abstraction in ... - Summit
Timing Abstraction
description
Transcript of Timing Abstraction
Pirouz Bazargan Sabet ValMem - March 2010
Timing Abstraction
Pirouz Bazargan Sabet
Patricia Renault
Dominique Le Dû
Pirouz Bazargan Sabet ValMem - March 2010
Functional Abstraction
Netlist Tr, C, R
Netlist of Gates, C, R
Abstraction
Timing Abstraction
Gate Delays
Pirouz Bazargan Sabet ValMem - March 2010
a
a
b
Fdown = a . b
b
Fup = b + a
Functional Abstraction
Fup = Fdown
follow the current paths
Pirouz Bazargan Sabet ValMem - March 2010
a
b
c
d
Functional Abstraction
conflict
tri-sta
teFup . Fdown = c.d.(ab)
Fup + Fdown = c.d
c=d
Fup = db + caFdown = db + ca
Fup = cb+ ca
functional view timing view
Pirouz Bazargan Sabet ValMem - March 2010
Delay Evaluation
xi y
Accurate delay using electrical simulation
Simulation of each configuration : 1 input
switching while others are in steady state
Pirouz Bazargan Sabet ValMem - March 2010
a
b
c
d
Fup = db + caFdown = db + ca
Fup = cb+ ca
a b c dx x x
x xx
xx x
x x x
Delay Evaluation
Pirouz Bazargan Sabet ValMem - March 2010
Include the gates until
reaching the sources
of correlation
sources of correlation
size some correlations are not useful number of configurations
Delay Evaluation
Pirouz Bazargan Sabet ValMem - March 2010
Explore the supergate to
identify the configurations
to be simulated
sources of correlation
Delay Evaluation
Functional exploration
Pirouz Bazargan Sabet ValMem - March 2010
a
b
c
d
Fup = db + caFdown = db + ca
Fup = cb+ ca
a b c dx x x
x xx
xx x
x x x
Delay Evaluation
x x
Pirouz Bazargan Sabet ValMem - March 2010
Functional correlation :
Delay Evaluation
a b
x
inputs
configstiming correlation
transition delay between a and b depends on the
delay of the gates involved in the supergate
Electrical simulations should be
done regarding the gates’ graph
Pirouz Bazargan Sabet ValMem - March 2010
Delay Evaluation
Timing dependency