Application of Interrupt and Timer : Measurement of Motor Speed.
Timer & Interrupt Atmega16
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Transcript of Timer & Interrupt Atmega16
By/Ramadan Ahmed
What’s Interrupts ?
Basically events that require immediate attention by the microcontroller.
An interrupt is a signal to the processor emitted by hardware or software indicating an event that needs immediate attention.
When an interrupt event occurs, the microcontroller pause its current task and attend to the interrupt by executing its corresponding Interrupt Service Routine (ISR) then microcontroller returns to the task it had pause and continue its normal operations.
Such an event may be:
An peripheral device has finished the last task it was given and is now ready for another. For example Timer may generate interrupt after reaching the maximum possible value.
External Interrupt event on I/O Pin.
An error from a peripheral.
You can think of it as a hardware-generated function call.
ISR (Interrupt service routine)
Piece of code that should be execute when an interrupt is triggered
Should be deterministic and short as possible, as it usually set a flag to a specific task indicating a certain event is happened, or save
small data in buffer.
REMEMBER
Global interrupt enabled bit MUST be enabled for interrupts to be activated in the µC.
To Set global interrupt : sei();
To clear global interrupt : cli();
Interrupt Flags and Enabled bits in AVR µCEach interrupt is associated with two (2) bits, an Interrupt Flag Bit and an Interrupt Enabled Bit. These bits are located in the I/O registers associated with the specific interrupt:
The interrupt enabled bit(IE): is used to enable or disable a specific interrupt. Basically is tells the µC whether or not it should respond to the interrupt if it is triggered.
The interrupt flag bit (IF):is set whenever the interrupt event occur, whether or not the interrupt is enabled. And The flag is cleared when the ISR is executed. So it is also called “Automatic Flag”.
Global interrupt
Interrupt flag
Interrupt enabled
Interrupt Request
RESET interrupt It active low interrupt which means it triggered when low voltage (0 volt) is applied on reset pin (number 9).
Timer is special register that can be 8-16 bit so capable of holding from 0 to 255-65536
What differ it from any register that it count up / down automatically at predefined rate and this is Timer Clock that doesn’t need CPU intervention.
Timer Clock could be internal / external
One of basic condition when Timer overflow( it means timer counted up to its maximum value and return back to zero).
In this situation it causes interrupt and if global interrupt mask is enabled and timer interrupt enable so you have to write ISR to handle the event of the overflow
Resolution: is the smallest period taken by timer to take one count we can
calculate it through formula
Resolution = (1/Frequency)
If you using 1 MHZ for CPU Clock timer takes to count up till it overflow 256 us
So if microcontroller is clocked with 1MHz source, then 8 bit timer will run with resolution:
Resolution=1/1MHz=1µs
In case you want to increase the time needed for specific operation we use timer prescalar
Prescalar divide the clock frequency and produce timer clock
Prescalar modes are No prescalar (Timer Clock).
Clock/8.
Clock/64.
Clock/256.
Clock/512.
Clock/1024.
NO clock.
NoteCPU Clock doesn’t affected by
reduction using prescalar.
It remain the same
Example for using prescalar : If you using 1 MHZ for CPU Clock without using prescalar timer
takes to count up till it overflow 256 µs
But when you use prescalar 1024 timer takes to count up till it overflow 0.26 sec
It’s easy to know the time timer need to overflow if you know Resolution.
Resolution = (1/Frequency)
So if microcontroller is clocked with 1MHz source, then 8 bit timer without prescaler will run with resolution:
Resolution=1/1MHz=1µs
So if timer take 256 counts to overflow then it takes :
T= Resolution * 256 = 1µs *256 = 256 µs
And when we use 1024 as prescalar:
Resolution = 1024 / 1 MHZ = 1024µs
T = Resolution * 256 = 1024 * 256 = 0.256s
ATmega16/32 have 3 Timer/counter we have three Timers/Counters each one with Separate Prescaler. Timer 0 - 8 bit timer.
Timer 1 -16 bit timer.
Timer 2 - 8 bit timer.
Timer also can be operated in 3 modes :Normal mode (Overflow).
Pulse Width Modulation mode(PWM).
Clear Timer Compare mode(CTC ).
Timer0Timer1 is an 16 bit timer/counter which can count from 0 to 0xFF (256).
In the timer mode this peripheral uses an internal clock signal.
In the counter mode an external signal on PIN0 in PORTB.
The timer can be operated either in the polling mode or in the interrupt mode.
Timer/Counter Control Register – TCCR0
Bit 7 – FOC0: Force Output Compare
The FOC0 bit is only active when the WGM00 bit specifies a non-PWM mode.
Bit 3, 6 – WGM01:0: Waveform Generation Mode
Bit 5:4 – COM01:00 Compare Match Output Mode
Bit 2:0 – CS02:0: Clock Select
Timer/Counter Register – TCNT0This is where the 8-bit counter of the timer resides. The value of the counter is stored here and it increases automatically each clock cycle. Data can be both read/written from this register. The initial value of the counter is set by writing it.
Output Compare Register – OCR0 The Output Compare Register contains an 8-bit value that is
continuously compared with the counter value (TCNT0). A match can be used to generate an output compare interrupt, or to generate a waveform output on the OC0 pin.
Timer/Counter Interrupt Mask Register –TIMSKTOIE0: Timer Overflow Interrupt Enable
OCIE0: Output Compare Match Interrupt Enable
Timer/Counter Interrupt Flag Register – TIFR
TOV0: The bit TOV0 is set (one) when an overflow occurs in Timer/Counter0. TOV0 is
cleared by hardware when executing the corresponding interrupt handlingvector. When the SREG I-bit, TOIE0 (Timer/Counter0 Overflow InterruptEnable), and TOV0 are set (one), the Timer/Counter0 Overflow interrupt isexecuted.
OCF0 The OCF0 bit is set (one) when a compare match occurs between the
Timer/Counter0 and the data in OCR0 – Output Compare Register0. OCF0 iscleared by hardware when executing the corresponding interrupt handlingvector. When the I-bit in SREG, OCIE0 (Timer/Counter0 Compare MatchInterrupt Enable), and OCF0 are set (one), the Timer/Counter0 Compare MatchInterrupt is executed.
Normal Mode (Overflow) A timer overflow means that the counter(TCTNx) has counted up
to its maximum value and is reset to zero in the next timer clock cycle.
The resolution of the timer determines the maximum value of that timer.
The timer overflow event causes the Timer Overflow Flag (TOVx) to be set in the Timer Interrupt Flag Register (TIFR).
Pulse Width Modulation
is the technique used to generate analogue signals from a digital device like a MCU. Almost all modern MCUs have dedicated hardware for PWM signal generation.
A digital device, like a microcontroller can only generate two levels on its output lines, HIGH=5v and LOW=0V.
But what if we want to generate 2.5v or 3.1v or any voltage between 0-5 volt output ?
For these kinds of requirement, instead of generating a constant DC voltage output we generate a square wave, which has high = 5V and Low = 0v
We will use the simplest timer, TIMER0 for PWM generation.
Pulse Width Modulation
The period (frequency) depends upon the prescaler settings. Now for PWM generation from this count sequence we have a OCR0 (Output Compare Register Zero Register). We can store any value between 0-255 in OCR0, say we store 64 in OCR0 then it would appear in the graph as follows (the RED line).
When the TIMER0 is configured for fast PWM mode, while up counting whenever the value of TIMER0 counter (TCNT0 register) matches OCR0 register an output PIN (OC0 PIN) is pulled low (0) and when counting sequence begin again from 0 it is SET again (pulled high=VCC).
Pulse Width Modulation
Note:
to be able to generate
an output from the
PWM in Timer0, the
Output Compare Pin of
Timer0 (OC0) must
be set as output pin.
DDRB |= PB3