Editor-in-Chief

Prof. Jaakko AstolaTel. +358 3 365 2923Fax +358 3 365 3087Email: jta@cs.tut.fi

Editor

Pirkko RuotsalainenTel. +358 3 365 3818Fax +358 3 365 3817Email: pr@cs.tut.fi

Tampere University of TechnologyP.O. Box 553, FIN-33101 Tampere, FinlandStreet: Hermiankatu 12 A, 33720 Tamperehttp://www.dsp.tut.fi/TICSP/

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TICSP Workshop on DSP & Technical Writing

The following theses defence for the degree of Doctor of Technology was presented at Tampere University ofTechnology, Department of Information Technology, in ������� ��� ���� �������

��������������������M.Sc.�� "Robust Parameterization Techniques for Speech Recognition" on Fri-day, February 9, 2001.

The opponents are Ph.D. Martin Cooke from University of Sheffield, Department of Computer Science,United Kingdom, and Ph.D. P.K. (Raja) Rajasekaran from Texas Instruments Inc., Media Technologies Labora-tory, USA.

The custodian is Prof. Petri Haavisto, TUT, Signal Processing Laboratory.

TICSP arranged Workshop on DSP & TechnicalWriting on January 8 - 11, 2001 in Saariselkä, whichis surrounded by the natural beauty in the very heartof Finnish Lapland. In the workshop were explored new developmentsin the area of DSP and Knowledge Engineering ininternational and relaxed atmosphere. One goal ofthe workshop was to brush up the skills in technicalwriting. Lecturer Danny Donoghue gave a short courseentitled “Typical Errors in English Technical Writ-ing”. The course was intended for the non-nativeacademic writer of technical texts and comprised thesekey problem areas: composing a title, composing apreface, checking references, the comma, ambigu-ity, errors of logic, certain features in style and gram-mar, spelling, time-neutral verb tense, the hyphen,the definite article and clear writing. Teaching took the form of interactive open dia-logue on structured examples. All group memberswere continuously and equally involved. The lan-guage material was selected from errors found inproofreading authentic technical writing such asDTech, LicTech and MSc theses as well as research

articles. The level was geared to students with anadvanced knowledge of English, and although thecourse material was in parts quite difficult, the per-formance of all students was of high standard. Writing skills cannot be perfected in 12 hours.However, teacher and students were satisfied thatthe aim of the course, namely to increase awareneddof some of the most common pitfall areas and toindicate strategies for dealing with them, wasachieved. All who participated felt that the coursehad been useful and worthwhile offering again.

Doctoral Theses

Mr. ���� ������������ started as the new coordinator at TICSP onJanuary 1, 2001. Sampsa received his M.Sc. degree in engineering from the TampereUniversity of Technology in June 2000. His main subjects were signalprocessing and system theory. Currently he works as a research scientist atSignal Processing Laboratory. His research interests are constructing models of gene expression net-works using data mining methods, especially Bayesian networks.

Prof. �������� , from TUT, Signal Processing Laboratory, on “MDL based Gene Expression Prediction fromMicroarray Measurements”, on February 6, 2001

Mr. ���� ������������, from TUT, Signal Processing Laboratory, on “Bayesian Networks: An Introduc-tion & Association to the Gene Expression Network”, on February 13, 2001

Prof. ���������������, from Institute of Problems of Informatics and Automation NAS, Yerevan, Arme-nia, on “Hadamard Matrices and Their Applications”, on February 20, 2001.

Participants at thelecture

New Coordinator at TICSP

TICSP Seminar Series

Prof. ������������� , from Urals State Technical University, Russia , will stay at TICSP as a visiting professorfor another year starting January 2001

Dr. �����������������, from Indian Air Force will continue his stay at TICSP with one year as avisiting researcher starting January 1, 2001

Mr. ������� �!��� � from Federal University of Rio de Janeiro (UFRJ), Brasil, visited TICSP on January8 - February 28, 2001

Mr. "���� �#�$��%, from Institute of Information Technologies, Bulgarian Academy of Sciences on Janu-ary 11 - February 28, 2001

Mr. ��&���������� and Mr. '������(�����, from Technical University of Cluj-Napoca, Faculty ofElectrical Engineering, Romania will work as researchers at TICSP for one year starting January 2001

Dr. ���&���� ����� and Dr. ������ �������, from Kharkov Aviation Institute, Ukraine, visitedTICSP on January 14 - 28, 2001

Prof. ���������������, from Institute of Problems of Informatics and Automation NAS, Yerevan, Arme-nia, on February 1 - March 31, 2001

Mr. "��)������ %, from Urals State Technical University, Russia, visited TICSP the whole month of Febru-

ary 2001

Mr.�"��)������&��, from Urals State Technical University, Russia, one year starting February 15, 2001.

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TICSP Workshop

Mr. "���� � #�$��%,from Institute of Informa-tion Technologies, Bul-garian Academy of Sci-ences, visited TICSP onJanuary 11 - February 28,2001. His research interestsare theoretical and practi-cal investigations in thefields of speech processing

and speaker recognition. He has published papersand articles in the areas of robust speech feature ex-traction and neural network-based speaker identifi-cation. He has participated as senior researcher in manyprojects for design of systems for speech signal analy-

Visitors to TICSP

In and Out

Mr. ������� �!��� from Federal University ofRio de Janeiro (UFRJ),Brasil, was working as avisting researcher at TICSPfor two months, startingJanuary 8, 2001. His research topic dur-ing his visit is on optimi-zation of filters phaselinearization. He is still an undergraduating student at UFRJ.He is also a student of the grant for scientific initia-tion program from UFRJ. This program topic isdigital filters group delay equalization.

The day was concluded with a panel discussion on theHW/SW partitioning for SoC. The panelists were���%��� *������ (Xilinx), Monica Lam, JoachimKunkel, Pete Cumming, Sharad Malik and "���&������ (Altera). As a short conclusion of the stormydiscussion, hardware platforms consisting of program-mable processors and reconfigurable logic will have theirniche between ASIC and FPGA. More on the topic athttp://www.cs.tut.fi/~nurmi/soc2000/ . The second day started with a presentation by +�%��+�,��$ from Lucent Technologies. He introduced theCMOS roadmap down to 0.05 mm, added spices suchas SOI and SiGe processes, integrated resonators, memo-ries and optoelectronics. We also saw real Systems-on-Chip, such as a 137 Mtransistor base station chip. Thereal clue was a vertically integrated MOS transistorwhich already works down to the 50 nm line width inthe lab. �������������� from KTH, Sweden, in-troduced the problems with interconnects. -%��'�%�& � from IBM presented SOP (System-on-Pack-age) as an alternative solution to SoC. Steven Guccionefrom Xilinx introduced configurable computation."�&�,� .�� and ���� ������& from ST Mi-croelectronics presented ST’s bus and processor con-cepts. /�0�������0����, Chameleon Systems, de-scribed their configurable communication processor. Thelast speech was the synchronous multiprocessor archi-tecture by '�%�&� ����� from BOPS. There was also a very focused exhibit by 11 compa-nies. SoC 2001 will take place in Tampere Hall on 19.-20.11.2001.

The System-on-Chip technology seminar was held onNovember 15 - 16, 2001 at Tampere Hall, Tampere.The event was chaired by Prof. .���(���, TUT, Com-puter Systems Laboratory, and sponsored by Nokia. The first day concentrated mostly on software andthe second on technology and architecture for SoCimplementation. �����1������ from Texas Instru-ments introduced one of the central themes of the event,platforms. TI view of that was OMAP (Open Multime-dia Application Platform) where a common API (Ap-plication Program Interface) hides the underlying DSPand RISC processors. .������+����� from Synopsysspoke for SystemC, a C++ based methodology for de-scribing hardware. ���� ����2���� from LucentTechnologies introduced results from their project atUniversity of Illinois, the IMPACT compiler environ-ment which suits well for op-timizing code for futureDSPs. The signal processing on a chip will increasinglyutilize instruction-level parallelism and heterogeneousmultiprocessors, which are hard targets for traditionalcompilers. ����&������� from Princeton Universitydescribed their cooperation project with UC Berkeley,MESCAL, where one of the core areas is a parallelizingretargetable compiler. Also this technology relies onplatforms. In the last talk of the day������� ���from Stanford University gave a good overview ofoptimizations and transforms in compilers. Her maintarget was configurable processors and their perform-ance.

Saariselkä, where the workshop took place, is situated in the northern-most part of Finland, offered a unique experience. There you may alsoenjoy unspoiled nature and the northern lights, Aurora borealis, whichcreate a magnificent phenomenon in the northern sky. The participants enjoyed cross-country skiing in the illuminated tractsin the fells and also snow-shoes. Perhaps the most unforgettable eventwas the reindeer drive in the untouched white wilderness, followed bya cup of coffee and crowberry juice in the Lapp hut. One evening theparticipants enjoyed the services of the local spa center.

Ms. Knarik Tunyanwith a Lappin a laplander suit.

SoC Seminar