Tick-Tock Development Model - Monash · 2012. 3. 9. · 1 2/15/12 Tick-Tock Development Model:...
Transcript of Tick-Tock Development Model - Monash · 2012. 3. 9. · 1 2/15/12 Tick-Tock Development Model:...
-
1 2/15/12
Tick-Tock Development Model: Sustained Microprocessor Leadership
Intel® Core™ Microarchitecture
TOCK
New Micro-
architecture
Merom
65nm
TICK
Penryn
New Process Technology
45nm
Intel® Microarchitecture Codename Nehalem
TOCK
New Micro-
architecture
Nehalem
45nm
TICK
Westmere
32nm
New Process Technology
Intel® Microarchitecture Codename Sandy Bridge
TOCK
Sandy Bridge
32nm
New Micro-
architecture
TICK
Ivy Bridge
22nm
New Process Technology
Intel® Microarchitecture Codename Haswell
TOCK
Haswell
22nm
New Micro-
architecture
TICK
Future
14nm
New Process Technology
-
2 2/15/12
PCI-GEN3
-
3 2/15/12
Storage Interconnect Roadmap - Serial Attached SCSI
-
4 2/15/12
Milliwatt/IOPS
-
5 2/15/12
5 >
One 2.5” SSD Provides I/O of Up to 27 HDDs
Enterprise SSD Ratio Enterprise 10K HDD
Random 80/20 BW (MB/s) >390 27X 14
I/O per Sec (4 KB) Ten of Thousands 150X Hundreds
Sequential Read BW (MB/s) >390 2.6X >150
Random I/O latency (Sec) 10-6 >1000 10-3
Active Power 8W 120% 8W
Typical Capacity 400 GB NA 600 GB