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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 20, NO. 2, MARCH 2005 425

On the Practical Design of a Sliding ModeVoltage Controlled Buck Converter

Siew-Chong Tan , Student Member, IEEE, Y. M. Lai , Member, IEEE, Martin K. H. Cheung, andChi K. Tse, Senior Member, IEEE

AbstractThis paper presents a simple and systematic approachto the design of a practical sliding mode voltage controller for buckconverters operating in continuous conduction mode. Various as-pects of the design, including the associated practical problems andthe proposed solutions, are detailed. A simple and easy-to-followdesign procedure is also described. Experimental results are pre-sented to illustrate the design procedure.

Index TermsBuck converter, continuous conduction mode,hysteresis band, sliding mode control, variable structure system.

I. INTRODUCTION

SLIDING mode (SM) controllers were introduced initially

for variable structure systems (VSS) [1][4]. Characterized

by switching, dc/dc converters are inherently variable structured

[5]. Therefore, it is appropriate to apply SM controllers to dc/dc

converters. This is especially true for buck converters operating

in the continuous conduction mode (CCM), which have measur-

able continuous controllable states (output voltage and its time

derivative) [5], [6].

Although well known for their stability and robustness toward

parameter, line, and load variations (ability to handle large tran-

sients), SM controllers are seldom used in power converters.

This is mainly due to the lack of understanding in its design

principle by power supply engineers [7], as well as the lack of a

systematic procedure in existing literature, which can be used to

develop such controllers. This can be attributed to the fact that

much of the work on the subject has been reported from the con-

trols viewpoint, rather than the circuits viewpoint. Hence, the

focus had been on the theoretical aspects of the control, while

the practical aspects of the implementation are still rarely dis-

cussed [5][13].

Consequently, many design issues pertaining to the im-

plementation of SM controlled converters have not been

sufficiently covered. One such issue is on the design and

constriction of the converters switching frequency. Althoughdifferent methods (hysteresis; constant sampling frequency;

constant on-time; constant switching frequency; and limited

maximum switching frequency) were proposed to limit the

switching frequency [14], they fall short of a set of systematic

design methods and implementation criteria.

Manuscript received August 22, 2003; revised July 30, 2004. This work wassupportedby a Grant provided by The Hong Kong Polytechnic University underProject G-T379. Recommended by Associate Editor P. Mattavelli.

The authors are with the Department of Electronic and Information Engi-neering, Hong Kong Polytechnic University, Hong Kong (e-mail: [email protected]).

Digital Object Identifier 10.1109/TPEL.2004.842977

Concurrently, there was also an alternative approach of

limiting the switching frequency, which is through the incor-

poration of a constant ramp function into the controller to

determine the switching of the converter [7], [15]. The main

advantage of this approach is that the switching frequency

is constant under all operating conditions, and it is easily

controllable through varying the ramp signal. Basically, there

are two methods of implementing this constant frequency

operation. The first method is to encode the ramp signal into

the discontinuous SM switching function of the controller [15].The advantage of this method is that it is straightforward and

simple to implement. However, this comes at an expense of

additional hardware circuitries, as well as deteriorated transient

response in the systems performance caused by the superpo-

sition of the ramp function upon the SM switching function.

The second method is to compare the continuous input signal

(commonly termed as ) generated from the SM equations

derived from the equivalent control method, with the ramp

waveform to create the switching operation [7]. Conceptually,

this is analogous to the way in which fixed switching frequency

is obtained in classical PWM control schemes whereby the

control signal is compared to the ramp waveform [16]. The

advantage of this method over the previous method is thatthere is no need for additional hardware circuitries since the

switching function is replaced by the PWM modulator and that

transient response is not deteriorated. However, the drawback

of this method is that the implementation of the equivalent

control law to obtain requires computations that are too

complicated to be implemented with analog controllers [8]. On

the other hand, even though possible, the implementation of

digital controllers on power converters is costly and unpopular.

Considering that these methods were introduced with the pri-

mary objective of suppressing high switching frequency [14],

their disadvantages probably outweigh their advantages since

this may easily be performed by controlling the hysteresis bandof the SM switching function.

Hence, one objective of this paper is to introduce a mathemat-

ical model for the hysteresis band method that was originally

proposed in [14], so that engineers may conveniently adopt it

for the implementation of the SM controller. Nevertheless, this

paper is still principally focused on introducing a simple ap-

proach that is easily applicable in the development of a sliding

mode voltage controlled (SMVC) buck converter, to bridge the

gap between the control principle and circuit implementation.

To present a complete exposition, mathematical derivations and

theoretical analyzes which extend from the work of [5] are firstly

performed. Moreover, the approach is presented in a manner

0885-8993/$20.00 2005 IEEE


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426 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 20, NO. 2, MARCH 2005

Fig. 1. Basic structure of an SMVC buck converter.

involving only a standard SMVC buck converter model and

some simple guided steps and design equations. This allows de-

signer to skip through laborious preliminary derivations when

performing the controllers design.

Section II details the theoretical derivation of an ideal SMVC

buck converter, the description of the problems associated withpractical implementation, and the proposed solutions to these

problems. Section III presents a standard converter model with

a simple design procedure. In Section IV, the experimental re-

sults under various operating conditions are given. These exper-

iments were conducted on a converter that was designed using

the proposed procedure. Finally, Section V gives the conclusion

to the paper.

II. THEORETICAL DERIVATION

This section covers the theoretical aspects of the SMVC con-

verter. Complete mathematical derivations of both the ideal andpractical converter designs are presented.

A. Mathematical Model of Buck Converter

To illustrate the underlying principle, the state space descrip-

tion of the buck converter under SM voltage control, where the

control parameters are the output voltage error and the voltage

error dynamics (in phase canonical form) [8], is first discussed.

Fig. 1 shows the schematic diagram of an SMVC buck con-

verter. Here, the voltage error and the voltage error dynamics

(or the rate of change of voltage error) under CCM, can be

expressed as

(1)

where , , are the capacitance, inductance, and load

resistance, respectively, , , and are the reference,

input, and sensed output voltage, respectively, 1 or 0 is the

switching state of power switch . Then, by differentiating

(1) with respect to time, the state space model can be obtained

as

(2)

The graphical representation of individual substructures of

the system with 1 and 0, for different starting

conditions, are shown in Fig. 2. It can be seen that when ,

the phase trajectory for any arbitrary starting position on the

phase plane will converge to the equilibrium point (

, 0) after some finite time period. Similarly, when

, all the trajectories converge to equilibrium point ( ,0). These characteristics will be exploited for the design of

the SM voltage controller.

B. Design of an Ideal SM Voltage Controller

In SM control, the controller employs a switching function

to decide its input states to the system [1]. For SM voltage con-

troller, the switching state can be determined from the control

parameters and using the switching function

(3)

where is the control parameter (termed as sliding coefficient)

to be designed; ; and . By enforcing

, a sliding line with gradient can be obtained. The pur-

pose of this sliding line is to serve as a boundary to split the

phase plane into two regions. Each of this region is specified

with a switching state to direct the phase trajectory toward the

sliding line. It is only when the phase trajectory reaches and

tracks the sliding line toward the origin that the system is con-

sidered to be stable, i.e., 0 and 0.

The specification of the switching state for each sector in the

case of a second order system like the buck converter can be

graphically performed by observing the behavior of the trajecto-

riesin Fig. 3, which is a combination of the two plots in Fig. 2. It

can be observed that if the phase trajectory is at any arbitrary po-sition above the sliding line ( 0), e.g., point , must

be employed so that the trajectory is directed toward the sliding

line. Conversely, when the phase trajectory is at any position

below sliding line, e.g., point , 0 must be employed for

the trajectory to be directed toward the sliding line. This forms

the basis for the control law

when

when(4)

Although abiding the hitting condition [5], which states that

the system trajectory must eventually reach the sliding line, the

control law in (4) only provides the general requirement thatthe trajectories will be driven toward the sliding line. However,

there is no assurance that the trajectorycan be maintained on this

line. To ensure that the trajectory is maintained on the sliding

line, the existence condition, which is derived from Lyapunovs

second method [17] to determine asymptotic stability, must be

obeyed [1], [6]

(5)

Thus, by substituting the time derivative of (3), the condition

for SM control to exist is

forfor

(6)


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TAN et al.: SLIDING MODE VOLTAGE CONTROLLED BUCK CONVERTER 427

(a) (b)

Fig. 2. Phase trajectories of the substructure corresponding to (a) u = 1 and (b) u = 0 for different starting ( x ; x ) positions.

Fig. 3. Phase trajectories of the substructure corresponding to both u = 1 and

u =

0 for different( x ; x )

starting positions.

where is an arbitrarily small positive quantity. Substituting (2)

and (4) into (6), the inequalities become

(7)

where

(8)

The above conditions are depicted in Fig. 4 for the two respec-

tive situations: (a) and (b) . In both fig-

ures,Region1 represents 0 andRegion2 represents 0.

SMwillonlyoccur onthe portion ofthesliding line, , that

covers both Regions 1 and 2. In this case, this portion is within

and , where is the intersection of 0 and 0; and

is the intersection of 0 and 0.Since the phase trajec-

tory will slide to the origin only when it touches 0 within, it will overshoot the sliding line if the trajectory landed

Fig. 4. Regions of existence of SM in phase plane: (a) > 1 = R C

and(b)


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respectively, a phase trajectory that moves away from the phase

plane origin and an that does not tend to zero.

C. Design of a Practical SM Voltage Controller

In this section, a practical SM voltage controller is consid-

ered. The sliding line defined in the previous section is rede-

fined to accommodate for hardware limitations. Additionally,a hysteresis band is introduced to the sliding line as a form of

frequency control to suppress high frequency switching. The re-

lationship of hysteresis band versus switching frequency of the

SMVC buck converter is derived.

1) Redefinition of Sliding Line: As previously mentioned,

SM controller requires the continuous assessment of the param-

eters and for its control. By substituting (1) and (9) into

(3), we have

(12)

where and . From the equation,the terms ( ) and are the feedback state variables

from the converter that should be amplified by gain coefficients

and respectively, before a summation is performed. This,

from a practical perspective, does generate a problem. Noting

that capacitance in power converters is usually in the micro-

farad ( ) range, its inverse term will be significantly higher

than and . Hence, the overall gain coefficients and

will become too high for practical implementation. If forcibly

implemented, the feedback signals may be driven into satura-

tion, thereby causing (12) to provide unreliable information for

the control.

In view of that, it is simpler to reconfigure the switching func-

tion to the following description:

(13)

where ; and . From (1) and

(9), we get

(14)

Thus, the practical implementation of becomes independent

of , thereby reducing the amplification of the feedback signals.

With this sliding line, the conditions for SM control to exist are

(15)

where

(16)

An interesting point here is that although there is modification tothe equations, the maximum existence region will still occur

Fig. 5. Phase trajectory for (a) ideal SM operation and (b) actual SM operationwith chattering.

at . In addition, the response time is still maintained

at .

2) Introduction of Hysteresis Band: Ideally, a converter will

switch at infinite frequency with its phase trajectory moving on

the sliding line when it enters SM operation [see Fig. 5(a)].

However, in the presence of switching imperfections, such as

switching time constant and time delay, this is not possible. The

discontinuity in the feedback control will produce a particular

dynamic behavior in the vicinity of the surface trajectory known

as chattering [see Fig. 5(b)] [1][4].

If the chattering is left uncontrolled, the converter system

will become self-oscillating at a very high switching frequency

corresponding to the chattering dynamics. This is undesirable

as high switching frequency will result in excessive switching

losses, inductor and transformer core losses, and EMI noise is-

sues [18]. Hence, most PWM power supplies are designed to op-

erate with switching frequencies between 40 kHz and 200 kHz

[18]. Furthermore, since chattering is introduced by the imper-

fection of controller ICs, gate driver, and power switches, it is

difficult to predict the exact switching frequency. Hence, the de-

sign of the converter and the selection of the components will

be difficult.To solve these problems, the control law in (4) is rede fined as

when

when(17)

where is an arbitrarily small value. The reason for introducing

a hysteresis band with the boundary conditions and

is to provide a form of control to the switching frequency of

the converter. This is a method commonly employed to alleviate

the chattering effect of SM control [17]. With this modification,

the operation is altered such that if the parameters of the statevariables are such that , switch of buck converter

will turn on. Conversely, it will turn off when . In the

region , remains in its previous state. Thus, by

introducing a region where no switching occurs,

the maximum switching frequency of the SM controller can be

controlled. This alleviates the effect of chattering. Additionally,

it is now possible to control the frequency of the operation by

varying the magnitude of .

3) Calculation of Switching Frequency: To control the

switching frequency of the converter, the relationship between

the hysteresis band, , and switching frequency, , must be

known.

Fig. 6 shows the magnified view of the phase trajectory whenit is operating in SM. and are the vectors of state variable


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Fig. 6. Magnified view of the phase trajectory in SM operation.

velocity for and , respectively. It was previously

derived in [2] that

(18)

where is the time taken for vector to move from position

to ; and is the time taken for vector to move from

position to . By substituting in (18)

(19)

where

for

for

we have

(20)

Further substitution of (15) into (20) results in

(21)

Therefore, the time period for one cycle in which the phase tra-

jectory moves from position to is equivalent to (22) shown

at the bottom of the page. Since the cycle is repeated (cyclic)

throughout the SM steady-state operation, the frequency of the

converter when it is operating in SM can be expressed as (23)

shown at the bottom of the page. Using , the above

equation becomes

(24)

Considering that and are nonconstant parameters con-

sisting of respectively dc signals of and and time varying

perturbations of and , we can resolve (24) into

(25)

using small-signal approximation where

(26)

(27)

with representing the steady-state (nominal cyclic) switching

frequency and representing the ac varying (perturbed) fre-

quency of the converter. This indicates that if there are

significantly small variations in the input and output voltages,

i.e., and , the converter will be operating

at a steady-state switching frequency of with very little ac

frequency perturbation, i.e., . Since only the nom-

inal steady-state operating conditions are considered in the

controllers design, only (26) is required when it comes to the

design of the steady-state switching frequency of the converter.

III. STANDARD DESIGN PROCEDURE

A standard SMVC buck converter module is proposed in this

section, along with a step by step design procedure for practical

implementation. A design example is provided for illustration.

A. Standard SMVC Converter Model

Fig. 7 shows the proposed SMVC buck converter. The SM

controller comprises basically a differential amplifier circuit

V; a voltage follower circuit ; a difference amplifier circuit

; and a noninverting Schmitt Trigger circuit . Similar to

(22)

(23)


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Fig. 7. Standard SMVC buck converter.

TABLE ISPECIFICATIONS OF BUCK CONVERTER

conventional schemes, the feedback sensing network for is

provided by the voltage divider circuit, and . Addition-

ally, a low resistance current transformer is placed in series

with the filter capacitor to obtain the capacitor current, .

B. Design Steps

The design of the buck converter is well covered in the lit-

erature [18][20]. Our discussion here starts with the assump-

tion that the converters parameters are known and are given in

Table I.

These parameters are calculated on the basis that the con-

verter is to be operated in CCM for 13 V to 30 V and

0.5 A to 4 A. The maximum peak to peak ripple voltageis 50 mV.

1) Step 1: The current sensing gain, , is set at a value such

that the measured capacitor current, is equal to the ac-

tual capacitor current, .

2) Step 2: Setting reference voltage 3.3 V, is cal-

culated using the expression

(28)

Also, and are related by

(29)

Fig. 8. Calculated

values for inductances of 50 H

, 100 H

, 110.23 H

(actual inductance), and 150 H

at switching frequencies of up to 300 kHz.

Choosing as 870 , we get .

3) Step 3: From (14), the gain required for the amplification

of the signal ( ) is . Hence, V and V are

related by

V V (30)

Choosing V , we get V . Additionally,

the resistors, , for the difference amplifier circuit: , are

chosen as 10 k .

4) Step 4: The parameter of the hysteresis band, , can be

obtained from the re-arranged form of (26), i.e.,

(31)

where , , and are the nominal parameters of the con-

verter. A plot giving the calculated values for different induc-

tances and switching frequencies is shown in Fig. 8.

The actual inductance, , used in the design is 110.23 .

It should be noted that for CCM. Thus, substituting

into (31), is calculated as 0.136.1

5) Step 5: The setting of for the hysteresis band can be per-

formed by adjusting the ratio of and of , using anequation derived from the mathematical description of a nonin-

verting Schmitt Trigger (38), i.e.,

(32)

where and are respectively the positive and nega-

tive voltage supplies to Schmitt Trigger . Choosing as

110 , resistor is set as 12 .

1The presence of hysteresis band in switching function introduces an errorin the output voltage. It is important to limit the hysteresis band

to a smallvalue to minimize this error. On the other hand, if

is too small, it may be very

sensitive to change of

(i.e., highd f = d

). A good value is to set

in the range0 : 1 0 : 2 . Otherwise, a different inductance may be used to keep withinthe range.


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Fig. 9. Full schematic diagram of the SMVC buck converter prototype.

Fig. 10. Calculated, simulated, and experimentally measured averageswitching frequencies f at nominal operating condition V = 2 4 V and

R = 6

for different hysteresis band

settings.

IV. EXPERIMENTAL RESULTS

This section evaluates the performance of the SMVC buck

converter that is designed using the procedure described inSection III. The full schematic diagram of the experimental

prototype is shown in Fig. 9.

A. Verification of Design Equation

Fig. 10 shows the graphs of the converters average switching

frequency for different values at nominal operating condi-

tion V and , that are obtained from calcu-

lation, simulation, and experiment. Specifically, the calculation

is performed using the proposed design (26) and the simulation

is carried out in Matlab/Simulink using the circuit expression

of the proposed controller. Basically, the simulation and experi-

mental data are in good agreement with the calculated data. Thesmall discrepancy between the experimental data and both the

calculated and simulated data is mainly due to component tol-

erances and finite time delay of practical circuitries. In practical

development, fine tuning of is still required to achieve the de-

sired .

Fig. 11 shows the graphs of the measured average switching

frequency and average output voltage against for load

resistances 3, 6, and 12 . From the figure, is notablyhigher with lower , and is lower with lower . Addi-

tionally, a major point to highlight is that at low , i.e., high

switching frequency, the voltage regulation is tighter and more

accurate. In our design, by setting 0.1 0.2 in the design,

we limit the voltage accuracy within 0.12 V (i.e., of

) error.

B. Steady-State Performance

Our experiment hereafter uses a controller that is fine-tuned

to a switching frequency of 200 kHz by replacing with a

16 k resistor, thereby setting 0.1.

Fig. 12 shows an example of the output voltage ripple, in-

ductor current, and switching state waveforms of the SMVC

buck converter at steady-state operation. Performing to design

expectation, the converter operates at an average switching fre-

quency of 199 kHz, with smallfrequency fluctuations, and

the output voltage ripple (without considering the ringing

oscillation) is around 10 mV (i.e., of ), under the

nominal operating condition 24 V and .

C. Load Variation

Fig. 13 gives the experimentally measured and for load

resistance . It can be concluded that voltage

regulation of the converter is robust to load variation, with only

a 0.37 V deviation (i.e., 3.1% of ) in for

the entire load range, i.e., load regulation averages

at 0.04 V . Additionally, the experimental readings also indi-

cate that there is a change of switching frequency when the load

vary. From the figure, the variation of switching frequency with

respect to load resistance averages at .

Theoretically, the nonlinear expression of can be ob-

tained by differentiating (23) with respect to , i.e.,

(33)

D. Line Variation

The experimentally measured and for input voltage

range V 30 V are plotted in Fig. 14. It can be

observed that both and increase with increasing .

Specifically, output voltage deviation is 0.14 V (i.e., 1.2% of

) for the entire input range, i.e., line regulation

averages at 8.235 mV/V. The variation of switching

frequency with respect to input voltage averages

at 10.176 kHz/V. Theoretically, the nonlinear expression of

can be obtained by differentiating (24) with respect to

, i.e.,

(34)


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Fig. 11. (a) Experimentally measured average switching frequencyf

and (b) average output voltageV

atV = 2 4

V andR =

3, 6, and 12

for different

hysteresis band settings.

Fig. 12. Waveforms ofV

,i

, andu

at steady-state operation under nominal

operating conditions V = 24 V and R = 6 .

Fig. 15 shows the output voltage ripple waveform of the con-

verter operating at nominal load when is sinusoidally varied

from 17.5 V to 29.0 V at a frequency of 100 Hz. This was per-formed to test the robustness of the converter to a slowly varying

input voltage. It is found that the maximum peak to peak output

voltage is around 235 mV, i.e., the input voltage ripple rejection

is 33.8 dB at 100 Hz. The converter has displayed adequate

control performance against audio susceptibility.

E. Variation

The dynamic behavior of the converter corresponding to dif-

ferent sliding coefficients is also investigated. Fig. 16(a)(f)

show the output waveforms of the operation with load resis-

tance that alternates between and

for the controller with sliding coefficients: (a) ,(b) , (c) , (d) , (e)

Fig. 13. Experimentally measured values of average switching frequency fand average output voltage V for different load resistance R .

, and (f) , respectively. The re-

sults are summarized in Table II.

Noticeably, as increases, the dynamic response of the con-

verter improves with shorter settling time and lower overshoots.This is in good agreement with our theory that dynamic response

improves with increasing . However, when is too high, the

converter is unstable [see Fig. 16(f)]. This is due to the distor-

tion of the control signal caused by the saturation of amplified

feedback signal [refer to the discussion related to (12)].

Fig. 17(a)(f) show the output waveforms of the startup oper-

ation for the controller with the same set of sliding coefficients.

The purpose is to examine the oscillatory behavior of the re-

sponse due to , which exercises direct influence on the exis-

tence region in the control. Consistent with theory, the degree

of oscillation increases with the increasing . Since the magni-

tude of the oscillations will be high for heavy loads, the effect

of oscillation due to should be taken into consideration whendesigning high power converters.


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Fig. 14. Experimentally measured values of average switching frequency fand average output voltage V for different input voltage V .

Fig. 15. Waveforms of V and V under the operating condition whereby V issinusoidally varied from 17.5 V to 29 V at a frequency of 100 Hz, and R =6 .

F. ESR Variation

The converter is also subjected to an ESR variation test.

The idea is to investigate the effect of the output capacitors

ESR on the switching behavior of the converter. Fig. 18(a)(c)

illustrates the experimental waveforms of the converter withthe same output capacitance, for different ESR values (25 ,

125 , and 225 ), operating under nominal load condi-

tions 24 V and . As expected, output voltage

ripples are higher with larger values of ESR. However, the

variation of ESR does not influence the behavior of capacitor

current. In all cases, the peak-to-peak capacitor current remains

at 0.36 A, while the average switching frequency is at around

200 kHz. Hence, it is evident that output capacitors ESR has

little influence on the switching frequency.

V. FURTHER DISCUSSION

This section discusses the merits and drawbacks of the pro-posed standard SMVC converter as compared to conventional

current mode and voltage mode converters. Suggestions to alle-

viate the various drawbacks are also provided.

A. Advantages

The main advantage of the SMVC converter is the simplicity

in the controllers design and implementation. Unlike conven-

tional current mode and voltage mode controllers which requirespecial techniques (e.g., pole placement method) to estimate

their controllers gain parameters, the SM voltage controllers

parameters can be precisely calculated from simple mathemat-

ical equations.

Furthermore, since the SMVC controller is designed from the

large-signal converter model, it is stable and robust to large pa-

rameter, line, and load variations. This is also a major advantage

over conventional current mode and voltage mode controllers

which often fail to perform satisfactorily under parameter or

large load variations because they are designed from the lin-

earized small-signal converter models [21].

B. Disadvantages

One major disadvantage of the proposed SMVC converter is

that it has a nonzero steady-state voltage error. This is due to

the adoption of the phase canonical form in the design, which

makes the controller a proportional-derivative (PD) type of feed-

back controller [21], and the presence of hysteresis band in the

switching function, which being nonzero in its average value

also introduces an error in the output voltage [5].

Another disadvantage of the proposed converter is that its

steady-state switching frequency is affected by the line and load

variations (refer to Figs. 13 and 14). For line variation, this

can be understood from (26) where with preset design param-

eters , , and , a deviation in the input supply, , will re-

sult in a change in the steady-state dc switching frequency, .

Specifically, increases as increases. For load variation,

the change in switching frequency is caused by two compo-

nents. First, it is due to the imperfect feedback loop that causes

a small steady-state error in the output voltage which in turn

causes small deviation of the switching frequency from its nom-

inal value [see (26)]. Second, it is due to the mismatch be-

tween the nominal load and operating the load. This can be un-

derstood from (23) where with preset control parameter

for a certain nominal load , a change inoperating load from its nominal value will lead to a fre-

quency not given by (24).

C. Possible Solutions

The steady-state voltage error can easily be eliminated by

converting the controller into a PID-type through the introduc-

tion of an integrator to process the voltage error signal [5], [15].

Such controllers are well-known and will not be discussed in

this paper.

One possible method of maintaining the switching frequency

against line variation is by introducing an adaptive feed-for-

ward hysteresis band control that varies the hysteresis bandwith the change of . Practically, this can easily be performed


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Fig. 16. Experimental waveforms of output voltage ripple V and inductor current i under step load change that alternates between R = 1 2 and R = 3 for controller with sliding coefficients (a) = 0 : 5 = R C , (b) = 1 = R C , (c) = 2 = R C , (d) = 1 0 = R C , (e) = 1 0 0 = R C , and (f) = 5 0 0 = R C .

by imposing a variable power supply, and , which

changes with variation, to power the Schmitt Trigger circuit

[see (40)].

An adaptive feedback controller that varies the parameter,

, with the change of load , can be incorporated to main-

tain the switching frequency of the converter against load vari-

ation. The idea is to adaptively maintain the operating status

at for all load conditions. Such system has been

proposed in [22] to improve systems performances. Here, itis suggested as a means to also maintain the validity of (24) so

that becomes independent of . Hence, the effect of fre-

quency variation caused by the mismatch between the nominal

and the operating load is eliminated. Additionally, with better

regulated steady-state output voltage with the adaptive feed-

back control scheme [22], the issue of switching frequency

deviation due to the variation of the output voltage is also

alleviated.

Details of the design and derivation of such adaptive feed-

forward and feedback control schemes will be addressed in thesubsequent paper.


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TABLE IIDYNAMIC BEHAVIOR OF THE EXPERIMENTAL SMVC CONVERTER FOR DIFFERENT SETTINGS UNDER STEP LOAD CHANGE

Fig. 17. Experimental waveforms of output voltage V and inductor current i under nominal operating conditions V = 2 4 V and R = 3 for controller withsliding coefficient (a) = 0 : 5 = R C , (b) = 1 = R C , (c) = 2 = R C , (d) = 1 0 = R C , (e) = 1 0 0 = R C , and (f) = 5 0 0 = R C during startup.

Fig. 18. Experimental waveforms of output voltage rippleV

, capacitor currenti

, and the generated gate pulseu

for SMVC converter with 100 F filter

capacitor of (a) E S R = 2 5 m ; (b) E S R = 1 2 5 m ; and (c) E S R = 2 2 5 m , at constant load resistance R = 6 .

VI. CONCLUSION

A detailed analysis of the design principle of a SMVC buck

converter is presented. The discussion takes into consideration

the practical aspects of the converter. The sliding line for an ideal

controller is redefined to meet practical limitations. A hysteresisband is introduced to the sliding line to the solve the problem

of chattering. The relationship between the hysteresis band and

the switching frequency is derived. To facilitate implementation,

a standard SM converter module is introduced. Design guide-

lines are provided in a simple step by step manner. The exper-

imental results are presented to verify the converter design andprocedure.


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APPENDIX I

DERIVATION OF SMALL-SIGNAL MODEL OF SWITCHING

FREQUENCY RELATIONSHIP WITH HYSTERESIS BAND

The variables , , and from (24) are first separated into

their steady-state and small-signal terms

(35)

Substituting (35) into (24), we have

(36)

Since the output voltage ripple is very small, i.e., is verysmall, the cross term of can be neglected. Hence (36)

becomes

(37)

From (37), the steady-state equation and the small-signal equa-

tion can be obtained as given in (26) and (27).

APPENDIX II

DERIVATION OF VARIABLE POWER SUPPLY DESCRIPTION

FOR SCHMITT TRIGGER IN FEEDFORWARDHYSTERESIS BAND CONTROL

The description of a noninverting Schmitt Trigger is ex-

pressed as

(38)

Substituting this into (31), we have

(39)

Considering that both and must be balanced when

powering the Schmitt Trigger, the power supply description

should be

(40)

REFERENCES

[1] V. Utkin, J. Guldner, and J. X. Shi, Sliding Mode Control in Electro-

mechanical Systems. London, U.K.: Taylor and Francis, 1999.[2] V. Utkin, Sliding Modes in Control Optimization. Berlin, Germany:Springer-Verlag, 1992.

[3] C. Edwards and S. K. Spurgeron, Sliding Mode Control: Theory andApplications. London, U.K.: Taylor and Francis, 1998.

[4] W. Perruquetti and J. P. Barbot, Sliding Mode Control in Engi-neering. New York: Marcel Dekker, 2002.

[5] G. Spiazzi and P. Mattavelli, Sliding-mode control of switched-modepower supplies, in The Power Electronics Handbook. Boca Raton,FL: CRC Press LLC, 2002, ch. 8.

[6] R. Venkataramanan,A. Sabanoivc, andS. Cuk, Sliding mode controlof

dc-to-dc converters, in Proc. IEEE Conf.IndustrialElectronics, ControlInstrumentations (IECON), 1985, pp. 251258.[7] V. M. Nguyen and C. Q.Lee, Indirect implementations of sliding-mode

control law in buck-type converters, in Proc. IEEE AppliedPower Elec-tronics Conf. Expo (APEC), vol. 1, Mar. 1996, pp. 111115.

[8] , Tracking control of buck converter using sliding-mode withadaptive hysteresis, in Proc. IEEE Power Electronics Specialists Conf.(PESC), vol. 2, Jun. 1995, pp. 10861093.

[9] S. K. Mazumder, A. H. Nayfeh, and A. Borojevic, Robust control ofparallel dc-dc buck converters by combining integral-variable-structureand multiple-sliding-surfacecontrol schemes,IEEE Trans. Power Elec-tron., vol. 17, no. 3, pp. 428 437, May 2002.

[10] J. Mahdavi, A. Emadi, and H. A. Toliyat, Application of state spaceaveraging method to sliding mode control of pwm dc/dc converters, inProc. IEEE Conf. Industry Applications Society (IAS), vol. 2, Oct 1997,pp. 820827.

[11] L. Martinez-Salamero, J. Calvente, R. Giral, A. Poveda, and E. Fossas,

Analysis of a bidirectional coupled-inductor Cuk converter operating insliding mode, IEEE Trans. Circuits Syst. I, vol. 45, no. 4, pp. 355363,Apr. 1998.

[12] H. Sira-Ramirez, Sliding motionsin bilinear switched networks,IEEETrans. Circuits Syst., vol. 34, no. 8, pp. 919933, Aug. 1987.

[13] H. Sira-Ramirez andM. Rios-Bolivar, Slidingmode control of dc-to-dcpower converters via extended linearization, IEEE Trans. Circuits Syst.

I, vol. 41, no. 10, pp. 652 661, Oct 1994.[14] B. J. Cardoso, A. F. Moreira, B. R. Menezes, and P. C. Cortizo, Anal-

ysis of switching frequency reduction methods applied to sliding modecontrolled dc-dc converters, in Proc. IEEE Applied Power ElectronicsConf. Expo (APEC), Feb. 1992, pp. 403410.

[15] P. Mattavelli, L. Rossetto, G. Spiazzi, and P. Tenti, General-purposesliding-mode controller for dc/dc converter applications, in Proc. IEEEPower Electronics Specialists Conf. (PESC), Jun. 1993, pp. 609615.

[16] D. M. Mitchell,DC-DCSwitchingRegulatorAnalysis. New York:Mc-Graw-Hill, 1998.

[17] J. J. E. Slotine and W. Li, Sliding control, in Applied Nonlinear Con-trol. Englewood Cliffs, NJ: Prentice -Hall, 1991, ch. 7.

[18] H. W. Whittington, B. W. Flynn, and D. E. Macpherson, Switched Mode

Power Supplies : Design and Construction, 2nd ed. New York: Wiley,1997.

[19] E. Rogers, Understanding buck power stages in switch mode powersupplies, in Mixed Signal Products: Texas Instruments, 1999.

[20] K. H. Billings, Switchmode Power Supply Handbook, 2nd ed. New

York: McGraw-Hill, 1999.[21] V. S. C. Raviraj and P. C. Sen, Comparative study of proportional-in-

tegral, sliding mode, and fuzzy logic controllers for power converters,IEEE Trans. Ind. Applicat., vol. 33, no. 2, pp. 518524, Mar./Apr. 1997.

[22] S. C. Tan, Y. M. Lai, M. K. H. Cheung, and C. K. Tse, An adaptivesliding mode controller for buck converter in continuous conductionmode, in Proc. IEEE Applied Power Electronics Conf. Expo (APEC),Feb. 2004, pp. 13951400.

Siew-Chong Tan (S00) received the B.Eng. (withhonors) and M.Eng. degrees in electrical and com-puter engineering from the National University ofSingapore, Singapore, in 2000 and 2002, respec-tively, and is currently pursuing the Ph.D. degree atHong Kong Polytechnic University, Hong Kong.

His research interests include motor drives andpower electronics.


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Y. M. Lai (M92) received the B.Eng. degree inelectrical engineering from the University of WesternAustralia, Perth, Australia, in 1983, the M.Eng.Sc.degree in electrical engineering from University ofSydney, Sydney, Australia, in 1986, and the Ph.D.degree from Brunel University, London, U.K., in1997.

He is an AssistantProfessorwith Hong Kong Poly-

technic University, Hong Kong, and his research in-terests include computer-aided design of power elec-tronics and nonlinear dynamics.

Martin K. H. Cheung received the B.Eng. (withhonors) degree and the M.Phil. degree in electronicengineering from the Hong Kong Polytechnic Uni-versity, Hong Kong, in 2000 and 2003, respectively.

He is currently a Project Assistant in the Depart-ment of Electronic and Information Engineering,

Hong Kong Polytechnic University. His mainresearch interests include RF circuit design and

switch-mode power supplies design.

Chi K.Tse (M90SM97)receivedthe B.Eng. (withfirstclasshonors) degreein electrical engineering andthe Ph.D. degree from the University of Melbourne,Australia, in 1987 and 1991, respectively.

He is presently a Professor with Hong KongPolytechnic University, Hong Kong, and his researchinterests include nonlinear systems and power elec-tronics. He is the author of Linear Circuit Analysis

(London, U.K.: Addison-Wesley 1998) and Complex Behavior of Switching Power Converters (BocaRaton: CRC Press 2003), coauthor of Chaos-Based

Digital Communication Systems (Heidelberg, Germany: Springer-Verlag,2003), and co-holder of a U.S. patent. He is an Associate Editor for the

International Journal of Systems Science. Since 2002, he has been appointed asGuest Professor by the Southwest China Normal University, Chongqing, China.

Dr. Tse received the L.R. East Prize from the Institution of Engineers, Aus-tralia, in 1987, the IEEE TRANSACTIONS ON POWER ELECTRONICS Prize PaperAward in 2001, the Presidents Award for Achievement in Research (twice), andthe Facultys Best Researcher Award. He was an Associate Editor for the IEEETRANSACTIONS ON CIRCUITS AND SYSTEMS PART IFUNDAMENTAL THEORYAND APPLICATIONS, from 1999 to 2001, and since 1999, he has been an Asso-ciate Editor for the IEEE TRANSACTIONS ON POWER ELECTRONICS.

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