Three-phase multi-pulse converter StatCom analysis
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Transcript of Three-phase multi-pulse converter StatCom analysis
Three-phase multi-pulse converter StatCom analysis
Ricardo Davalos M., Juan M. Ramırez*, Ruben Tapia O.
CINVESTAV-I.P.N.-Unidad Guadalajara, Guadalajara, Jal., C.P. 45090, Mexico
Received 21 February 2002; accepted 11 August 2004
Abstract
This paper is aimed to present the analysis of operating characteristics of the static synchronous compensator (Statcom) based on a multi-
pulse voltage-source inverter (VSI). A detailed analysis of voltages and currents on both 6- and 12-pulses is presented and equations
describing the performance of each circuit are derived. Finally a comparison between digital simulations using the EMTDC/PSCAD and
analytical results is shown, verifying the validity of the derived expressions. The device is now being implemented in the laboratory, based on
IGBT’s.
q 2004 Elsevier Ltd. All rights reserved.
Keywords: FACTS; StatCom; VSI
1. Introduction
In recent years, voltage stability and control are
increasingly becoming a limiting factor in the power
systems planning and operation, mainly in longitudinal
ones. However, a variety of factors constrain the construc-
tion of new transmission lines. This has been reflected in the
necessity of maximizing the use of existing transmission
facilities. On steady state, bus voltages must be controlled
within a short interval. A suitable voltage and reactive
power control allows to get important benefits in the power
systems operation such as the reduction of voltage
gradients, the efficient transmission capacity’s utilization
and the increase of stability margins. By different control
means and operating techniques the voltage control task in
transmission levels can be got. Some solution technologies
can involve a series voltage injection, or a shunt reactive
current injection in strategic sites of the power system.
When a disturbance occurs, changes in the voltage system
are presented and its restoration to the reference values
0142-0615/$ - see front matter q 2004 Elsevier Ltd. All rights reserved.
doi:10.1016/j.ijepes.2004.08.007
* Corresponding author. Address: Priv. Josefa Ortiz de Dominguez 101,
Col. Emiliano Zapata, 64390 Monterrey, NL, Mexico. Fax: C52 3 684
1580.
E-mail addresses: [email protected] (Ricardo D.M.), jramir-
[email protected] (J.M. Ramırez), [email protected] (Ruben
T.O.).
depends on the dynamic response of the excitation systems
and the employed control devices.
In the last decade commercial availability of Gate Turn-
Off thyristor devices (GTO) with high power handling
capabilities, and the advancement of other types of power-
semiconductor devices have led to the development of
controllable reactive power sources utilizing electronic
switching converter technology [1]. Additionally, these
technologies offer considerable advantages over the existing
ones in terms of space reductions and performance. The
GTOs enable the design of a solid-state shunt reactive
compensation equipment based upon switching converter
technology. This concept is used to create a flexible shunt
reactive compensation device named Static Synchronous
Compensator (StatCom) due to its operating characteristics
similar to that of a synchronous compensator although
without the mechanical inertia.
The advent of Flexible AC Transmission Systems
(FACTS) is giving rise to a new family of power electronic
equipment emerging for controlling and optimizing the
performance of power system, e.g. StatCom, SSSC and
UPFC. The use of voltage-source inverter (VSI) has been
widely accepted as the next generation of reactive power
controllers of power system to replace the conventional
VAR compensation, such as a thyristor-switched capacitor
(TSC) and thyristor controlled reactors (TCR).
Electrical Power and Energy Systems 27 (2005) 39–51
www.elsevier.com/locate/ijepes
Ricardo D.M. et al. / Electrical Power and Energy Systems 27 (2005) 39–5140
Some researchers are aiming their efforts to apply
FACTS in different ways to enhance the power systems
operation. The major applications are: voltage stability
enhancement, damping torsional oscillations, power system
voltage control, and power system stability improvement.
These applications can be implemented with a suitable
control (voltage magnitude and phase angle control) [2–4].
The StatCom basically consists of a step-down transfor-
mer with a leakage reactance, a three-phase GTO and
PWM-based voltage source inverter (VSI) or current source
inverter (CSI), and a DC capacitor. The AC voltage
difference across the leakage reactance produces reactive
power exchange between the StatCom and the power
system, such that the AC voltage at the bus bar can be
regulated so as to improve the voltage profile of the power
system, which is the primary duty of the StatCom. However,
for instance, a secondary damping function can be added
into the StatCom for enhancing power system oscillation
stability [4].
The basic principle of StatCom operation is as follows.
The VSI generates a controllable AC voltage source behind
the leakage reactance. This voltage is compared with the AC
bus voltage system; when the AC bus voltage magnitude is
above that of the VSI voltage magnitude, the AC system sees
the StatCom as an inductance connected to its terminals.
Otherwise, if the VSI voltage magnitude is above that of the
AC bus voltage magnitude, the AC system sees the StatCom
as a capacitance connected to its terminals. If the voltage
magnitudes are equal, the reactive power exchange is zero. If
the StatCom has a DC source or energy storage device on its
DC side, it can supply/absorb real power to/from power
system. This can be achieved adjusting the phase angle of the
StatCom’s terminals and the phase angle of the AC power
system. When the phase angle of the AC power system leads
Fig. 1. Six-pulse VSI w
the VSI phase angle, the StatCom absorbs active power from
the AC system; if the phase angle of the AC power system
lags the VSI phase angle, the StatCom supplies active power
to AC system [5–7].
In this paper, an analysis of the major characteristics and
basic operation principles of StatCom are carried out and is
organized as follows. Sections 2 and 3 present a detailed
signal analysis on a six-pulse VSI, including AC and DC
currents and voltages. Simulations are carried out employ-
ing the derived expressions. Section 4 exhibits the detailed
analysis on a 12-pulse StatCom. Section 5 verifies the
analysis through PSCAD/EMTDC simulations.
2. DC–AC voltage analysis
The major aim of a VSI is to generate an AC voltage
from a DC one; that is because of it is often referred to as a
DC–AC converter or inverter. It is able to generate a
symmetric AC voltage with a desired magnitude and
frequency, which can be fixed or varied according to the
application. The voltage-source inverter is the building
block of a StatCom and other FACTS devices such as the
SSSC and the UPFC.
The three-phase basic configuration is called six-pulse
inverter, consisting of six asymmetric turn-off devices, such
as a GTO or IGBT, with reverse-parallel diodes connected as
a six-pulse Graetz bridge [6] (Fig. 1). The applied transistors’
firing control signals gi is controlled in such a way that each
one conducts during 1808 when the inverter is connected to a
resistive load. The inverter can be seen as set up by three
single-phase inverters, where each phase produces a voltage
output phase-shifted by G1208 with respect to the other two
legs outputs. The firing control signals are shifted by 608 from
ith Y-connected.
Fig. 2. Phase-to-phase vab(t) and phase-to-neutral van(t) voltage waveforms.
Ricardo D.M. et al. / Electrical Power and Energy Systems 27 (2005) 39–51 41
each other. The phase-to-phase voltage vab(t) and the phase-
to-neutral van(t) are depicted in Fig. 2; it is noticed that the
phase-to-phase voltage has 1208 pulse widths with peak
voltage magnitude VDC.
Carrying out Fourier’s analysis to the waveforms of
Fig. 2, the harmonic content of voltages vab(t) and van(t) are
attained. The instantaneous values of vab(t) and van(t) based
on such analysis are given by,
vabðtÞ ZXN
mZ1
Vabmsin mut C
p
6m
� �(1)
vanðtÞ ZXN
mZ1
VanmsinðmutÞ (2)
where
T Z 2p; VabmZ
4
mpVDC cos
p
6m
� �;
VanmZ
4
3mpVDC cos
p
3m
� �C1
� �cm Z 6rG1;
r Z 0; 1; 2;.
Fig. 3 shows that the index harmonic terms are mZ6rG1,
r being any positive integer; that is, mZ1, 5, 7, 11, 13..
Voltages vbc(t), vbn(t), vca(t), vcn(t), exhibit a similar pattern,
except phase shifted by 120 and 2408, respectively. Thus
vabðtÞ Z4
pVDC
XN
m
1
mcos
p
6m
� �sin mut C
p
6m
� �(3)
vanðtÞ Z4
3pVDC
XN
m
1
mcos
p
3m
� �C1
� �sinðmutÞ (4)
It is worth noting that the fundamental component and
the harmonic components of the phase-to-phase voltages
and the phase-to-neutral voltages are phase-shifted by
308 from each other. The amplitude of the phase-to-
phase voltages isffiffiffi3
ptimes the phase-to-neutral ones; the
harmonic components not included within the set
mZ12rG1, are in phase opposition. This is emphasized
by the following expression
VabmZ ðK1Þr
ffiffiffi3
pVanm
(5)
where mZ6rG1 and rZ0, 1, 2,..
If the VSI of Fig. 1 is resistively loaded (a unitary power
factor) the diodes do not conduct at any time, but if the load
is inductive, the transistors’ conduction period would be
between 90 and 1808, and that of the diodes is between 0 and
908. For a pure reactive load (zero power factor) the
transistors’ and diodes’ conduction period is 908.
Fig. 3. vab(t) harmonic content.
Ricardo D.M. et al. / Electrical Power and Energy Systems 27 (2005) 39–5142
3. Basic VSI StatCom
The static compensators are devices with the ability to
both generate and absorb reactive and active power, though
the most common applications are in reactive power
exchange between the AC system and the compensator.
The static synchronous compensator (StatCom) based on
six-pulse VSI is the basic building block of a high power
static VAR compensator. Hence, it exhibits a high harmonic
content; that is, in high power applications the six-pulse
configuration does not have an appropriate performance.
The reactive power exchange between the AC system
and the StatCom is controlled varying the magnitude of the
fundamental component of the inverter voltage above and
below that of the AC system; this is achieved by small
variations in the switching angle of the semiconductor
devices. When the voltage’s fundamental component
produced by the inverter is forced to lag or lead the AC
system voltage by a few degrees, an active power may flow
into or out of the inverter modifying the DC capacitor
voltage value. Otherwise, if the compensator supplies only
reactive power, the active power provided by the capacitor
is zero, therefore the DC capacitor does not modify its
voltage. One could say then that the capacitor plays not any
role in the active power generation [5–8].
Fig. 4. Phase relationship between the inductor voltage VL and the
fundamental current Ia1.
3.1. AC current signals
The current flow between the compensator and the AC
system is determined by the voltage across the tie inductor
L. Let the AC bus voltage be a pure sinusoidal signal,
vANðtÞZVm sinðutÞ; from Eq. (2) the fundamental voltage’s
compensator is vanðtÞZ0:6366VDC sinðutÞ, then the magni-
tude of the fundamental and harmonics current components
are given by equations below:
Ia1Z
Vm K0:6366 VDC
uL(6)
IanZ
0:6366VDC
n2uL; cnO1 (7)
The fundamental current will be leading when
Vm!0.6366VDC; that is, if the amplitude of the inverter
voltage is increased above that of the AC bus (the current
flows from the converter into the AC system); in this case
the compensator is seen as a capacitor by the AC bus
(Fig. 4). The fundamental current will be lagging when
VmO0.6366VDC; that is, if the amplitude of the inverter
voltage is decreased below that of the AC bus (the current
flows from the AC system into the compensator); in this
Fig. 5. AC current waveform, ia(t).
Ricardo D.M. et al. / Electrical Power and Energy Systems 27 (2005) 39–51 43
case the compensator is seen as an inductor by the AC
bus. The equation that describes the AC current ia(t) is
derived taking into account the voltage across the tie
inductor over each 608 conduction period (Fig. 5). The
another two phase currents, ib(t) and ic(t), will be
identical to ia(t), except phase-shifted by 120 and 2408,
respectively. At any time, vLðtÞZL ddt
iaðtÞ, where vL(t) is
the instantaneous coupling transformer voltage; which is
the instantaneous difference between the AC system
voltage, vAN(t), and the compensator one, van(t). Con-
sidering the waveforms displayed in Fig. 5, the following
differential equations can be written for each 608
conduction interval.
†
Interval 0!ut%p/3vLðtÞ Z Vm sinðutÞK1
3VDC Z L
d
dtiaðtÞ (8)
so that,
iaðtÞZKVm
uLðcosðutÞK1ÞK
1
3LVDCtCI0 I0Ziað0Þ (9)
†
Interval p/3!ut%2p/3vLðtÞZVmsinðutÞK2
3VDCZL
d
dtiaðtÞ
iaðtÞZKVm
uLðcosðutÞK0:5ÞK
2
3LtK
2p
9uL
� �VDCCI1
I1Zia2p
3u
� �
†
Interval 2p/3!ut%pvLðtÞZVmsinðutÞK1
3VDCZL
d
dtiaðtÞ
iaðtÞZKVm
uLðcosðutÞK0:5ÞK
1
3LtK
2p
9uL
� �VDCCI2
I2Zia2p
3u
� �
It is assumed that in steady state the AC current
waveform is symmetric, therefore
ia
p
2u
� �Z 0
Then the initial condition I0 can be calculated as follows
ia
p
2u
� �ZK
Vm
uLcos
p
2
� �K0:5
� �
K2
3L
p
2uK
2p
9uL
� �VDC C I1 Z 0
I1 ZKVm
uL0:5 C
p
9uLVDC
I1 Z iap
3u
� �ZK
Vm
uLcos
p
3
� �K1
� �K
1
3L
p
3uVDC C I0
I1 ZVm
uL0:5 K
p
9uLVDC C I0
where I0 is the initial condition at tZ0, ia(0)ZI0
I0 ZKVm
uLC
2p
9uLVDC (10)
Ricardo D.M. et al. / Electrical Power and Energy Systems 27 (2005) 39–5144
Therefore, the steady state half-period equations result
iaðtÞ ZKVm
uLcosðutÞK
1
3Lt K
2p
9uL
� �VDC;
0!ut%p=3
(11)
iaðtÞ ZKVm
uLcosðutÞK
2
3Lt K
p
3uL
� �VDC;
p=3!ut%2p=3
(12)
iaðtÞ ZKVm
uLcosðutÞK
1
3Lt K
p
9uL
� �VDC;
2p=3!ut%p
(13)
Within the interval p%ut!2p the AC current wave-
form is negative respect to that described in the above
equations. In this paper, the results of examples have
academic purposes only and are obtained with the following
values: leading case VDCZ6 V; VmZ2.5 V and LZ3 mH;
and for the lagging case VDCZ6 V; VmZ4.5 V and
LZ3 mH, respectively.
3.1.1. Transistors and diodes conduction period
Now, with the precedent AC current equations, it is
possible to predict the transistor’s and diode’s conduction
period. When only reactive power is generated (zero power
factor) the transistors and diodes of the inverter circuit
conduct for 908. If the compensator is absorbing reactive
power, the transistors naturally turn off at zero current. On
the other hand, when it is generating reactive power, the
transistors turn off at the peak of the AC current waveform.
The following sequence proposes a way of determining the
conduction period of each device at any power factor based
on the AC current waveforms and the firing control signals
(Fig. 1).
Leg 1
Pulse g1 on: Pulse g4 on:
If ia(t) is positive, D1 conducts. If ia(t) is positive, Q4 conducts.
If ia(t) is negative, Q1 conducts. If ia(t) is negative, D4 conducts.
Leg 2
Pulse g3 on: Pulse g6 on:
If ib(t) is positive, D3 conducts If ib(t) is positive, Q6 conducts
If ib(t) is negative, Q3 conducts If ib(t) is negative, D6 conducts
Leg 3
Pulse g5 on: Pulse g2 on:
If ic(t) is positive, D5 conducts If ic(t) is positive, Q2 conducts
If ic(t) is negative, Q5 conducts If ic(t) is negative, D2 conducts
3.1.2. Capacitor current
The capacitor current is made up of segments of the
three AC phase currents and is dependent on which
semiconductor devices are conducting over each 608
period. The capacitor current IC(t) can be described in
the following fashion:
ICðtÞ Z iaðtÞC icðtÞ; 0%ut!p=3
ICðtÞ Z iaðtÞ; p=3%ut!2p=3
ICðtÞ Z iaðtÞC ibðtÞ 2p=3%ut!p
where
ICðtÞ ZVm
uLsin ut K
p
6
� �K
2
3Lt K
p
9uL
� �VDC;
0%ut!p=3
(14)
The capacitor current waveform over each of the
remaining five conduction periods is identical to that
described by Eq. (14) and yields a repetitive waveform,
with six times the corresponding AC power system
frequency. Fig. 6 shows the capacitor current, correspond-
ing to the AC current depicted in Fig. 5.
3.1.3. DC capacitor voltage
The previous analysis assumes a constant DC voltage.
This is tantamount to consider an infinite capacitor and
consequently zero DC ripple voltage. If a finite capacitor is
dealt with, a DC voltage ripple exists which is dependent on
the capacitor value and the capacitor current. It is assumed
that the capacitor current remains unchanged from that of
Eq. (14), the capacitor voltage can be estimated; under such
condition a minimum DC ripple voltage is obtained. The
capacitor voltage vC(t) over the first 608 period results
vCðtÞ Z1
C
ðt
0ICðtÞdt CV0 (15)
where V0 is the initial condition at tZ0, V0ZvC(0).
Substituting Eq. (14) into (15),
vCðtÞ ZKVm
u2LCcos ut K
p
6
� �K
1
3LCVDCt2
Cp
9uLCVDCt C
ffiffiffi3
pVm
2u2LCCV0 (16)
Making use of the DC voltage level VDC, the value of V0
can be calculated from the average component of Eq. (15)
with a period TZp/3u,
VDC Z1
T
ðp=3u
0vCðtÞdt (17)
V0 Z 0:0889Vm
u2LCK0:0609
1
u2LCVDC CVDC (18)
The capacitor voltage’s waveforms obtained by
expressions (14) and (16) are displayed in Fig. 7. This
figure illustrates that the peak capacitor voltage Vpk, occurs
at utZ308 when the compensator is generating reactive
power, that is, leading current. The peak voltage results in
Vpk ZK0:0451Vm
u2LCC0:0305
1
u2LCVDC CVDC (19)
Fig. 6. Capacitor current; (a) generating reactive power; (b) absorbing reactive power.
Ricardo D.M. et al. / Electrical Power and Energy Systems 27 (2005) 39–51 45
When the compensator exchanges reactive power only,
the DC component of the capacitor current is zero and the
capacitor voltage is made up only by sinusoidal functions
with fixed amplitude and a DC offset. This results in zero
DC power on the DC side; thereby the capacitor voltage
does not vary. If a phase shift f exists between the AC bus
and the fundamental compensator voltage, both reactive and
active power is exchanged. It is noteworthy that if the angle
f increases the capacitor current would have a greater DC
Fig. 7. DC capacitor voltage; (a) generating reac
level; this effect is illustrated in Fig. 8 where IC(t) is
exhibited assuming fZ2 and 158.
Under this condition the instantaneous capacitor current
and voltage, based on Fourier analysis are expressed by
ICðtÞ Z IC_DC CXN
nZ1
ICn sinðnutÞ (20)
vCðtÞ Z VDC CXN
nZ1
VCn cosðnutÞ (21)
tive power; (b) absorbing reactive power.
Fig. 8. Instantaneous capacitor current.
Fig. 9. Instantaneous capacitor voltage.
Ricardo D.M. et al. / Electrical Power and Energy Systems 27 (2005) 39–5146
The above expressions show that a DC power will flow
through the DC side. Thus, the capacitor voltage will rise or
down, depending upon the signal IC_DC is positive or
negative. A capacitive circuit is employed to clarify this
effect. The circuit is initially at steady state with fZ08; at
time tZ0.0333 s the angle f is suddenly changed to K0.58.
Fig. 9 shows the capacitor voltage and emphasizes that the
phase shift f affects the capacitor voltage; it is due to the DC
component in IC(t), that is, the active power exchange. This
proves that the mechanism of phase angle adjustment can be
used to control the VAR generation or absorption by
increasing or decreasing the capacitor voltage, and thereby
the amplitude of the converter output voltage.
For an ideal converter (without losses) supplying reactive
power only, the AC bus voltage and the fundamental
converter voltage are in phase. In practical converters, the
semiconductor switches are not lossless, and therefore
the energy stored in the DC capacitor would be required by
the internal losses. However, these losses can be supplied
from the AC bus by lagging the converter’s output voltage
with respect to the AC bus voltage by a small angle; this
allows an active power flow from the AC system to the
converter which compensates for the losses, keeping the
capacitor voltage at the desired level. Such concept is
illustrated in Fig. 10. The system is operating in steady state
with a fixed DC source at tZ0.1 s. The DC source is then
changed by a DC capacitor. In Fig. 10(a) both the AC bus
voltage and the compensator one have the same phase; in this
case the energy stored in the DC capacitor is used by the
internal losses. In Fig. 10(b) with a small angular difference
between the AC bus voltage and the compensator one,
the losses are supplied from the AC system and the capacitor
voltage is kept at the desired level. Fig. 10 was obtained by
PSCAD/EMTDC.
4. Improving the six-pulse VSI
The six-pulse StatCom is the simplest arrangement used
in this kind of devices; however, due to the high harmonic
content, in high power applications it does not offer a good
performance. A better one is reached combining two six-
pulse converters. Such configurations are named 12-pulse
StatCom. The 12-pulse circuit is the lowest practical pulse-
numbered circuit for power system application to achieve a
satisfactory harmonic performance. The six-pulse output
Fig. 10. Instantaneous AC current with: (a) fZ08; (b) fZK0.58.
Ricardo D.M. et al. / Electrical Power and Energy Systems 27 (2005) 39–51 47
voltages are: vab(t), vbc(t) and vca(t), where vab(t) is given by
Eq. (1). If this compensator is connected to a wye–wye
transformer with a 1:1 turn ratio, the line-to-neutral voltage,
van(t), can be expressed by
vanðtÞ Z1ffiffiffi3
pXN
mZ1
Vabm
ðK1ÞrsinðmutÞ; cm Z 6rG1;
r Z 0; 1; 2;.;
(22)
Suppose that the second six-pulse converter produces
phase-to-phase voltages lagged 308 with respect to the other
converter and with the same magnitude. That is,
vabðtÞ2 ZXN
mZ1
VabmsinðmutÞ (23)
If this second converter is connected to a delta–wye
transformer with a 1 : 1=ffiffiffi3
pturn ratio, the line-to-neutral
voltage in the wye-connected secondary would be:
vanY ðtÞ2 Z1ffiffiffi3
pX
VabmsinðmutÞ; cm Z 6rG1;
r Z 0; 1; 2;.
(24)
then the line-to-line voltage is
vabY ðtÞ2 ZXN
mZ1
Vabm
ðK1Þrsin mut C
p
6m
� �;
cm Z 6rG1; r Z 0; 1; 2;.
(25)
The waveforms given by Eqs. (1) and (25) are added
using a summing transformer to give the third waveform
Vab12(t), closer to being a sine wave,
vab12ðtÞ Z vabðtÞCvabY ðtÞ2 (26)
thus, vab12(t) is the phase-to-phase voltage of a 12-pulse
converter. These waveforms are shown in Fig. 11, where the
two six-pulse converters are connected in parallel on the
same DC bus, and work together as a 12-pulse VSI
StatCom. The 12-pulse voltage vab12(t) holds only harmo-
nics of order mZ12rG1, where r is any positive integer,
that is, mZ1, 11, 13, 23, 25,., with amplitudes 1/11, 1/13,
1/23, 1/25,., respectively. The 12-pulse voltages given by
Eq. (26) can be expressed as,
vab12ðtÞ Z 2XN
mZ1
Vab12msin mut C
p
6m
� �(27)
where
Vab12mZ
4
mpVDC
ffiffiffi3
p; cm Z 12rG1; r Z 0; 1; 2;.
4.1. AC current signals
Applying a similar procedure to that presented in the
previous section, the AC current analysis is carried out. In such
case the fundamental voltage is vanðtÞZ1:2732VDC sinðutÞ,
then the magnitude of the fundamental and harmonics current
components are given by:
Ia1Z
Vm K1:2732VDC
uL(28)
Iam Z1:2732VDC
m2uL;cmO1 (29)
Fig. 11. (a) vab(t) and vabY(t); (b) 12-pulse voltage.
Ricardo D.M. et al. / Electrical Power and Energy Systems 27 (2005) 39–5148
The fundamental current will be leading when Vm!1.2732VDC; thus, the compensator is seen as a capacitor by
the AC system and the current flows from the compensator
into the AC system; the fundamental current will be
lagging when VmO1.2732VDC, thus the compensator
behaves as an inductor by the AC system and the current
flows from the AC system into the compensator. To obtain
the AC current equations, the procedure is carried out in a
similar way as that of the six-pulse circuit, taking into
account that the width over each conduction period is 308
(Fig. 11). The steady state current ia(t) results
iaðtÞ ZKVm
uLcosðutÞK
1
3Lt K
7:4641p
18uL
� �VDC;
0%ut!p=6
(30)
iaðtÞ ZKVm
uLcosðutÞK
0:9107
Lt K
3:0654p
6uL
� �VDC;
p=6%ut!p=3 ð31Þ
iaðtÞ ZKVm
uLcosðutÞK
1:2440
Lt K
3:7320p
6uL
� �VDC;
p=3%ut!p=2 ð32Þ
The current flowing into each wye-connected secondary
and the wye-connected primary is equal to the AC line
current, and the current flowing into the delta-connected
primary is phase-shifted by 308 with respect to the wye-
connected primary. Fig. 12(c) depicts the AC current
waveform, assuming for the leading case, VDCZ3 V;
VmZ2.5 V and LZ3 mH were used; and for the lagging
case VDCZ3 V; VmZ4.5 V and LZ3 mH.
4.2. Capacitor current
The capacitor current is made up of the DC currents
contributed by each six-pulse converter; thus the capacitor
current is given by
iDC12ðtÞ Z iDC1ðtÞC iDC2ðtÞ (33)
where iCD12(t) is the 12-pulse capacitor current; iCD1(t) is
the first compensator’s capacitor current; iCD2(t) is the
second compensator’s capacitor current, where
iDC1ðtÞ ZKVm
uLcos ut C
p
3
� �K
1:2440
Lt K
p
6u
� �VDC;
0%ut!p=6 ð34Þ
iDC2ðtÞ ZKVm
uLcos ut C
p
6
� �K
1:2440
Lt K
p
3u
� �VDC;
p=6%ut!p=2 ð35Þ
From Eqs. (34) and (35),
iDC12ðtÞ ZK1:9319Vm
uLcos ut C
5p
12
� �
K2:4880
Lt K
p
12u
� �VDC; 0%ut!p=6 ð36Þ
The capacitor current waveform over the remaining
11 conduction periods is identical to that described by
Eq. (36); for the previous example, Fig. 12(a) and (b) depict
the 12-pulse capacitor current.
Fig. 13. DC capacitor voltage; (a) generating rea
Fig. 12. (a) capacitor current: generating reactive power; (b) capacitor
current: absorbing reactive power; (c) AC current waveform, ia(t).
Ricardo D.M. et al. / Electrical Power and Energy Systems 27 (2005) 39–51 49
4.3. DC capacitor voltage
The capacitor voltage over the first 308 conduction period
is
vCðtÞ ZK1:9319Vm
u2LCsin ut C
5
12p
� �
C1:8681Vm
u2LCK
1:2440
LCVDCt2
C1:2440p
6uLCVDCt CV0 (37)
where
V0 Z 0:04181
u2LCVm K0:0568
1
u2LCVDC CVDC (38)
Fig. 13 exhibits the 12-pulse DC-capacitor voltage. This
figure also shows that the peak capacitor voltage occurs at
utZ158 when the compensator is generating reactive
power. The peak voltage is given by
Vpk ZK0:02201
u2LCVm C0:0284
1
u2LCVDC CVDC
(39)
5. PSCAD/EMTDC simulations
The previous analysis has been verified by comparing the
equations above with simulations made in PSCA-
D/EMTDC. Figs. 14 and 15 exhibit the phase-to-phase
voltage, vab(t), for a 12-pulse StatCom when the compen-
sator is operated with a finite capacitor as a DC source.
These figures illustrate the capacitor ripple voltage effect.
The capacitor voltage and the current waveforms are
ctive power; (b) absorbing reactive power.
Fig. 14. (a) 12-pulse AC current ia(t); (b) 12-pulse phase-to-phase voltage vab(t).
Ricardo D.M. et al. / Electrical Power and Energy Systems 27 (2005) 39–5150
depicted too. The considered parameters are: CZ220 mF,
LZ3 mH, VmZ2.5 V and VDCZ3 V.
6. Conclusions
A detailed circuit based analysis of a six-pulse and
12-pulse VSI-StatCom is presented; the analytical results
Fig. 15. Capacitor current and DC
are validated employing EMTDC/PSCAD simulations;
the equations obtained allow to choose the DC
capacitance size and a predefined design. The 12-pulse
VSI-StatCom is the lowest practical pulse-numbered
circuit for power applications to achieve a satisfactory
harmonic performance. The most important difference,
regarding to the six-pulse VSI-StatCom, is on the DC
capacitor: the 12-pulse VSI-StatCom requires a lower DC
capacitor voltage waveform.
Ricardo D.M. et al. / Electrical Power and Energy Systems 27 (2005) 39–51 51
rating capacitor than that required for the six-pulse VSI-
StatCom in order to obtain a comparable capacitor ripple
voltage. The DC capacitor voltage required to achieve a
specified reactive current is half that needed for the six-
pulse VSI-StatCom. Such analysis is the first stage of the
design procedure; in a future paper, results on an actual
device will be exhibited.
References
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