2

3

This presentation will contain forward-looking statements regarding our financial prospects, markets, demand for our products, and product development, among other things. Such forward-looking statements are based on current expectations, estimates and projections about the Company’s industry and management’s beliefs and assumptions. These statements are subject to risks and uncertainties which are more fully described in the documents that we file with the SEC, including our 10-Ks, 10-Qs and 8-Ks, and these statements may differ materially from our actual results.

This presentation contains non-GAAP financial measures such as pro forma Operating Income and margin, and pro forma EBITDA and EBITDA margins. We believe the presentation of these non-GAAP measures provide management and investors with meaningful information to understand and analyze our financial performance. However, this presentation should not be considered in isolation or as a substitute for the comparable GAAP measurements, when available.

Additionally, the Company has not reconciled its non-GAAP pro forma guidance and projections to GAAP guidance because it does not provide guidance for various items that are out of the Company's control and/or cannot be reasonably predicted. As a result, the Company is unable to provide such guidance. Accordingly, a reconciliation is not available without unreasonable effort.

Safe Harbor for Forward-Looking Statements

4

• 8:30 – 9:00 Check-in & Breakfast

• 9:00 – 9:05 Agenda for the day

• 9:05 – 9:25 Markets Trends and Opportunity

• 9:25 – 10:05 Memory & Interfaces Division Overview

• 10:05 – 10:45 Cryptography Research Division Overview

• 10:45 – 11:00 BREAK

• 11:00 – 11:40 Emerging Solutions Division Overview

• 11:40 – 12:10 Financial Overview

• 12:10 – 12:30 Q&A

• 12:30 – 2:00 Lunch

Welcome

5

Rambus At-a-Glance

• Founded in 1990; publicly traded on NASDAQ (RMBS) since 1997 • Over 500 employees; primarily engineers/inventors, increasing sales & marketing • Headquartered in Sunnyvale, CA with regional offices around the globe

513 employees as of June 30, 2015

• 63 emp. • CRD HQ • 247 emp. • Corp HQ

• 4 emp. • ESD R&D

• 52 emp. • LTD HQ

• 2 emp. • MID R&D

• 19 emp. • MID/ESD R&D

• 7 emp. • CRD R&D

• 110 emp. • CRD • G&A

• 1 emp. • S&M

• 3 emp. • S&M

• 5 emp. • S&M

6

Rambus Senior Leadership Team

Kevin Donnelly

SVP, GM Memory & Interfaces

Laura Stark

SVP, GM Emerging Solutions

Mike Schroeder

SVP, Human Resources

Jerome Nadel

Chief Marketing Officer

Paul Kocher

Chief Scientist

Jae Kim

General Counsel

Ron Black CEO

Martin Scott

SVP, GM Cryptography

Research

Satish Rishi

Chief Financial Officer

Craig Hampel

Chief Scientist

Luc Seraphin

SVP World Wide Sales and

Operations

Kit Rogers

SVP, Licensing & Technology Partnerships

7

Dr. Ron Black President and Chief Executive Officer

8

• The macro-economy is metastable, everyone has to be prepared for a slowdown Rambus’ substantial fixed price contracts are a hedge, so we are well positioned...

• Profitable growth is our focus, and we have several break-out strategies/products CryptoManager, buffer chipset, binary pixel, lensless smart sensor, and more …

• Evolving the unit of commerce to enable consumption of technology is critical New business models are not only an opportunity, but an imperative.

• IoT is “the next big thing,” but it is not here yet Short-term tactics and long-term strategy are both important.

• The $300B semiconductor industry is substantial, but it drives a $1T “downstream” industry which is not currently accessible to monetize. How can we access? Participating in the “downstream” revenue is THE break-out strategy.

Some Key Themes Underpinning Our Strategy

9

Evolving the Way We Work & Engage

Increasing Ecosystem Influence

Incr

easi

ng

En

d U

ser

Rel

evan

ce

Techno Think

Product Think

Design Think

Patent License

Architecture License

CryptoManager

Lensless Smart Sensors

IP Cores Buffer Chipset

Makers of Better

Invention to Market

Company of Inventors

10

Customer Engagement Model

IP Cores

Chips & Products

Architecture Licenses

Training Support Tools

Patent Licenses

Hosted Services &

Infrastructure

Enablement

Offerings

11

Semiconductor is the Foundation of Value… But it’s largely undervalued.

Value Chain

Rev

enu

e

Downstream Upstream

12

Semiconductor is the Foundation of Value… Leverage the value!

Value Chain

Rev

enu

e

Downstream Upstream

13

Unit of Commerce is Critical to Market Success

Standard made better…

14

The Decade Effect – Is IoT Next…

Mainframes 1960’s

IBM 360

Mini 1970”s

DEC PDP

PC 1980’s Wintel

x86/Win16

Internet 1990’s Cisco

Ethernet/TCPIP

Mobile 2000’s

Nokia/Apple GSM

Data 2010’s

Google/FB/Amazon Internet=Business

IoT 2020’s -TBD- -TBD-

15

capture secure move

Foundations for IoT

New Sensors Secure Data More, Faster Data

16

Rambus Well Positioned

Cryptography

Research

The world’s data. Secured.

• Foundational technologies • CryptoManager platform • Content protection • Anti-counterfeiting

LED Lighting

Solutions

Illuminating the world.

• LED innovation and IP • Light guide manufacturing • Design services

Memory

& Interfaces

The world’s data. Delivered.

• Flexible models from

licensing or physical product • Buffer chips • Beyond DDR4

Emerging

Solutions

The world’s data. Reimagined.

• Foundational R&D • Next gen memory

architectures • Smart sensors for IoT

17

• We want to, and we are looking proactively

• We want to buy businesses, not strategies

• We are constantly evaluating opportunities and, if not through acquisition, we will return cash to shareholders in other ways

A Word About M&A/Industry Consolidation

18

Pro-forma profitability

Update offering

Re-engage customers

Strengthen balance sheet

GAAP profitability

IP cores and CryptoManager

Expand existing engagements

Increase cash generation

The Team Continues to Execute

2013 Goals & Accomplishments 2014 Targets Met As Well

Foundation for growth

Launch buffer chip

Collaboration and channels

Increase cash generation

2015 Targets Underway…

19

• Our strategy over the last few years has been successful

• Securing ~$150M in fixed DRAM customer contracts and ~$70M in SoC contracts provides a firm, high-profit base irrespective of macro-economic headwinds

• We are investing heavily in growth, and have break-out products that are poised to generate substantial value

• We continue to be maniacally focused on shareholder value creation and will always run a rigorous capital budgeting process, reallocating capital when required

• While we are a small company, we are thought leaders in several areas, most notably in adopting our unit of commerce to customer demands, enabling monetization “downstream”, and driving “design thinking”

In Summary …

Memory + Interfaces Kevin Donnelly

Senior Vice President and General Manager

21

The World’s Data. Delivered.

More. Faster. Better.

• Chips to enable more capacity at high-performance for enterprise and data center servers

• Interfaces to deliver data faster to chips and memory

• Innovations to make systems with better

power efficiency, reliability and usability

2014 4.4 ZB

2020 44 ZB

Digital Universe is massive and growing –

projected to double every 2 years

Source: IDC 2014

22

Big Data Drives Server Growth

Connected Devices

Real-time Applications

Driving demands for faster access to more data with

high-speed memory and links

= +

Virtualization

In-memory Databases Real-time Analytics

Advanced Research

App OS

App OS

App OS

App OS

Hypervisor

23

Real-time Applications Demand More Memory

Telecom & Cloud

Financial Services

DRAM

CPU

Health & Life Sciences

Business Intelligence

24

Large performance penalty for insufficient memory capacity due to latency and bandwidth gap between memory and storage

Huge Latency and Bandwidth Penalty

SSD (Locally attached)

HDD (Locally attached)

DRAM

CPU

Modern Server Memory Hierarchy

Latency Bandwidth

0.1us 100-150GB/s

150us (New) 300+us (Conditioned)

500MB/s

10,000us 500MB/s

~1000x ~200x

Processing

Memory

Storage

Benefits of Keeping Large Data Sets In Memory

25

Server DIMM Chipset = RCD + DB

Module buffers are now the bottleneck to achieve memory speed and capacity for all

server CPUs using DDR4

Registered DIMM (RDIMM)

Load Reduced DIMM (LRDIMM)

Register Clock Driver (RCD)

Data Buffer (DB)

RCD

Boost Capacity and Bandwidth with DDR4 DIMMs

26

Use final picture

The company is announcing plans to sell chips under its own brand for the first time in its 25-year history. The latest move builds on Rambus’s expertise in communications technology associated with memory. Rambus won’t actually manufacture its new chips. Like most semiconductor companies founded since the 1980s, it will hire manufacturing specialists to make them.

Rambus, which started its business 25 years ago as a developer of RDRAM technology, is returning to its roots in memory technology innovation. Seizing the opportunity in a growing market of enterprise servers and datacenters that is screaming for dramatic performance improvements both in bandwidth and capacity, Rambus is rolling out a server memory interface chipset.

Rambus is making an advanced server memory interface chipset, dubbed the RB26 for R+DDR4 memory modules. The chips are like the wheels on Ferraris. They enable memory to keep up with high-speed data processors in enterprise and data center server markets. This new family of chips will enable applications such as data-intensive processing, real-time analytics, virtualization, and in-memory computing with increased speed, reliability, and power efficiency.

DDR4 is really hard to get right at high capacities and high speeds in a reliable way. In a world of Big Data server applications, these high capacities and reliability are paramount, and memory will just keep getting faster in a very technologically-challenging. Quite frankly, server OEMs and ODMs needed a new producer of DDR4 server memory chips, and that new provider is Rambus.

The Market Responds …

Rambus turns into fabless chipmaker

Rambus introduces new server memory interface chipset for advanced enterprise

and data center systems

Targeting server memory business , Rambus joins chip product market

Rambus shifts over their business from licensing semiconductor for server

Rambus: Moving up from IP licensing to making chips

28

Industry-leading Performance and Margin • Compliant with latest JEDEC spec @ 2666 Mbps; built-in

support for 2933Mbps

• Wide margin IO design with advanced programmability

• Exceeds JEDEC reliability requirements

Optimized Power • Frequency-based power optimization

Best-in-class Debug and Serviceability • Integrated tools for bring-up and debug

• Works out of the box with default system BIOS

Standard Made Better

Sampling today

RB26 DDR4 Server DIMM Chipset

29

Who Needs the Server DIMM Chipset

• Server DRAM capacity expected to more than double in next 3 years • DDR4 server penetration projected to reach more than 80% in 2017 and 100% in 2019*

*Source: IDC, June 2015

30

Server DIMM Chipset Roadmap

Today In Development Concept

Per

form

ance

an

d F

eatu

res

Next-Gen Chipsets

• Performance and margin @ 2.6Gbps

• Optimized power • Industry-leading

debug & services

• Performance and margin

• Optimized power • Debug & services Enhanced system

performance

RBxx

RBxy

• Performance and margin

• Optimized power • Debug & services • Enhanced system

performance Increased speed Enhanced system

reliability

RB26

Technology Considerations: • Speeds beyond DDR4 • DRAM scaling limits • Buffer support for different

memory types • Further power reduction

31

• R+ LPDDR3

Supports 2133Mbps, 30% lower power than LPDDR3

SoC PHYs compatible with LPDDR4, LPDDR3

• R+ DDR4

Supports 3200Mbps

Designed for high-capacity servers and consumer applications

R+ Memory Interfaces for Data Center and Mobile High-performance, low power memory interfaces with improved system margin and flexibility

Partnering for success:

– Rambus Leadership Product

– Industry Standard Compliant Product

Interface Type RDRAM SDRAM DDR XDR DDR2 GDDR3 XDR2 DDR3 GDDR5 LPDDR2 Mobile

XDR LPDDR3 R+ LPDDR3 DDR4 LPDDR4

Year Introduced 1994 1996 1999 2001 2003 2003 2005 2007 2009 2010 2010 2012 2013 2013 2014

Max Data Rate 500Mb/s 133Mb/s 400Mb/s 3200Mb/s 800Mb/s 1200Mb/s 12800Mb/s 1600 Mb/s

7000 Mb/s

1066Mb/s 4300Mb/s 1600Mb/s 2400Mb/s 3200Mb/s 4300Mb/s

Feat

ure

s

Programmable Read Latency Variable Block Size

Core Prefetch Dual Edge Clocking

DLL or PLL on a DRAM Advanced Power States

Programmable Write Delay Double Bus Rate Control

Driver Impedance/On Die Termination Calibration using Precision Resistor

Fly-By Command/Address Timing Deskew/Flexphase

Bank Grouping/Microthreading Channel Equalization Tech.

Near ground signaling (NGS) Multi Channel Die

On Die Termination of CA signals Encoded Data Mask

Encoded DBI

Rambus Leadership in Memory Solutions

Note: This list is not exhaustive. Many of the generically labeled innovations listed in the far left hand column are patented or patent pending. Dates shown refer to when innovations were included in the standard when promulgated (some features may no longer be required to conform to such standard), a commercial product or referenced in a datasheet.

33

Links are Increasingly Important in Data Centers

• Big Data driving increasing need for high-speed serial links, the backbone of the cloud

• Pervasive across all high-end routers, switches and networking systems

• 100GbE switch ports are growing from current annual run-rate of tens of thousands to handily exceed 10 million by 2019 – Crehan Research

0

5

10

15

10

0G

bE

Por

t Sh

ipm

ents

(M)

2015 2016 2017 2018 2019

Source: Crehan Research Inc.

34

R+ Serial Links for Data Centers

High-speed, multi-protocol serial link interfaces optimized for challenging enterprise systems

R+ 1-6G

R+ 1-11G

R+ 1-16G

40G+ (Test chip, modeling, design, etc.)

Performance

Des

ign

Co

mp

lexi

ty

Demonstrated Excellence

• 15+ years of high-speed SerDes design

• Silicon demonstrated up to 40Gbps(NRZ) SerDes

• Simulation, modeling and design of 56G interfaces, interconnects and systems

• State-of-the-art signal and power integrity internal tool methodology

R+ 1-28G

In Development

Available Today

Interface Type Quad

Serdes RaserV SerDes

PCIe 1.0 RaserX SerDes

Raser SerDes

PCIe 2.0 10GBASE-

KR R+ MP SerDes

USB 3.0 PCIE 3.0 USB 3.1

SSIC R+ MP SerDes

Year Introduced 2000 2002 2002 2005 2005 2006 2007 2008 2008 2010 2013 2013

Max Data Rate 3.125 Gb/s 6.4 Gb/s 2.5 Gb/s 10 Gb/s 4 Gb/s 5 Gb/s 10 Gb/s 6.4 Gb/s 5 Gb/s 8 Gb/s 10 Gb/s 11.2 Gb/s

Feat

ure

s

PAM-4 Signaling

Transmitter Pre-Emphasis

Multi-Tap Transmit Equalization

Transmit Compliance Pattern

Adaptive Transmit Equalization

Adaptive Receive Equalization

Partial Response Decision Feedback Equalization

Selectable Tap Decision Feedback

Receiver with Eye Diagram

Receiver with Adaptive Sampling Phase

Fast lock CDR – extra edge samplers

2nd order CDR

Rambus Leadership in High-Speed Signaling

Note: This list is not exhaustive. Many of the generically labeled innovations listed in the far left hand column are patented or patent pending. Dates shown refer to when innovations were included in the standard when promulgated (some features may no longer be required to conform to such standard), a commercial product or referenced in a datasheet.

– Rambus Leadership Product

– Industry Standard Compliant Product

36

• Significant opportunities from datacenters growth

• DRAM revenue will grow as we continue to license technology and begin to sell buffer chips to DRAM companies

• SoC revenue will grow as we license our patent portfolio as well as memory and serial link SIP

Growth Opportunity for Memory & Interfaces

$M

0

200

400

600

800

1,000

1,200

2014 Rev 2014 SAM 2016 SAM 2019 SAM

Revenue DRAM+ SoC+

Cryptography Research Dr. Martin Scott

Senior Vice President and General Manager

38

CryptoManager CryptoFirewall

Content Protection CryptoFirewall

Anti-Counterfeiting DPA Countermeasures

Security

Essential security foundation >

• Trust • Customer Intimacy • Value

Connectivity

Secure Foundations to Connected Service

Addressing specific business needs > Secure platform for silicon lifecycle management >

39

Securing devices and applications across all touch points

Trust by Design Secure Assets & Clusters Device Configurations & Customer Demands

Applications & Services

Customer Data & Intelligence

Manufacturing In-field

Building Trust Throughout The Entire Value Chain

Management

40

CryptoManager

Admin

HW Root of Trust

Secure end-to-end device key and feature management

Security Service

Local Appliance

Factories

41

• Flexible configuration moves decisions closer to customer demand • Enabling configuration across the supply chain reduces inventory + cost • Forecast volatility drives inventories • Configuration inflexibility constrains fulfillment

Driving Supply Chain Efficiency

Wafer Mfg Wafer Test

Wafer Inventory

Package Assemble

Device Inventory

Semiconductor Vendor OEM/ODM

Lower Wafer Inventory

Lower Chip Inventory

Lower Device Inventory Chip Inventory

Configure

Chipset Manufacturers Device Manufacturers Service Providers

43

Unlocking Value “In-Field”

PROVISION

44

The Secure Content Storage Association (SCSA) Selects Rambus Cryptography

Research To Help Secure Next-Generation Digital Video Content

Rambus to deliver key provisioning services for VIDITY,

allowing leading technology and media companies to enable 4K UHD and High Dynamic Range (HDR)

programming

LOS ANGELES and SUNNYVALE, Calif. – September 1, 2015 – Rambus Inc. (NASDAQ:RMBS) today announced that its Cryptography Research Division has been selected by the Secure Content Storage Association (SCSA) to run and manage the VIDITY™ Key Issuance Center. This service, part of the Cryptography Research Trust Services offering, manages cryptographic keys that SCSA-enabled devices and services use in securing high-quality 4K Ultra HD with HDRHD and SD content. The SCSA develops technologies for consumers to easily and securely purchase, transfer, and view content across multiple electronic devices. “The members of SCSA represent leading global technology and entertainment brands where delivering a seamless, high quality consumer experience along with…

NEWS RELEASE

• Secure Content Storage Association (SCSA) founded by Twentieth Century Fox Home Entertainment, Warner Brothers Home Entertainment, SanDisk, and Western Digital

• VIDITY launched by SCSA in May 2015

• VIDITY is the SCSA format designed to enable robust security for high-value content, especially 4K, HDR, and early window

• We are a special advisor to the SCSA and operate the VIDITY Key Issuance Center

Introducing VIDITY™

45

VIDITY License Server

CryptoManager Infrastructure

VIDITY PLAYER

CryptoManager Core

VIDITY Key Issuance Center

In-Field In Action

A customer selects to purchase a VIDITY movie.

The player is enabled through provisioning via a security core

The device is now securely authorized to play VIDITY content.

46

Supply and Value Chain

Rev

enu

e O

pp

ort

un

ity

• Device Personalization • Key Provisioning • Debug Control & Management • Supply Chain Monitoring and

Oversight

• Feature Management • Key Provisioning • Supply Chain Monitoring and

Oversight • ODM Management

• Entertainment • Finance and mobile payment • Government / National ID • Healthcare • MNO Subscriber Management

and Kill Switch • Remote enterprise • Ticketing

Chip Manufacturers: 10s Device Manufacturers: 100s MNOs, SPs, App Services: 1000s

$1B+

$100M+

$0.005 - $0.075/key

$0.05 - $0.50/key

$0.10 - $2.00/key

Feature Enablement Value Chain

47

Growth Opportunities for Cryptography Research

0

100

200

300

400

500

600

700

2014 Rev 2014 SAM 2016 SAM 2019 SAM

CRD Revenue DPA Countermeasures Anti-Counterfeiting Content Protection CryptoManager

$M

48

Growth Opportunities for Cryptography Research

0

100

200

300

400

500

600

700

2014 Rev 2014 SAM 2016 SAM 2019 SAM

CRD Revenue DPA Countermeasures Anti-Counterfeiting Content Protection CryptoManager

$M In-field Services

Emerging Solutions Laura Stark

Senior Vice President and General Manager

50

Moving the world’s data from memory through interfaces

Memory

& Interfaces

Reinventing embedded security from silicon to cloud

Cryptography

Research

Reimagining computing from sensor to cloud

Emerging

Solutions

What is ESD?

Foundational R&D Invention and harvesting

Methods and architecture Incubation from concept to market

51

0

500

1000

1500

2000

2500

3000

3500

1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015

Sum of Granted

Sum of Pending

Invention Happens Here…

Source: Rambus

Large worldwide portfolio with >2400 active patents and applications

YTD

52

Rambus Portfolio is Widely Cited

Source: Innography (Aug-2015)

53

In Technologies that …

Source: Innography (Aug-2015)

54

Key Programs

Next-Gen Memory Computational Sensing

New technologies and

architectures to improve memory performance and

bring compute closer to memory

New smart sensors that

enable low cost, low power light weight

sensing everywhere

55

Challenges Facing the Industry

Limits of DRAM scaling

Number of CPU cores scaling faster than

memory can support

Low CPU Utilization Big Data Analytics

Cost per bit of DRAM no longer scaling with

process

Massive and growing data sets are straining

data center architecture

90nm

0.25um

0.18um

0.13um 65nm 45nm

0.35um

1990 1995 2000 2005

Gate Oxide

Thickness (nm)

10

1

The end of traditional scaling

56

• Continued development of DDR5+ concepts

• Development of Gen n+2 ideas for buffer chips

• Key contributions to IP portfolio for future licensing

Advanced Development for Future Memory

Processing

Memory

Storage

57

• Faster than flash; lower cost and more reliable than DRAM

• Addresses slow-down in DRAM cost reduction

• Alternative bit-cell technology to improve memory endurance and power efficiency

• Rambus crosspoint ReRAM IP and technology

Emerging Storage Class Memory

Processing

Memory

Storage

58

• Exploring alternatives to accelerate the delivery and computation of data

System architectures

Application and Platform Software

FPGA acceleration

• Compatible with existing data center hardware and software infrastructure

New Memory Architecture: Smart Data Acceleration

Processing

Memory

Storage

59

Rambus Reveals Smart Data Acceleration Research Program

Advanced development platform slated to improve performance and power efficiency for data centers

SUNNYVALE, Calif. – September 14, 2015 – Rambus Inc. (NASDAQ:RMBS) today announced the Smart Data Acceleration (SDA) Research Program designed to tackle major issues facing data centers in the age of Big Data. The SDA Research Program has been exploring new architectures for servers and data centers that are optimized for rack-level Big Data computation, targeting significant improvements in performance and power efficiency, as the industry brings computing closer to data. “Modern servers are out of balance with today’s needs – data centers are under stress due to escalating demands of real-time access to large amounts of information driven by Big Data and new applications,” said Laura Stark, senior vice president and general manager of the Emerging Solutions division at Rambus. “This research platform focuses on architectures that offload computing closer to very large data sets at multiple points in the memory and storage hierarchy.” As part of the program, Rambus has created a platform to investigate system architectures that include software, firmware, FPGAs and large amounts of memory. The platform can be used to test new methods to optimize and accelerate data analytics for extremely large data sets.

With use cases including real-time risk analytics, ad serving, neural imaging, transcoding and genome mapping, the Rambus SDA Research program is a key technology investment for the next generation of data centers.

NEWS RELEASE

Smart Data Acceleration Research Program

60

The Key Building Block of the SDA Research Program

61

Focus Areas for Improving System Performance P

erfo

rman

ce

DRAM vs. SSD • Lower latency under load improves

application performance; benefits increase as workload demands rise

Minimizing Data Movement • High memory capacity reduces the time

and power spent moving data back and forth across networks

System with SSD

System with SDA

Compute Offload and Acceleration • FPGAs enable parallel offloading and

acceleration of compute tasks next to the memory storing the data

62

Lensless Smart Sensor

0.055mm ~1.5mm

Commercial Sensor Lens LSS Spiral Grating

Top view

Cross-section view

63

“Rambus on-chip camera will lead to finer gesture recognition”

- CNET

“Tiny sensors such as these are going to be used in always-on, always-connected smart devices that are going to improve every part of our daily lives”

- Tom’s Hardware

“An itty-bitty camera could bring sight to the Internet of Things”

- MIT Technology Review

“A microscopic lens-free image sensor could turn anything into a camera”

- Gizmodo

64

Partners in Open Development

• Partnering with the industry to accelerate and amplify discovery of applications for our technology

• Collaboration with partners to develop MVP (minimal viable product) prototypes

POD Program

Universities

frog IXDS

65

• Hardware development kits featuring LSS test chip built on open-source hardware and software

• Raspberry PI platform

• POD kits include:

Maker boards with grating/sensor, program brief & instructions, apps + firmware, SDK, imaging toolkit, tutorials and documentation

POD Development Kits

66

POD in Action

67

• Image change detection

• Point tracking

• Range finding

• Sophisticated gesture recognition

• Object recognition

• Image capture

• Video streaming

Breadth of Capabilities

68

• From inventing to prototyping to incubating, ESD is growing our technology foundation

• Growth in Big Data and the number of connected devices is creating difficult challenges and tremendous opportunities

New memory types and architectures addressing the performance and capacity gaps in memory hierarchy

Fundamentally new approach to capture data for ubiquitous sensing

• Collaborative engagement models open new doors for technology creation and adoption

Supporting Growth through Emerging Solutions

69

Satish Rishi Senior Vice President and Chief Financial Officer

70

Revenue, Operating Costs and Expenses

71

Revenue and Operating Income Cryptography Research Division

Rambus

Memory + Interfaces Division

72

Key Financials

In millions, except EPS and Margin 2012 2013 2014 2015 Estimates

Revenue $234 $272 $297 $300 - $315

Operating Income $31 $92 $119 $110 - $130

Operating Margin 13% 34% 40% 37% - 41%

EBITDA $44 $107 $133 $123 - $143

EBITDA Margin 19% 39% 45% 41% - 45%

Pro Forma Net Income $12 $50 $70 $67 - $79

Fully Diluted EPS $0.10 $0.43 $0.60 $0.54 - $0.65

Net Cash Provided by (used in) Operating Activities

$(18) $51 $77 $82 - $97

203

388

300

348

31

77

162

210

$0M

$50M

$100M

$150M

$200M

$250M

$300M

$350M

$400M

$450M

Dec 31, 2012 Dec 31, 2013 Dec 31, 2014 Jun 30, 2015

Total Cash Net Cash

Cash and Net Cash

74

Substantial Overall Growth Opportunity

2019 SAM 2014 Revenue

$M

0

200

400

600

800

1,000

1,200

New CRD MID

• MID expected to grow through Buffer Chips and SoC engagements

• CRD expected to grow through proliferation of CryptoManager and other verticals

• Evolving strategic investments that could become additional businesses

Program initiation 3-6 months

Product design/TO infrastructure build

6-18 months

Customer product launch

3-12 months

Programming opportunities

2-10 years R&D

CryptoManager

Program initiation 3-6 months

Product design/ tape-out

6-18 months

Customer product launch

3-12 months

Use fees / royalties 2-10 years R&D

SIP Cores

Patent development 2-5 years

Licensing discussions 2-4 years

Royalties 5-10 years R&D

Patent Licenses

Chip Design & TO 6-9 months

Sampling & Qualification 6-12 months

Shipping to customers 1-3+ years R&D

Buffer Chips

Monetization Models

76

Financial Model

2013 2014 2015 Estimates Model Revenue ($M) $272 $297 $300 – $315 12% –18% Growth

Pro forma Operating Margin 34% 40% 37% – 41% 40% – 44%

Pro forma EBITDA Margin 39% 45% 41% – 45% 44% – 47%

• Blended patent licensing, core licensing and product model, but still primarily a licensing model

• Continued profitable growth • Margin expansion due to operating leverage

77

• A large portion of our revenue is fixed, predictable and committed long term

• We continue to utilize our resources and expertise to create new monetization models (e.g. CryptoManager, buffer chips)

• Security continues to be an increasing concern, and we are well positioned to address new verticals via our expanding technology and product portfolio

• We want to influence not only the $300B semiconductor industry, but to participate in the $1T “downstream” industry

• Our offerings are robust and well protected by an exceptionally strong patent portfolio

Investment Thesis

Reconciliation of non-GAAP Financial Measures Net Income 2012 2013 2014

GAAP Net Income (Loss) (134) (34) 26

Adjustments: Stock-based compensation 23 15 15 Acquisition-related transaction costs & retention bonus 26 10 2 Amortization 30 29 27 Costs of restatement and related legal activities 0 0 -

Other one-time events 43 16 1 Non-cash interest expense 15 19 15 Provision for (benefit from) income taxes 10 (6) (15)

Pro Forma Net Income 12 50 70

EBITDA 2012 2013 2014

GAAP Operating Income (90) 22 75

Adjustments: Stock-based compensation 23 15 15 Acquisition-related transaction costs & retention bonus 26 10 2 Amortization 30 29 27 Costs of restatement and related legal activities 0 0 - Other one-time events 43 15 0

Pro Forma Operating Income 31 92 119

Depreciation 13 15 14

Pro Forma EBITDA 44 107 133

Certain amounts may be off $1M due to rounding.