The Serial Peripheral Interface (SPI) Chapter 8. SPI Operation of the SPI Keypad Interfacing with...

The Serial Peripheral Interface (SPI)

Chapter 8

SPI

• Operation of the SPI

• Keypad Interfacing with 74165 Shift Registers

• 4-Digit Seven-Segment Display Using a MC14499

• The 68HC68T1 Real-Time Clock

Table 8.1 68HC12 SPI SignalsPin SPI signal Name

PS4 MISO Master-In-Slave-OutPS5 MOSI Master-Out-Slave-InPS6 SCK Serial ClockPS7 SS Slave Select

7 6 5 4 3 2 1 0

SP0DR

MASTER

7 6 5 4 3 2 1 0

SP0DR

SLAVE

MOSI MOSIMISO MISO

SCK

SS SS

SCK

Table 8.2 SPI Registers in the 68HC12Name Register Addr DescriptionSP0CR1 00D0 SPI Control Register 1SP0CR2 00D1 SPI Control Register 2SP0BR 00D2 SPI Baud Rate RegisterSP0SR 00D3 SPI Status RegisterSP0DR 00D5 SPI Data Register

Table 8.3 SPI Registers in the 68HC11Name Register Addr DescriptionSPCR 1028 SPI Control RegisterSPSR 1029 SPI Status RegisterSPDR 102A SPI Data Register

7 6 5 4 3 2 1 0$00D2 0 0 0 0 0 SPR2 SPR1 SPR0 SP0BR

Figure 8.2 SPI Baud Rate Register

Table 8.4 68HC12 SPI Clock Rate SelectionSPR[2:0] Divide E

Clock byFrequency

(E = 8 MHz)0 0 0 2 4.0 MHz0 0 1 4 2.0 MHz0 1 0 8 1.0 MHz0 1 1 16 500 kHz1 0 0 32 250 kHz1 0 1 64 125 kHz1 1 0 128 62.5 kHz1 1 1 256 31.3 kHz

Table 8.5 68HC11 SPI Clock Rate SelectionSPR[1:0] Divide E

Clock byFrequency

(E = 2 MHz)0 0 2 1.0 MHz0 1 4 500 kHz1 0 16 125 kHz1 1 32 62.5 kHz

7 6 5 4 3 2 1 0$00D0 SPIE SPE SWOM MSTR CPOL CPHA SSOE LSBF SP0CR1

SPIE: Serial Peripheral Interrupt Enable0 – SPI interrupts disabled1 – SPI interrupts enabled

SPE: Serial Peripheral System Enable0 – SPI disabled1 – SPI enabled

DWOM: Port S Wired-OR Mode (affects PS[4:7] pins)0 – Normal CMOS outputs1 – Open-drain outputs

MSTR: Master/Slave Mode Select0 – Slave mode1 – Master mode

CPOL: Clock Polarity0 – SCK pin idles low (data not being transferred)1 – SCK pin idles high (data not being transferred)

CPHA: Clock Phase0 – SS line must be deasserted and reasserted between each successive byte1 – SS line may remain active low between successive byte transfers

SSOE: Slave Select Output Enable (master mode only)0 – General-purpose output if DDRS7 = 11 – SS output mode if DDRS7 = 1

LSBF: Least-Significant Bit Enable0 – Data transferred most-significant bit first1 – Data transferred least-significant bit first

Figure 8.3 SPI Control Register 1

7 6 5 4 3 2 1 0$00D3 SPIF WCOL 0 MODF 0 0 0 0 SP0SR

SPIF: SPI Transfer Complete Flag0 – Cleared by SP0SR read with SPIF set, followed by SP0DR access1 – set upon completion of data transfer between processor and external device

WCOL: Write Collision0 – No write collision1 – Write collision

MODF: Mode Fault0 – No mode fault1 – Mode fault

Figure 8.4 SPI Status Register

7 6 5 4 3 2 1 0$00D1 0 0 0 0 PUPS RDS 0 SPC0 SP0CR2

PUPS: Pull-Up Port S Enable0 – No internal pull-ups on port S1 – All port S input pins have an active pull-up device

RDS: Reduce Drive of Port S0 – Normal port S output drivers1 – Reduced drive capability on all port S outputs for lower power and less noise

SPC0: Serial Pin Control 00 – Normal operation1 – Bidirectional mode

Figure 8.5 SPI Control Register 2

\ Serial Peripheral InterfaceHEX00D0 CONSTANT SP0CR1 \ SPI Control Register00D2 CONSTANT SP0BR \ SPI Baud Rate Register00D3 CONSTANT SP0SR \ SPI Status Register00D5 CONSTANT SP0DR \ SPI Data Register

: SPI.INIT ( -- ) \ Initialize SPI port40 PORTS C! \ SS lo, sclk lo, MOSI hiE2 DDRS C! \ SS lo when DDRS7 set04 SP0BR C! \ 250 KHz (/32)54 SPCR C! ; \ CPHA = 1, CPO; = 0

: ?SPI.DONE ( -- f ) \ Is SPI data sent?7 SP0SR ?HI ;

: SEND.SPI ( c -- ) SP0DR C! \ send charBEGIN ?SPI.DONE \ wait till sentUNTIL ;

: SS.HI ( -- ) \ set SS high7 PORTS HI ;

: SS.LO ( -- ) \ set SS low7 PORTS LO ;

File: SPI.WHP

SPI





74165

1

2

3

4

5

6

7

8 9

10

11

12

13

14

15

16

GND

VccSH/LD

CLK

E

F

G

Q

H

H

CLK INH

D

C

B

A

SER

QH

74165

1

2

3

4

5

6

7

8 9

10

11

12

13

14

15

16

GND

VccSH/LD

CLK

E

F

G

Q

H

H

CLK INH

D

C

B

A

SER

QH

+5V

3.3K

+5V+5V

3.3K3.3K

3.3K

+5V

0

1

2

3

4

5

6

7

8

9

A

B

C

D

E

F

MISO

SCK SS

16 x 1Hex Keypad

74165

1

2

3

4

5

6

7

8 9

10

11

12

13

14

15

16

GND

VccSH/LD

CLK

E

F

G

Q

H

H

CLK INH

D

C

B

A

SER

QH

74165

1

2

3

4

5

6

7

8 9

10

11

12

13

14

15

16

GND

VccSH/LD

CLK

E

F

G

Q

H

H

CLK INH

D

C

B

A

SER

QH

+5V

3.3K

+5V+5V

3.3K3.3K

3.3K

+5V

0

1

2

3

4

5

6

7

8

9

A

B

C

D

E

F

MISO

SCK SS

0 1 2 3 4 5 6 7 8 9 10 11 12 12 14 153 2 1 0 8 9 A B 7 6 5 4 C D E F

0 1 2 3 4 5 6 7 8 9 10 11 12 12 14 153 2 1 0 8 9 A B 7 6 5 4 C D E F

\ Hex keypad decoding using 74165 chips and SPI

LOAD SPI.WHPHEX

: spi.key.init ( -- ) SPI.INIT SS.HI ; \ shift mode

: read.16shift ( -- n ) SS.LO \ latch data SS.HI 0 SEND.SPI \ get high byte SP0DR C@ 8 LSHIFT 0 SEND.SPI \ get low byte SP0DR C@ OR ;

0 1 2 3 4 5 6 7 8 9 10 11 12 12 14 153 2 1 0 8 9 A B 7 6 5 4 C D E F

: ?bit.pos ( n -- ff | bit# tf ) 0 SWAP \ ff n 8000 \ ff n mask 10 0 DO \ loop 16 times 2DUP AND \ ff n m n' 0= IF \ ff n m DROP I TRUE \ ff n b# tf 2SWAP LEAVE \ b# tf ff n THEN U2/ \ ff n m' LOOP 2DROP ;

0 1 2 3 4 5 6 7 8 9 10 11 12 12 14 153 2 1 0 8 9 A B 7 6 5 4 C D E F

CREATE keytbl 3 C, 2 C, 1 C, 0 C, 8 C, 9 C, A C, B C, 7 C, 6 C, 5 C, 4 C, C C, D C, E C, F C,

: ?keypad ( -- ff | n tf ) read.16shift ?bit.pos IF keytbl + C@ TRUE ELSE FALSE THEN ;

SPI





••

••

••

•

••

••

••

•

bcdefg

a 4321171615

• •

18

12

5

13

6

9 87 10IV III II

EN

DATA

CLK

OSC

VDD

MC14499

22 nF 36 - 82 ž

SS

MOSI

SCK

#2 #3 #4

Connecting the MC14499 to three common cathode7-segment displays

\ 4 LEDs Using the MC14499 Decoder/Driver with Serial Interface\ File: SPILED.WHP

LOAD SPI.WHPLOAD STRING.WHPDECIMAL

: pack2 ( addr -- c ) DUP C@ 4 LSHIFT \ addr c1 SWAP 1+ C@ \ c1 c2 15 AND OR ;

: .4leds ( n -- ) SS.LO 10 BASE ! (U.) 4 SWAP - \ addr #blanks

FOR \ addr1- 15 OVER C! \ store F for blank

NEXT DUP pack2 SEND.SPI \ 1st digit 2+ pack2 SEND.SPI \ 2nd and 3rd digit SS.HI ;

Figure 8.11 Displaying four 7-segment LEDs using the MC14499

A 33 '3'34 '4'35 '5'

A 0F blank33 '3'34 '4'35 '5'

STRING.WYPsee Chapter 12

345 (U.)

(U.) ( n -- addr len )

A 3 on data stack

4 SWAP - \ A 1FOR \ A 1- 15 OVER C! \ store F for blankNEXT

Maxim Serially Interfaced, 8-Digit LED Display Driver

: >maxim ( n addr -- ) ss.lo send.spi send.spi ss.hi ;

: shutdown ( -- )0 12 >maxim ;

: test.leds ( -- )1 15 >maxim ;

\ Maxim 7219 3-digit LED DriverLOAD SPI.WHPLOAD STRING.WHPHEX

: >maxim ( n addr -- ) ss.lo send.spi send.spi ss.hi ;

max.whp

: max.init ( -- )80 PORTS C! \ SS HIE2 DDRS C! \ when DDRS1 set02 SP0BR C! \ 1 MHZ

50 SP0CR1 C! \ CPHA = 0, CPOL = 0FF 9 >maxim \ Code B decode2 B >maxim \ scan limit digits 0-21 C >maxim \ normal operation (shutdown)0 F >maxim \ normal operation (display-test)

F A >maxim \ 31/32 intensity 0 1 >maxim \ digit 0 = 0 0 2 >maxim \ digit 1 = 0 0 3 >maxim ; \ digit 2 = 0

DECIMAL

: test.leds ( -- )1 15 >maxim ;

: shutdown ( -- )0 12 >maxim ;

Add the word.3leds ( n -- )that will display a decimal number nbetween 0 and 999 with leading blanks.

Lab 2

SPI





7 6 5 4 3 2 1 0$B1 START LINE XTAL1 XTAL0 50HZ CLK2 CLK1 CLK0 T1CCR

START: Start/Stop bit0 – Stop clock1 – Start clock

LINE: Transmit Complete Interrupt Enable0 – XTALin pin is source of time update

1 – clock uses 50/60 Hz LINE input

XTAL1, XTAL0: Crystals Selects

XTAL[1:0] Crystal Frequency0 0 7.194304 MHz0 1 2.097152 MHz1 0 1.048576 MHz1 1 32.768 kHz

50HZ: Input LINE frequency0 – 60 Hz1 – 50 Hz

CLK[2:0]: Square-wave frequency output selects0 – XTAL frequency

Figure 8.16 The MC68HC68T1 Clock Control Register

\ MC68HC68T1 Real-Time Clock plus RAMLOAD SPI11.WHPHEX

: !T1 ( data addr -- )SS.HISEND.SPI \ send addrSEND.SPI \ send dataSS.LOSPDR C@ DROP ; \ clear SPIF

: T1.INIT ( -- )B0 B1 !T1 ; \ start clock

: @T1 ( addr -- byte )SS.HISEND.SPI \ send addr0 SEND.SPI \ send dummy byte to get dataSS.LOSPDR C@ ; \ clear SPIF and get byte

: SET.TIME ( hr min sec -- )A0 !T1 A1 !T1 A2 !T1 ;

: .TIME ( -- )20 @T1 21 @T1 22 @T1 . . . ;

Figure 8.17 WHYP words for the MC68HC68T1 Real-Time Clock

T1.WHP

MC68HC68T1 Example

LOAD T1.WHPHEXSPI.INITT1.INIT10 35 42 SET.TIME.TIME

SummaryBox 8.1 WHYP SPI Words -- File: SPI.WHP

SPI.INIT ( -- )Initializes the SPI port with a clock rate of E/32.

SS.HI ( -- )Sets the SS line (PS7) high.

SS.LO ( -- )Sets the SS line (PS7) low.

SEND.SPI ( c -- )Sends the 8-bit byte, c, out the MOSI (PS5) pin.

ExercisesExercise 8.2

The MAX7219/MAX7221 from MAXIM are serial interfaced LED display driversthat are similar to the MC14499 shown in Figure 8.10 except that they can drive up toeight common-cathode 7-segment LED displays. The data sheet can be found onhttp://www.maxim-ic.com. Write WHYP words that can be used to display a 16-bitinteger as a decimal number between 0 and 65535 on five 7-segment displays using theMAX7219/MAX7221 chip.

E x e r c i s e 8 . 3T h e M o t o r o l a M C 1 4 4 1 1 0 i s a D i g i t a l - t o - A n a l o g C o n v e r t e r w i t h S e r i a l I n t e r f a c e . A

s i m p l i f i e d b l o c k d i a g r a m i s s h o w n b e l o w . T h e f u l l d a t a s h e e t c a n b e d o w n l o a d e d f r o mh t t p : / / m o t 2 . m o t - s p s . c o m / c g i - b i n / d l s r c h . T h e M C 1 4 4 1 1 0 a c t u a l l y c o n t a i n s s i x D / Ac o n v e r t e r s w i t h s e p a r a t e R x O U T a n d Q x O U T p i n s . H o w e v e r , o n l y t h e o u t p u t s f r o m t h ef i r s t D / A c o n v e r t e r a r e s h o w n i n t h e d i a g r a m . T h e R 1 O U T p i n i s a d i r e c t o u t p u t t h a t c a nb e f e d t o a h i g h - i m p e d a n c e i n p u t . T h e Q 1 O U T p i n i s a b u f f e r e d o u t p u t ( u s i n g a ne m i t t e r - f o l l o w e r ) t h a t c a n f e e d l o w - i m p e d a n c e c i r c u i t s .

M C144110 D/ A Conver t er

ENB

CLK

D in

R1 O UT

Q 1 O UT

Y o u c a n i n t e r f a c e t h e M C 1 4 4 1 1 0 t o a 6 8 H C 1 2 S P I p o r t b y c o n n e c t i n g t h e S P I S Ss i g n a l t o t h e E N B p i n , t h e S C K s i g n a l t o t h e C L K p i n , a n d t h e M O S I p i n t o t h e D i n p i n .W h e n E N B i s l o w 6 - b i t d a t a i s s h i f t e d i n t o D i n , M S B f i r s t . T h e l a s t b y t e s h i f t e d i nd e t e r m i n e s t h e o u t p u t R 1 O U T a n d Q 1 O U T . T h e r e f o r e , t o u s e o n l y t h i s s i n g l e o u t p u t ,i n p u t a s i n g l e b y t e w i t h t h e s i x b i t s i n t h e s i x h i g h b i t s o f t h e b y t e . E a c h b i t i s l a t c h e d o nt h e f a l l i n g e d g e o f t h e c l o c k t h a t c a n i d l e e i t h e r h i g h o r l o w .

a . W r i t e a W H Y P w o r d c a l l e d I N I T . D / A ( - - ) t h a t w i l l i n i t i a l i z e t h e S P I p o r t f o ri n t e r f a c i n g t o t h e M C 1 4 4 1 1 0 .

b . W r i t e a W H Y P w o r d c a l l e d D A C O N V ( n - - ) t h a t w i l l o u t p u t a n a n a l o g v o l t a g eo n R 1 O U T a n d Q 1 O U T p r o p o r t i o n a l t o t h e l o w e r s i x b i t s o f n ( 0 - 6 3 ) .

c . W r i t e a W H Y P w o r d c a l l e d 6 D A C O N V ( n 1 n 2 n 3 n 4 n 5 n 6 - - ) t h a t w i l l o u t p u ta n a n a l o g v o l t a g e o n a l l s i x D / A o u t p u t s w i t h n 1 o u t p u t o n R 1 O U T a n d n 6 o u t p u to n R 6 O U T . N o t e t h a t a t o t a l o f 3 6 b i t s m u s t b e s h i f t e d i n w i t h n 1 s h i f t e d i n l a s t .T h e s e 3 6 b i t s m u s t b e p a c k e d i n t o 4 . 5 b y t e s .

Exercise 8.5The 74164 shown below is an 8-bit Serial In/Parallel Out Shift Register. Data can be

shifted in either pins A or B when the other pin is high. Data is shifted on the rising edgeof the CLK input. A low level on either A or B inhibits data from being shifted in.

1

2

3

4

5

6

7

9

10

11

12

13

14

8GND

VccA

B

Q

Q

Q

Q

A

B

C

D

Q

Q

Q

Q

H

G

F

E

CLR

CLK

74164

a. Explain how you could interface this chip to the 68HC12 SPI port and use it as aseven-segment decoder connected to the MAN 72 shown in Figure 7.8.

b. Write a WHYP word called .sled ( n -- ) similar to that shown in Figure 7.9 thatwill display a hex digit on the seven-segment display.

Exercise 8.6Microchip Technology Inc. make a series of bus serial EEPROMs that use the SPI

interface to read and write bytes. For example, the 25C320 is a 32 Kbit (4,096 bytes)EEPROM available in the 8-pin package shown below. The full data sheet can bedownloaded from http://microchip.com/10/Lit/Memory/SPI/index.htm.

1

2

3

4G ND

VccCS

SO

WP

H O LD

SCK

SI25C320

5

6

7

8

You can interface the 25C320 to a 68HC12 SPI port by connecting the SPI SS signalto the CS pin, the SCK signal to the SCK pin, the MOSI signal to the SI pin, and theMISO signal to the SO pin. When CS is low 8-bit data is shifted into SI, MSB first. Eachbit is latched on the rising edge of the clock that idles low. Table 8.6 lists the sixinstructions used to read and write data to the EEPROM.

Table 8.6 25C320 Instruction SetInstruction Format Description

WREN 00000110 Set the write enable latch (enables writes)WRDI 00000100 Reset the write enable latch (disables writes)RDSR 00000101 Read status registerWRSR 00000001 Write status registerREAD 00000011 Read data from memory starting at selected addressWRITE 00000010 Write data to memory starting at selected address

E x e r c i s e 8 . 7T h e A n a l o g D e v i c e s A D 7 3 7 6 i s a ± 1 5 V O p e r a t i o n D i g i t a l P o t e n t i o m e t e r . A

s i m p l i f i e d b l o c k d i a g r a m i s s h o w n b e l o w .

AD7376 Digit al Pot ent iom et er

SD0

CLK

A

WSDI

CSB

Y o u c a n g o t o h t t p : / / w w w . a n a l o g . c o m / p r o d u c t / P r o d u c t _ C e n t e r . h t m l t o d o w n l o a d t h ef u l l d a t a s h e e t . T h e f i x e d r e s i s t a n c e b e t w e e n A a n d B , R A B , c a n b e e i t h e r 1 0 k , 5 0 k ,

1 0 0 k , o r 1 M . T h e o u t p u t W i s t h e " w i p e r " t h a t c a u s e s t h e r e s i s t a n c e b e t w e e n W a n dB t o b e g i v e n b y t h e e q u a t i o n

R W B ( D ) = ( D / 1 2 8 ) x R A B + R W

w h e r e D i s 7 - b i t d a t a t h a t h a s b e e n s h i f t e d i n t o S D I a n d R W i s t h e w i p e r c o n t a c t r e s i s t a n c e

e q u a l t o 1 2 0 .Y o u c a n i n t e r f a c e t h e A D 7 3 7 6 t o a 6 8 H C 1 2 S P I p o r t b y c o n n e c t i n g t h e S P I S S s i g n a l

t o t h e C S p i n , t h e S C K s i g n a l t o t h e C L K p i n , t h e M O S I s i g n a l t o t h e S D I p i n , a n d t h eM I S O s i g n a l t o t h e S D 0 p i n . W h e n C S i s l o w 8 - b i t d a t a i s s h i f t e d i n t o S D I , M S B f i r s t .E a c h b i t i s l a t c h e d o n t h e r i s i n g e d g e o f t h e c l o c k t h a t i d l e s l o w . T h e S D 0 p i n c a n b ec o n n e c t e d t o t h e S D I p i n o f a s e c o n d A D 7 3 7 6 t o d a i s y - c h a i n m u l t i p l e v a r i a b l e r e s i s t o r s .

a . W r i t e a W H Y P w o r d c a l l e d I N I T . R ( - - ) t h a t w i l l i n i t i a l i z e t h e S P I p o r t f o ri n t e r f a c i n g t o t h e A D 7 3 7 6 .

b . W r i t e a W H Y P w o r d c a l l e d R ( n - - ) t h a t w i l l c a u s e t h e r e s i s t a n c e b e t w e e n Wa n d B t o b e n o h m s . A s s u m e t h a t R A B = 1 0 k , s o t h a t n s h o u l d b e b e t w e e n 0 a n d1 0 , 0 0 0 .

E x e r c i s e 8 . 8T h e I S D 4 0 0 4 C h i p C o r d e r i s a s e r i e s o f s i n g l e - c h i p v o i c e r e c o r d / p l a y b a c k d e v i c e s . A

s i m p l i f i e d b l o c k d i a g r a m i s s h o w n b e l o w . T h e f u l l d a t a s h e e t c a n b e d o w n l o a d e d f r o mh t t p : / / w w w . i s d . c o m / p r o d u c t / c h i p c o r d e r . T h e s e d e v i c e s c a n s t o r e v o i c e r e c o r d i n g s o f 8 - ,1 0 - , 1 2 - , a n d 1 6 - m i n u t e d u r a t i o n s . T h e r e c o r d i n g s a r e s t o r e d d i r e c t l y i n a n a l o g f o r m a tu s i n g a u n i q u e m u l t i l e v e l s t o r a g e t e c h n o l o g y . T a b l e 8 . 7 l i s t s t h e t e n i n s t r u c t i o n s u s e d t or e a d a n d w r i t e d a t a t o t h e C h i p C o r d e r .

I SD4004 ChipCor derANA I N-

SCLK SS M O SI M I SO

ANA I N+AUDO UTI SD4004 ChipCorder

T a b l e 8 . 7 I S D 4 0 0 4 I n s t r u c t i o n S e tI n s t r u c t i o n O p c o d e

A d d r e s sD e s c r i p t i o n

P O W E R U P 0 0 1 0 0 X X X P o w e r - U pS E T P L A Y 1 1 1 0 0 X X X

< A 1 5 - A 0 >I n i t i a l i z e p l a y b a c k f r o m a d d r e s s < A 1 5 - A 0 >

P L A Y 1 1 1 1 0 X X X P l a y b a c k f r o m c u r r e n t a d d r e s sS E T R E C 1 0 1 0 0 X X X

< A 1 5 - A 0 >I n i t i a l i z e a r e c o r d o p e r a t i o n f r o m a d d r e s s < A 1 5 - A 0 >

R E C 1 0 1 1 0 X X X R e c o r d f r o m c u r r e n t a d d r e s sS E T M C 1 1 1 0 1 X X X

< A 1 5 - A 0 >I n i t i a l i z e m e s s a g e c u e i n g f r o m a d d r e s s < A 1 5 - A 0 >

M C 1 1 1 1 1 X X X P e r f o r m a m e s s a g e c u eS T O P 0 X 1 1 0 X X X S t o p c u r r e n t o p e r a t i o nS T O P W R D N 0 X 0 1 X X X X S t o p c u r r e n t o p e r a t i o n a n d e n t e r s t a n d - b y m o d eR I N T 0 X 1 1 0 X X X R e a d i n t e r r u p t s t a t u s b i t s

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