The Mu3e Experiment · Dirk Wiedner, Mu3e collaboration 22/10/2014. 34 • Require hit in first &...
Transcript of The Mu3e Experiment · Dirk Wiedner, Mu3e collaboration 22/10/2014. 34 • Require hit in first &...
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The Mu3e Experiment
Dirk Wiedner, Heidelberg
On Behalf of the Mu3e Collaboration
22nd October 2014
22/10/2014 Dirk Wiedner, Mu3e collaboration 1
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Overview
• Physics Motivation
• Mu3e Experiment
• Timing detectors
• HV-MAPS
• Summary
2 Dirk Wiedner, Mu3e collaboration 22/10/2014
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Physics Motivation
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Standard model:
• No lepton flavor violation
Lepton flavor violation?
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Physics Motivation
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Standard model:
• No lepton flavor violation
Lepton flavor violation?
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Physics Motivation
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Standard model:
• No lepton flavor violation, but:
o Neutrino mixing
o Branching ratio <10-54 →unobservable
Lepton flavor violation: μ+→e+e-e+
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The Mu3e Signal
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• μ+→e+e-e+ rare in SM
• Enhanced in:
o Super-symmetry
o Grand unified models
o Left-right symmetric
models
o Extended Higgs sector
o Large extra dimensions
o … Tree level
SUSY
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The Mu3e Signal
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• μ+→e+e-e+ rare in SM
• Enhanced in:
o Super-symmetry
o Grand unified models
o Left-right symmetric
models
o Extended Higgs sector
o Large extra dimensions
Rare decay (BR<10-12, SINDRUM)
• For BR O(10-16) >1016 muon decays
High decay rates O(109 muon/s)
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The Mu3e Signal
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→Maximum electron
energy 53 MeV
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The Mu3e Background
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• Combinatorial background
o μ+→e+νν & μ+→e+νν & e+e-
o many possible combinations
Good time and
Good vertex resolution
required
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The Mu3e Background
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• μ+→e+e-e+νν
o Missing energy (ν)
Good momentum resolution
(R. M. Djilkibaev, R. V. Konoplich, Phys.Rev. D79 (2009) 073004)
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The Mu3e Background
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• μ+→e+e-e+νν
o Missing energy (ν)
Good momentum resolution
(R. M. Djilkibaev, R. V. Konoplich, Phys.Rev. D79 (2009) 073004)
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Challenges
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Challenges • High rates
• Good timing resolution
• Good vertex resolution
• Excellent momentum resolution
Extremely low material budget
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Challenges • High rates: 109 μ/s
• Good timing resolution: 100 ps
• Good vertex resolution: ~200 μm
• Excellent momentum resolution: ~ 0.5 MeV/c2
Extremely low material budget:
1x10-3 X0 (Si-Tracker Layer)
HV-MAPS spectrometer
50 μm thin sensors
B ~1 T field
+ Timing detectors
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The Mu3e Experiment
• Target double hollow cone
• Silicon pixel tracker
• Scintillating fiber detector
• Tile detector
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• Muon beam O(109/s)
• Helium atmosphere
• 1 T B-field
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The Mu3e Experiment
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• Target double hollow cone
• Silicon pixel tracker
• Scintillating fiber detector
• Tile detector
• Muon beam O(109/s)
• Helium atmosphere
• 1 T B-field
Phase Ia
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The Mu3e Experiment
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• Target double hollow cone
• Silicon pixel tracker
• Scintillating fiber detector
• Tile detector
• Muon beam O(109/s)
• Helium atmosphere
• 1 T B-field
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The Mu3e Experiment
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• Target double hollow cone
• Silicon pixel tracker
• Scintillating fiber detector
• Tile detector
• Muon beam O(109/s)
• Helium atmosphere
• 1 T B-field
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The Mu3e Experiment
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• Target double hollow cone
• Silicon pixel tracker
• Scintillating fiber detector
• Tile detector
• Muon beam O(109/s)
• Helium atmosphere
• 1 T B-field
Phase Ib
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The Mu3e Experiment
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• Target double hollow cone
• Silicon pixel tracker
• Scintillating fiber detector
• Tile detector
• Muon beam O(109/s)
• Helium atmosphere
• 1 T B-field
Phase II
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The Mu3e Experiment
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• Target double hollow cone
• Silicon pixel tracker
• Scintillating fiber detector
• Tile detector
• Muon beam O(109/s)
• Helium atmosphere
• 1 T B-field
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PSI μ-Beam
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Paul Scherrer Institute Switzerland:
• 2.2 mA of 590 MeV/c protons
• Phase I: o Surface muons from target E
o Up to a ~108 μ/s
• Phase II: o New beam line at the neutron
source:
• High intensity Muon Beam
o Several 109 μ/s possible
>1016 muon decays per year
BR 10-16 (90% CL)
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Timing Detectors
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50 ns
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Timing Detectors
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0.1 ns
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Timing Detectors
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• Fiber detector
o Before outer pixel layers
o 250 μm scintillating fibers
o SiPMs
o ≤ 1 ns resolution
• Tile detector
o After recurl pixel layers
o 8.5 x 7.5 x 5 mm3
o SiPMs
o ≤ 100 ps resolution
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Fiber Detector
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• Fiber ribbon modules
o 16 mm wide
o 360 mm long
o 3 or 4 layers fibers of 250 μm dia.
o 6 STiC readout chips Scintillating fiber ribbons
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Fiber Detector
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• Total fiber detector:
o 24 ribbon-modules
o 144 read-out chips
o 4536 fibers
Scintillating fiber ribbons
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Fiber Detector
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• Prototype ribbons built:
o 3 and 4 layers
o 16 mm wide
o 360 mm long
• CAD in progress
Scintillating fiber ribbons
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Details … staggered layers
254 μm
433
μm Thickness:
• theoretical ~ 683 mm • measured ~ 750 mm < 1 g of glue / ribbon
700
μm
horizontal gap between fibers ~ 4 μm
250 μm
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Alternative: Square shape fibers
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Time Resolution Dt = TSi-PM1 – TSi-PM2
σΔt ≈ 800 ps with at least 3 g detected (~95 % efficient) σMT ≈ 400 ps ≥ 3 g reproducible results
• Time resolution does not show 1 / n behavior: improve on timing algorithm! • Si-PM transit time spread ~100 ps has almost no effect
• Real issue: time in all ~9k channels to few 100 ps
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Tile Detector
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• Scintillating tiles
o 8.5 x 7.5 x 5 mm3
• 12 Tile Modules per
station
o 192 tiles/module
o Attached to end rings
• SiPMs attached to tiles
o Front end PCBs below
o Readout through STiC
Sketch of Tile detector station
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Tile Detector
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• Scintillating tiles
o 8.5 x 7.5 x 5 mm3
• 12 Tile Modules per
station
o 192 tiles/module
o Attached to end rings
• SiPMs attached to tiles
o Front end PCBs below
o Readout through STiC
CAD of Tile Detector integration
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Time Resolution
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• Coincidence between 2 tiles in a row
• Time resolution ≈ 70 ps
• Time-walk effect ≈ 5 % (4 ps)
• Only small dependence on chip settings
150 ps
64 ps 70 ps
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Efficiency
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• Require hit in first & last column
• Look for hit in middle channel
• Efficiency > 99.5%
• Bad time values for ≈ 40% of hits o Known bug in STiC 2.0
o Will be fixed in STiC 3.0
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Pixel Sensors
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HV-MAPS
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• High Voltage Monolithic Active Pixel Sensors
• Pixel sensors
• HV-CMOS technology
• N-well in p-substrate
• Reversely biased
by Ivan Peric I. Peric, A novel monolithic pixelated particle detector implemented in high-voltage CMOS technology Nucl.Instrum.Meth., 2007, A582, 876
P substrate
N well
NMOS PMOS
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HV-MAPS
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• High Voltage Monolithic Active Pixel Sensors
• Pixel sensors
• HV-CMOS technology
• N-well in p-substrate
• Reversely biased ~60V
o Depletion layer
o Charge collection via drift
Fast <1 ns charge collection
o Thinning to < 50 μm possible
by Ivan Peric I. Peric, A novel monolithic pixelated particle detector implemented in high-voltage CMOS technology Nucl.Instrum.Meth., 2007, A582, 876
P substrate
depletion layer
N well
-60V
~9μm
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HV-MAPS
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• High Voltage Monolithic Active Pixel Sensors
• Pixel sensors
• HV-CMOS technology
• N-well in p-substrate
• Reversely biased ~60V
o Depletion layer
o Charge collection via drift
Fast <1 ns charge collection
o Thinning to < 50 μm possible
• Integrated readout electronics
by Ivan Peric I. Peric, A novel monolithic pixelated particle detector implemented in high-voltage CMOS technology Nucl.Instrum.Meth., 2007, A582, 876
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Chip Prototypes
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• 180 nm HV-CMOS
• Pixel matrix:
o 40 x 32 pixels
o 92 x 80 μm2 each
• Ivan Perić ZITI
o Analog part
• Small pixel capacitance
• Temperature tolerant
o Digital part
• Mostly ready
MuPix4
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Chip Prototypes
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• 180 nm HV-CMOS
• Pixel matrix:
o 40 x 32 pixels
o 103 x 80 μm2 each
• Ivan Perić ZITI
o Analog part
• Small pixel capacitance
• Temperature tolerant
o Digital part
• Mostly ready
MuPix6
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HV-MAPS Test Results
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Thinned Sensors
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• Single dies thinned:
o MuPix2 thinned to < 80μm
o MuPix3 thinned to < 90μm
o MuPix4 thinned to 50μm
• Good performance of
thin chips
o In lab
o In particle beam
MuPix3 thinned < 90μm
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Thinned Sensors
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• Single dies thinned:
o MuPix2 thinned to < 80μm
o MuPix3 thinned to < 90μm
o MuPix4 thinned to 50μm
• Good performance of
thin chips
o In lab
o In particle beam
MuPix4 thinned to 50μm
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Thinned Sensors
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• Single dies thinned: o MuPix2 thinned to < 80μm
o MuPix3 thinned to < 90μm
o MuPix4 thinned to 50μm
• Good performance of thin chips o In lab
o In particle beam
• Similar Time over Threshold (ToT) o PSI test-beam
o PiM1 beam-line
o 193 MeV π+
Reference
Thin < 90μm
Time Over Threshold
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Temperature Dependence
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• MuPix4 prototype
• Latency measurement
o LED pulse to…
o Pixel discriminator output
• Setup in Oven
o Temperature between
23°C and 70°C
Very little temperature
dependence
O(10ns) in latency
Within resolution of setup
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Signal to Noise
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• MuPix4 prototype
• Signal o Test-pulse
o Calibrated to 90Sr source
o At 70°C in oven
o HV = -70V
• Noise o Taken from S-curve
o Error function fit
o X-checked with
• Threshold scan
• Close to baseline
S/N = 36.8
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Test beams
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• Eight test beam
campaigns in 2013-14:
o March DESY
o June DESY
o September PSI
o October DESY
o February ’14 DESY
o June PSI
o July PSI
o October PSI
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Setup February Test-Beam
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• DESY, February 2014
• Beam-line T22
o up to 6 GeV electrons
• Aconite telescope
• MuPix4 prototype
• Readout setup from
Ivan Perić
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Spatial Resolution
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• Pixel size 80 μm x 92 μm
• Measured track residuals:
o RMS x = 28 μm
o RMS y = 29 μm
Pixel Residuals
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Efficiencies
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• >99.5% efficiency
o 5 GeV electrons
o 45° angle
o Individual pixel thresholds
Threshold tune from
pixel efficiencies in
previous test beam
MuPix4 Efficiency
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Threshold Scans for 0° to 45°
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MuPix 4
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Sub-Pixel Efficiencies
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• Chip folded back to
4 x 4 pixel area
• Resolution limited
• Overall high
efficiency
• No pixel substructure
(within resolution)
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Time Stamps
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• MuPix4 prototype
• External grey counter
o At 100 MHz
• Time stamp recorded by
MuPix4 sensor
o For each pixel
• Time resolution O(17 ns)
o Non-negligible setup
contribution
Time Resolution of Pixels
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Summary
54
• Mu3e searches for lepton flavor violation
• > 1016 μ-decays → BR < 10-16 (90% CL)
• Two SiPM based timing systems
• Silicon tracker with ~275M pixel
• HV-MAPS 50 μm thin
• Prototypes look encouraging
Dirk Wiedner, Mu3e collaboration 22/10/2014
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Outlook: Projected Sensitivity
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Institutes • Mu3e-collaboration:
o DPNC Geneva University
o Paul Scherrer Institute
o Particle Physics ETH Zürich
o Physics Institute Zürich University
o Physics Institute Heidelberg University
o Institute for Nuclear Physics Mainz University
o IPE Karlsruhe
o KIP Heidelberg
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Backup Slides
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Motivation Backup
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μ→eee vs. μ→eγ
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A. de Gouvêa, “(Charged) Lepton Flavor Violation”, Nucl. Phys B. (Proc. Suppl.), 188 303–308, 2009.
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Momentum Resolution
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• Multiple scattering
only
• Current design:
o 50 µm silicon
o 50 µm Kapton
o Helium gas cooling
o 3 layer fiber
detector
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SciFi Backup
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Fiber Winding Tool
fiber
U channel
More R&D to optimize the construction of the ribbons
~ 40 cm
16 mm
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Readout of Fibers Si-PMs (MPPCs) at both fiber ends SciFi column readout with Si-PM arrays • 64 channel monolithic device (custom design) • ~250 micron effective “pitch” • 50 mm 50 mm pixels • Grouped in 0.25 mm 1 mm vertical columns • Common bias voltage
LHCb type detector
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Readout of Fibers Si-PMs (MPPCs) at both fiber ends SciFi column readout with Si-PM arrays Reduced # of readout channels (2 64) Easy, direct coupling Higher occupancy “Optical” cross talk
LHCb type detector
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SciFi Column Readout
light travels preferentially in the cladding
and exits the fiber at large angles
“optical” cross talk between Si-PM columns
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Readout of Fibers Si-PMs (MPPCs) at both fiber ends SciFi array readout fiber by fiber Monolithic device • Custom design ongoing with Hamamatsu • 6 32 independent readout cells • 50 μm 50 μm pixels grouped in • 0.4 mm 0.4 mm cells with 0.1 mm spacing • Common bias for each cell (~0.5 V)
16 mm, 32 cells 3 m
m, 6
cel
ls
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Example of Hamamatsu Si-PM array S12642-0404 sensor 4 4 ch. (3 3 mm2)
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Readout of Fibers Si-PMs (MPPCs) at both fiber ends SciFi array readout fiber by fiber Lowest possible occupancy No “optical” cross talk Less dark rate Can also be used for tracking? Increased # of readout channels (2 192) Few photons / fiber (cell)
Example of Hamamatsu Si-PM array S12642-0404 sensor 4 4 ch. (3 3 mm2)
16 mm, 32 cells 3 m
m, 6
cel
ls
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Single Fiber Readout
Fibers glued with photo-device geometry 500 μm center to center
Si-PM array directly coupled to fibers
“fan-out” between straight section and socket
Estimated rate ~ 200 kHz for 2016 run
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Alternative: LHCb type detector
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Readout Electronics
22/10/2014 Dirk Wiedner, Mu3e collaboration
• STiC ASIC (KIP)
• Fulfills SciFi requirements
o Compact design
• Installation very close to Si-PM arrays
o 64 channels
• 6 chips / Si-PM array
• Assuming STIC can sustain ~10 MHz hit-rate
• Performance to be tested
o In particular for low photon yield
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ADC Spectra
pedestal
pedestal (inefficiency !)
1 photon
• Equidistant peaks • Reproducible shape • Efficiency > 98 % (2 or more photons) • Consistent with light propagation simulations • Distance between peaks amplification
charge integrating ADC
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Efficiency Si-PM2 Si-PM1
Near Mid Far
Small efficiency drop for source far from Si-PM Vs. photons in opposite detector Detection efficiency of Si-PM1 increases With # photons in Si-PM2 t.b.d. with 360 mm ribbons
threshold 2 ph. el.
(Si-PM2)
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Calibration Calibrate in situ: Alignment, energy (thresholds), timing Energy: Use ADC spectra Distance between peaks Amplification Set discriminator thresholds (> ng) Timing: • use the decay m+ e+ e- e+ n n • 3 prongs produced at the same time • For 107 m decays / s in one day • 107 decays assuming 33% eff.
en
mn
pulse shape integral using the DRS4
2g
integral (a. u.)
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Crossing Angles
occupancy :
ideal case : 100 kHz (PHASE I) (1500 ch / 1.5 108 m decays / s)
total # tracks 2.5 larger
on average 2.5 Si-PM “columns” hit
estimated rate > 500 kHz
azimuthal angle polar angle
Si-PM columns hit by crossing particles (e+)
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“Triggering”
0 g both ends (“normalization” for 105 m decays)
1 g both ends
3 g both ends 2 g both ends
# of fibers hit by a particle crossing the SciFi array (simulation) as a function of detected photons at each fiber end (assume 25% P. D. E. in simulations)
simulations (P.D.E. = 25%) to be confirmed by test beam measurements
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Test Set-Up Tests with collimated b source (Sr) b electrons cross the ribbon at 900 Complete the studies by testing prototypes in a beam → February DESY Test Beam
8 mm wide 200 mm long 3 layer SciFI ribbon Readout with 3 3 mm2 Si-PMs Si-PMs glued on SciFi ribbon Trigger scintillator: • 6 6 mm2 square bar • Readout with same Si-PMs Fast (~1 ns) transistor based amplifiers developed at UniGE
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Timing • Time difference Dt between Si-PM1 and Si-PM2
• Rise-time compensated discriminators
Dt different colors : different # of detected photons (see next slides)
Time resolution s of each Si-PM : Dt / 2 Time resolution of Mean Time : σMT = s / 2 = Dt / 2 For same s, i.e. similar # of detected photons on each side Mean time does not depend on impact position
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DRS5-Chip Readout
• Developed at PSI – successor to DRS4
• Currently in development
• Key features:
o Sampling speed up to 10 GSPS
o Bandwidth > 3 GHz
o 8 (16?) channels
o Dead-time less readout mode
o Up to 5 MHz hit rate
• DRS4 successfully operated in test-beam
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Alternative To STiC
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Alternative Design with Square Fibers
2 staggered layers of 500 mm square double cladding scint. fibers from Saint Gobain
BCF12: lpeak ~435nm, tdecay~3.2ns, Latt ~ 2.7 m / BCF20: lpeak ~492nm, tdecay~2.7ns, Latt > 3.5 m
32 fibers/layer
OR 250 mm square double cladding scint. fibers
Single fiber Al coating (minimum / negligible “optical” cross-talk)
To reduce thickness and occupancy thinner fibers would be required
16 mm
1 mm
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Testing Square Fibers Fiber test setup developed at PSI
500 mm square fiber b source single fiber
σt = (t2 -t4)/√2 ~ 485 ps
timing performance
cross talk < 1%
Cross talk: By sputtering 30 nm Al coating on the fiber cross talk < 1% was achieved
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Conclusions SciFi • Timing requirements (resolution < 1 ns) fulfilled
• in lab with b source (resolution < 500 ps)
• Good agreement between simulations and measurements • light propagation
• Further characterizations ongoing or planned
• b source and beam: • test of single fiber readout with commercially available Si-PMs • cross talk between fibers • rate capabilities • readout electronics
• Further studies under way to optimize construction of detector
• About 6 months to complete detector studies 6 more months to finalize design construction of detector about 6 months
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Tile Detector Backup
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Tile Detector
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• Scintillating tiles
o 8.5 x 7.5 x 5 mm3
• 12 Tile Modules per
station
o 192 tiles/module
o Attached to end rings
• SiPMs attached to tiles
o Front end PCBs below
o Readout through STiC
Tile detector 4 x 4 prototype
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STiC Readout • Developed at KIP for EndoTOFPET-US
o Optimized for ToF applications
• Key features: o Digital timing & energy information
o 64 channels (version 3.0)
o 50 ps TDC bins
o SiPM bias tuning
o SiPM tail cancelation possibility (version 3.0)
o Currently ≈ 1 MHz hit rate / chip
o Up to ≈ 20 MHz in future version
• Version 2.0 successfully operated in test-beam
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STiC 3.0
STiC 2.0
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STiC Readout • Developed at KIP for EndoTOFPET-US
o Optimized for ToF applications
• Key features: o Digital timing & energy information
o 64 channels (version 3.0)
o 50 ps TDC bins
o SiPM bias tuning
o SiPM tail cancelation possibility (version 3.0)
o Currently ≈ 1 MHz hit rate / chip
o Up to ≈ 20 MHz in future version
• Version 2.0 successfully operated in test-beam
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STiC 3.0
STiC 2.0
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STiC Test Beam
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STiC Test Beam
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STiC Test Beam
22/10/2014 Dirk Wiedner, Mu3e collaboration 87
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HV-MAPS Backup
22/10/2014 Dirk Wiedner, Mu3e collaboration 88
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Chip Prototypes
22/10/2014 Dirk Wiedner, Mu3e collaboration 89
• 180 nm HV-CMOS
• Pixel matrix:
o 40 x 32 pixels
o 92 x 80 μm2 each
• Ivan Perić ZITI
o Analog part almost final
o Digital part under
development
o Bug in pixel on/off
MuPix3
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Chip Prototypes
22/10/2014 Dirk Wiedner, Mu3e collaboration 90
• 180 nm HV-CMOS
• Pixel matrix:
o 40 x 32 pixels
o 92 x 80 μm2 each
• Ivan Perić ZITI
o Analog part almost final
o Digital part under
development
o Bug in pixel on/off
MuPix3
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Prototype Overview Prototype Active Area Functionality Bugs Improvements
MuPix1 1.77 mm2 Sensor + analog Comparator “ringing”
First MuPix prototype
MuPix2 1.77 mm2 Sensor + analog Temperature dependence
No ringing
MuPix3 9.42 mm2 Sensor, analog, dig. bad pixel on/off,
First part of dig. readout
MuPix4 9,42 mm2 Sensor, analog, dig. Zero time-stamp and row address for 50% of pixels
First working digital readout, first timestamp, temperature stable
MuPix6 10.55 mm2 Sensor, analog, dig. ? Removed zero time-stamp and address bug
22/10/2014 Dirk Wiedner, Mu3e collaboration 91
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Sensor + Analog + Digital
22/10/2014 Dirk Wiedner, Mu3e collaboration 92
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Sensor + Analog + Digital
22/10/2014 Dirk Wiedner, Mu3e collaboration 93
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Digital Readout Feature
22/10/2014 Dirk Wiedner, Mu3e collaboration 94
• Artifact from readout
protocol:
o Pixel RAM-cells reset
before readout
Bug effects only row
address and time stamp
50% of pixels effected
Pixel efficiency also good for affected rows
Efficiency Only hits with full address
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Digital Readout Feature
22/10/2014 Dirk Wiedner, Mu3e collaboration 95
• Artifact from readout
protocol:
o Pixel RAM-cells reset
before readout
Bug effects only row
address and time stamp
50% of pixels effected
Pixel efficiency also good for affected rows
Bug fixed for MuPix6 Hitmap for MuPix6
16000
12000
8000
4000
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Mechanics Backup
22/10/2014 Dirk Wiedner, Mu3e collaboration 96
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Mu3e Silicon Detector
22/10/2014 Dirk Wiedner, Mu3e collaboration 97
• Conical target
• Inner double layer
o 12 and 18 sides of 1 x 12 cm
• Outer double layer
o 24 and 28 sides of 2 x 36 cm
• Re-curl layers
o 24 and 28 sides of 2x 72 cm
o Both sides (x2)
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Mu3e Silicon Detector
22/10/2014 Dirk Wiedner, Mu3e collaboration 98
• Conical target
• Inner double layer
o 12 and 18 sides of 1 x 12 cm
• Outer double layer
o 24 and 28 sides of 2 x 36 cm
• Re-curl layers
o 24 and 28 sides of 2x 72 cm
o Both sides (x2)
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Mu3e Silicon Detector
22/10/2014 Dirk Wiedner, Mu3e collaboration 99
• Conical target
• Inner double layer
o 12 and 18 sides of 1 x 12 cm
• Outer double layer
o 24 and 28 sides of 2 x 36 cm
• Re-curl layers
o 24 and 28 sides of 2x 72 cm
o Both sides (x2)
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Mu3e Silicon Detector
22/10/2014 Dirk Wiedner, Mu3e collaboration 100
• Conical target
• Inner double layer
o 12 and 18 sides of 1 x 12 cm
• Outer double layer
o 24 and 28 sides of 2 x 36 cm
• Re-curl layers
o 24 and 28 sides of 2x 72 cm
o Both sides (x2)
180 inner sensors 4680 outer sensors 274 752 000 pixel
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Sandwich Design
22/10/2014 Dirk Wiedner, Mu3e collaboration 101
• HV-MAPS
o Thinned to 50 μm
o Sensors 1 x 2 cm2 or 2 x 2 cm2
• Kapton™ flex print
o 25 μm Kapton™
o 12.5 μm Alu traces
• Kapton™ Frame Modules
o 25 μm foil
o Self supporting
• Alu end wheels
o Support for all detectors
<0.1% of X0
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Thinned Pixel Sensors
22/10/2014 Dirk Wiedner, Mu3e collaboration 102
• HV-MAPS*
o Thinned to 50 μm
o Sensors 1 x 2 cm2 or 2 x 2 cm2
• Kapton™ flex print
o 25 μm Kapton™
o 12.5 μm Alu traces
• Kapton™ Frame Modules
o 25 μm foil
o Self supporting
• Alu end wheels
o Support for all detectors
MuPix3 thinned to < 90μm
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Kapton™ Flex Print
22/10/2014 Dirk Wiedner, Mu3e collaboration 103
• HV-MAPS
o Thinned to 50 μm
o Sensors 1 x 2 cm2 or 2 x 2 cm2
• Kapton™ flex print
o 25 μm Kapton™
o 12.5 μm Alu traces
• Kapton™ Frame Modules
o 25 μm foil
o Self supporting
• Alu end wheels
o Support for all detectors
Laser-cut flex print prototype
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Pixel Modules
22/10/2014 Dirk Wiedner, Mu3e collaboration 104
• HV-MAPS
o Thinned to 50 μm
o Sensors 1 x 2 cm2 or 2 x 2 cm2
• Kapton™ flex print
o 25 μm Kapton™
o 12.5 μm Alu traces
• Kapton™ Frame Modules
o 25 μm foil
o Self supporting
• Alu end wheels
o Support for all detectors
CAD of Kapton™ frames
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Overall Design
22/10/2014 Dirk Wiedner, Mu3e collaboration 105
• HV-MAPS
o Thinned to 50 μm
o Sensors 1 x 2 cm2 or 2 x 2 cm2
• Kapton™ flex print
o 25 μm Kapton™
o 12.5 μm Alu traces
• Kapton™ Frame Modules
o 25 μm foil
o Self supporting
• Alu end wheels
o Support for all detectors
CAD of Kapton™ frames
• Two halves for layers 1+2 • 6 modules in layer 3 • 7 modules in layer 4
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Inner Layers
22/10/2014 Dirk Wiedner, Mu3e collaboration 106
• HV-MAPS
o Thinned to 50 μm
o Sensors 1 x 2 cm2 or 2 x 2 cm2
• Kapton™ flex print
o 25 μm Kapton™
o 12.5 μm Alu traces
• Kapton™ Frame Modules
o 25 μm foil
o Self supporting
• Alu end wheels
o Support for all detectors
Vertex Prototype with 100 μm Glass
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Outer Module
22/10/2014 Dirk Wiedner, Mu3e collaboration 107
• HV-MAPS
o Thinned to 50 μm
o Sensors 1 x 2 cm2 or 2 x 2 cm2
• Kapton™ flex print
o 25 μm Kapton™
o 12.5 μm Alu traces
• Kapton™ Frame Modules
o 25 μm foil
o Self supporting
• Alu end wheels
o Support for all detectors
Layer 3 Prototype in Assembling Frame with 50 μm Glass
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Detector Frame
22/10/2014 Dirk Wiedner, Mu3e collaboration 108
• HV-MAPS
o Thinned to 50 μm
o Sensors 1 x 2 cm2 or 2 x 2 cm2
• Kapton™ flex print
o 25 μm Kapton™
o 12.5 μm Alu traces
• Kapton™ Frame Modules
o 25 μm foil
o Self supporting
• Alu end wheels
o Support for all detectors
Layer 3 Prototype in Assembling Frame with 50 μm Glass
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Si-Layer Rad Length
22/10/2014 Dirk Wiedner, Mu3e collaboration 109
• Radiation length per layer o 2x 25 μm Kapton
• X0= 0.175‰
o 15 μm thick aluminum traces (50% coverage)
• X0= 0.0842‰
o 50 μm Si MAPS
• X0= 0.534‰
o 10 μm adhesive
• X0= 0.0286‰
• Sum: 0.822‰ (x4 layers) o For Θmin = 22.9◦
o X0= 2.11‰
layer 1
layer 2 layer 3
layer 4
Back Curl layers
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Thinning
22/10/2014 Dirk Wiedner, Mu3e collaboration 110
• 50 μm Si-wafers
o Commercially available
o HV-CMOS 50 μm (AMS)
o 50 μm for MuPix4
• Single die thinning
o For chip sensitivity studies
o < 50 μm desirable
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Tools
22/10/2014 Dirk Wiedner, Mu3e collaboration 111
• Kapton-Frame tools:
o Sensor on Flex print
• Gluing groove
• Vacuum lift
o Tools are tested with
• 25 μm Kapton foil
• 50 μm glass
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Cooling Backup
22/10/2014 Dirk Wiedner, Mu3e collaboration 112
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Liquid Cooling
22/10/2014 Dirk Wiedner, Mu3e collaboration 113
• Beam pipe cooling
o With cooling liquid
o 5°C temperature
o Significant flow possible
o … using grooves in pipe
• For electronics
o FPGAs and
o Power regulators
o Mounted to cooling
plates
• Total power several kW
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He Cooling
22/10/2014 Dirk Wiedner, Mu3e collaboration 114
• Gaseous He cooling
o Low multiple Coulomb
scattering
o He more effective than air
• Global flow inside
Magnet volume
• Local flow for Tracker
o Distribution to Frame
• V-shapes
• Outer surface
He
He
150mW/cm2 x 19080cm2
= 2.86 KW
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He Cooling
22/10/2014 Dirk Wiedner, Mu3e collaboration 115
• Gaseous He cooling
o Low multiple Coulomb
scattering
o He more effective than air
• Global flow inside
Magnet volume
• Local flow for Tracker
o Distribution to Frame
• V-shapes
• Outer surface
Temperatures between
20°C to 70°C ok.
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He Cooling
22/10/2014 Dirk Wiedner, Mu3e collaboration 116
• Gaseous He cooling
o Low multiple Coulomb
scattering
o He more effective than air
• Global flow inside
Magnet volume
• Local flow for Tracker
o Distribution to Frame
• V-shapes
• Outer surface
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He Cooling
22/10/2014 Dirk Wiedner, Mu3e collaboration 117
• Gaseous He cooling
o Low multiple Coulomb
scattering
o He more effective than air
• Global flow inside
Magnet volume
• Local flow for Tracker
o Distribution to Frame
• V-shapes
• Outer surface
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He Cooling
22/10/2014 Dirk Wiedner, Mu3e collaboration 118
• Gaseous He cooling
o Low multiple Coulomb
scattering
o He more effective than air
• Global flow inside
Magnet volume
• Local flow for Tracker
o Distribution to Frame
• V-shapes
• Outer surface
Kapton™ Frame
V-shape Cooling outlets
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Comparison Simulation He and Air
He Air
22/10/2014 Dirk Wiedner, Mu3e collaboration 119
v = 4.0 m s
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Tests
22/10/2014 Dirk Wiedner, Mu3e collaboration 120
• Full scale prototype o Layer 3+4 of silicon tracker
o Ohmic heating (150mW/cm2)
o 561.6 W for layer 3 +4
o … of Aluminum-Kapton™
• Cooling with external fan o Air at several m/s
• Temperature sensors attached to foil o LabView readout
• First results promising o ΔT < 60°K
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Tests
22/10/2014 Dirk Wiedner, Mu3e collaboration 121
• Full scale prototype o Layer 3+4 of silicon tracker
o Ohmic heating (150mW/cm2)
o 561.6 W for layer 3 +4
o … of Aluminum-Kapton™
• Cooling with external fan o Air at several m/s
• Temperature sensors attached to foil o LabView readout
• First results promising o ΔT < 60°K
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Tests
22/10/2014 Dirk Wiedner, Mu3e collaboration 122
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Test Results
22/10/2014 Dirk Wiedner, Mu3e collaboration 123
• Full scale prototype o Layer 3+4 of silicon tracker
o Ohmic heating (150mW/cm2)
o 561.6 W for layer 3 +4
o … of Aluminum-Kapton™
• Cooling with external fan o Air at several m/s
• Temperature sensors attached to foil o LabView readout
• First results promising o ΔT < 60°K
No sign of vibration in air
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Comparison Simulation and Tests
22/10/2014 Dirk Wiedner, Mu3e collaboration 124
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Simulation with V-shape cooling
22/10/2014 Dirk Wiedner, Mu3e collaboration 125
• Configuration: o Main helium flux: v = 0.5m/s o Flux in Nozzle: v = 5 m/s
• In V-shape against main flux
• Next to V-shape against main flux
31.42 mL/s per nozzle
6.786 L/s for 3. Layer
• Results: o Tmax ≈ 42°C
o Tmax close to end of tube
o T raises at last third of tube
→ Extra Improvement using V-shapes as cooling channels
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Simulation with V-shape cooling
22/10/2014 Dirk Wiedner, Mu3e collaboration 126
• Configuration: o Main helium flux: v = 0.5m/s o Flux in Nozzle: v = 5 m/s
• In V-shape against main flux
• Next to V-shape against main flux
31.42 mL/s per nozzle
6.786 L/s for 3. Layer
• Results: o Tmax ≈ 42°C
o Tmax close to end of tube
o T raises at last third of tube
→ Extra Improvement using V-shapes as cooling channels
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He Cooling 250 mW/cm2
22/10/2014 Dirk Wiedner, Mu3e collaboration 127
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He Cooling 750 mW/cm2
22/10/2014 Dirk Wiedner, Mu3e collaboration 128
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DAQ Backup
22/10/2014 Dirk Wiedner, Mu3e collaboration 129
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Pixel Readout Scheme
22/10/2014 Dirk Wiedner, Mu3e collaboration 130
• Pixel logic o Pixel address (8 bit)
o Frame number (4 bit)
o 50 ns frames
• Column logic o Pixel data
o Column address
o Coarse time
• Frame logic o Super Frame
o Contains 16 x 50 ns readout frames
o + Sensor header
• Readout buffer
• Serializer and fast link(s)
Pixel address
Pixel Logic
Column Logic
Frame logic Readout buffer
Serializer
Fine time
Coarse time
Column address
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Pixel Readout Scheme
22/10/2014 Dirk Wiedner, Mu3e collaboration 131
• Pixel logic o Pixel address (8 bit)
o Frame number (4 bit)
o 50 ns frames
• Column logic o Pixel data
o Column address
o Coarse time
• Frame logic o Super Frame
o Contains 16 x 50 ns readout frames
o + Sensor header
• Readout buffer
• Serializer and fast link(s)
Pixel address
Pixel Logic
Column Logic
Frame logic Readout buffer
Serializer
8 bit
Fine time
4 bit
12 bit Coarse
time
Column address
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Pixel Readout Scheme
22/10/2014 Dirk Wiedner, Mu3e collaboration 132
• Pixel logic o Pixel address (8 bit)
o Frame number (4 bit)
o 50 ns frames
• Column logic o Pixel data
o Column address
o Coarse time
• Frame logic o Super Frame
o Contains 16 x 50 ns readout frames
o + Sensor header
• Readout buffer
• Serializer and fast link(s)
Pixel address
Pixel Logic
Column Logic
Frame logic Readout buffer
Serializer
8 bit
Fine time
4 bit
12 bit Coarse
time
Column address
4 bit 8 bit
24 bit
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Pixel Readout Scheme
22/10/2014 Dirk Wiedner, Mu3e collaboration 133
• Pixel logic o Pixel address (8 bit)
o Frame number (4 bit)
o 50 ns frames
• Column logic o Pixel data
o Column address
o Coarse time
• Frame logic o Contains 16 x 50 ns
readout frames
o + Sensor header
Super Frame
• Readout buffer
• Serializer and fast link(s)
Pixel address
Pixel Logic
Column Logic
Frame logic Readout buffer
Serializer
8 bit
Fine time
4 bit
12 bit Coarse
time
Column address
24 bit
3 x serial @ 800 Mb/s
4 bit 8 bit
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Front End FPGAs
22/10/2014 Dirk Wiedner, Mu3e collaboration 134
• FPGAs on detector
o 90 (+96) pieces
• Receive sensor data
o 36-45 LVDS inputs
• 5 Gbit/s outputs
o 8 optical links
o … to counting house
• Switching data
between readout
boards farms A-D
Front end FPGA
800 Mbit/s LVDS in
x 45
5 Gbit/s optical
Readout board
A
Pixel Sensor
Readout board
B
Readout board
C
Readout board
D
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Front End FPGAs
22/10/2014 Dirk Wiedner, Mu3e collaboration 135
• FPGAs on detector
o 90 (+96) pieces
• Receive sensor data
o 45 LVDS inputs
• 5 Gbit/s outputs
o 8 optical links
o … to counting house
• Switching data
between readout
boards farms A-D
Front end FPGA
800 Mbit/s LVDS in
x 45
5 Gbit/s optical
Readout board
A
Pixel Sensor
Readout board
B
Readout board
C
Readout board
D
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Front End FPGAs
22/10/2014 Dirk Wiedner, Mu3e collaboration 136
• FPGAs on detector
o 90 (+96) pieces
• Receive sensor data
o 45 LVDS inputs
• 5 Gbit/s outputs
o 8 optical links
o … to counting house
• Switching data
between readout
boards farms A-D
Front end FPGA
800 Mbit/s LVDS in
x 45
5 Gbit/s optical
Readout board
A
Pixel Sensor
Readout board
B
Readout board
C
Readout board
D
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Front End FPGAs
22/10/2014 Dirk Wiedner, Mu3e collaboration 137
• FPGAs on detector
o 90 (+96) pieces
• Receive sensor data
o 45 LVDS inputs
• 5 Gbit/s outputs
o 8 optical links
o … to counting house
• Switching data
between readout
boards farms A-D
Front end FPGA
800 Mbit/s LVDS in
x 45
5 Gbit/s optical
Readout board
A
Pixel Sensor
Readout board
B
Readout board
C
Readout board
D
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Front end
FPGA
Readout Board
22/10/2014 Dirk Wiedner, Mu3e collaboration 138
• FPGA readout boards
o 4 per sub-detector
• 5 Gbit/s optical inputs
o 16-28 inputs
• 10 Gbit/s optical output
o 12 outputs to PCs
• Switching network
o A-D sub-farms
o One output per PC
Readout board
5 Gbit/s Optical
x28
PC
10 Gbit/s Optical
PC
Sub-farm A
Front end
FPGA
Front end
FPGA
Front end
FPGA
PC x12
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Readout Board
22/10/2014 Dirk Wiedner, Mu3e collaboration 139
• FPGA readout boards
o 4 per sub-detector
• 5 Gbit/s optical inputs
o 16-28 inputs
• 10 Gbit/s optical output
o 12 outputs to PCs
• Switching network
o A-D sub-farms
o One output per PC
Front end
FPGA
Readout board
5 Gbit/s Optical
x28
PC
10 Gbit/s Optical
PC
Front end
FPGA
Front end
FPGA
Front end
FPGA
PC
Sub-farm A
x12
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Trigger-less DAQ
22/10/2014 Dirk Wiedner, Mu3e collaboration 140
• Front end links o Pixel sensor to on-detector
FPGA
• 400 – 800 Mbit/s
• LVDS
o Timing detector readout
• Optical links from detector o Front end FPGAs
o … to readout boards
o 5 Gbit/s
• Optical links in counting room o Off-detector read out boards
o …to PC Farm
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Trigger-less DAQ
22/10/2014 Dirk Wiedner, Mu3e collaboration 141
• Front end links o Pixel sensor to on-detector
FPGA
• 400 – 800 Mbit/s
• LVDS
o Timing detector readout
• Optical links from detector o Front end FPGAs
o … to readout boards
o 5 Gbit/s
• Optical links in counting room o Off-detector read out boards
o …to PC Farm
Pixel Sensor
Silicon FPGAs
x90
Readout board
x12
PC x48
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Trigger-less DAQ
22/10/2014 Dirk Wiedner, Mu3e collaboration 142
• Front end links o Pixel sensor to on-detector
FPGA
• 400 – 800 Mbit/s
• LVDS
o Timing detector readout
• Optical links from detector o Front end FPGAs
o … to readout boards
o 5 Gbit/s
• Optical links in counting room o Off-detector read out boards
o …to PC Farm
Pixel Sensor
Fiber Tile Pixel Sensor
Fiber Tile Pixel Sensor
Fiber Tile Pixel Sensor
Fiber Tile
Silicon FPGAs
x90
Fiber FPGAs
x48
Tile FPGAs
x48
Readout board
x16
Readout board
x8
Readout board
x8
x6156 x1134 x1152
PC x48
O(8Tbit/s)
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Tile
Trigger-less DAQ
22/10/2014 Dirk Wiedner, Mu3e collaboration 143
• Front end links o Pixel sensor to on-detector
FPGA
• 400 – 800 Mbit/s
• LVDS
o Timing detector readout
• Optical links from detector o Front end FPGAs
o … to readout boards
o 5 Gbit/s
• Optical links in counting room o Off-detector read out boards
o …to PC Farm
Pixel Sensor
Fiber Pixel Sensor
Fiber Tile Pixel Sensor
Fiber Tile Pixel Sensor
Fiber Tile
Silicon FPGAs
x90
Fiber FPGAs
x48
Tile FPGAs
x48
Readout board
x16
Readout board
x8
Readout board
x8
PC x48
x360
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Trigger-less DAQ
22/10/2014 Dirk Wiedner, Mu3e collaboration 144
• Front end links o Pixel sensor to on-detector
FPGA
• 400 – 800 Mbit/s
• LVDS
o Timing detector readout
• Optical links from detector o Front end FPGAs
o … to readout boards
o 5 Gbit/s
• Optical links in counting room o Off-detector read out boards
o …to PC Farm
Pixel Sensor
Fiber Tile Pixel Sensor
Fiber Tile Pixel Sensor
Fiber Tile Pixel Sensor
Fiber Tile
Silicon FPGAs
x90
Fiber FPGAs
x48
Tile FPGAs
x48
Readout board
x16
Readout board
x8
Readout board
x8
PC x48
x360 x192 x192 O(4Tbit/s)
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Trigger-less DAQ
22/10/2014 Dirk Wiedner, Mu3e collaboration 145
• Front end links o Pixel sensor to on-detector
FPGA
• 400 – 800 Mbit/s
• LVDS
o Timing detector readout
• Optical links from detector o Front end FPGAs
o … to readout boards
o 5 Gbit/s
• Optical links in counting room o Off-detector read out boards
o …to PC Farm
Pixel Sensor
Fiber Tile Pixel Sensor
Fiber Tile Pixel Sensor
Fiber Tile Pixel Sensor
Fiber Tile
Silicon FPGAs
x90
Fiber FPGAs
x48
Tile FPGAs
x48
Readout board
x16
Readout board
x8
Readout board
x8
PC x48
x192
x96 x96
O(4Tbit/s)
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GPU-PC
22/10/2014 Dirk Wiedner, Mu3e collaboration 146
• PC with GPU
• 10 Gbit/s Fiber input
o 8 inputs from sub-detectors
• Data filtering
o Timing Filter on FPGA
o Track filter on GPU
o Data to tape < 100 MB/s
GPU computer
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GPU-PC
22/10/2014 Dirk Wiedner, Mu3e collaboration 147
• PC with GPU
• 10 Gbit/s Fiber input
o 8 inputs from sub-detectors
• Data filtering
o Timing Filter on FPGA
o Track filter on GPU
o Data to tape < 100 MB/s
FPGA PCIe board
GPU computer
Optical mezzanine connectors
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Timing Filter
22/10/2014 Dirk Wiedner, Mu3e collaboration 148
• Entire event on PCIe FPGA
• Tile and Fiber data
o Easy to match
o Look for three tracks
• Reject data without three hits
o … inside time interval
1
3
2
Under discussion
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Timing Filter
22/10/2014 Dirk Wiedner, Mu3e collaboration 149
• Entire event on PCIe FPGA
• Tile and Fiber data
o Easy to match
o Look for three tracks
• Reject data without three hits
o … inside time interval
1
3
2
Under discussion
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Vertex Filter
22/10/2014 Dirk Wiedner, Mu3e collaboration 150
• Entire event on GPU
• Large target
o Large spread of muons
o Easy vertex separation
• Reject data without three tracks
o … inside area interval on target
1
3
2
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Vertex Filter
22/10/2014 Dirk Wiedner, Mu3e collaboration 151
• Entire event on GPU
• Large target
o Large spread of muons
o Easy vertex separation
• Reject data without three tracks
o … inside area interval on target
1
3
2
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Schedule
22/10/2014 Dirk Wiedner, Mu3e collaboration 152
• 2012 Letter of intent to PSI, tracker prototype, research proposal
• 2013/14 Detector R&D
• 2015 Detector construction
• 2016 Installation and commissioning at PSI
• 2017 Data taking at up to a few 108 μ/s
• 2018+ Construction of new beam-line at PSI
• 2019++ Data taking at up to 2·109 μ/s